OmniNX/hekate
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
1,983 Commits 1 Branch 0 Tags
1f2855b17d9d3064a19f9fdb90dca91e89f18909
Commit Graph

613 Commits

Author SHA1 Message Date
CTCaer
1f2855b17d bdk: dram: homogenize return values 2026-02-22 02:53:55 +02:00
CTCaer
9b2026ac6e bdk: touch: homogenize return values 2026-02-22 02:50:45 +02:00
CTCaer
cb81aaecdb bdk: i2c: homogenize return values 2026-02-22 02:42:53 +02:00
CTCaer
722a4a24c8 bdk: vic: expose idle wait 2026-02-22 02:27:08 +02:00
CTCaer
2824dff8f0 bdk: touch: check event count for wait event 
And increase checks during autotune execution.
 2026-02-21 09:15:15 +02:00
CTCaer
3e141fba20 bdk: touch: simplify input reporting 
Additionally, touch polling now returns 1 for no event result.
 2026-02-20 02:50:18 +02:00
CTCaer
c067c113e6 bdk: touch: switch to custom chip info cmd 
And also check if chip id is correct on init.
 2026-02-20 02:39:54 +02:00
CTCaer
98c14fd3c1 bdk: touch: use packet i2c for all transfers 
The repeating byte doesn't exist in i2c packet mode.
Additionally, adjust split transfers to one.
 2026-02-20 02:36:38 +02:00
CTCaer
f6bf40b903 bdk: touch: refactor 
And also use packet mode for big tx/rx combo i2c trasnfers.
 2026-02-20 00:43:58 +02:00
CTCaer
0815ae9c58 bdk: i2c: optimize packet mode functions 
- Allow xfer packet to send up to 20 bytes before receiving
- Remove interrupt use since it's only polling
- Check proper status for TX finish.
 2026-02-20 00:32:36 +02:00
CTCaer
304cb0c571 bdk: i2c: refactor 2026-02-20 00:00:33 +02:00
CTCaer
143b5db993 bdk: clk: add missing macro 2026-02-17 21:43:39 +02:00
CTCaer
0a55598ab6 bdk: touch: refactor/improve 
- Remove useless poll wait
- Use more defines
- Deduplicate code
- Add more checks
- Add switch sense mode
 2026-02-15 02:32:38 +02:00
CTCaer
38e73d6492 bdk: clk: reduce i2c freq input to save power 2026-02-14 23:59:39 +02:00
CTCaer
38210a08d1 bdk: vic: add hw version that this driver aims for 
Also TRM lies about best cache width, like always.
The higher the faster. The lower the simpler alignment.
A balanced one is used by default.
 2026-02-12 22:04:56 +02:00
CTCaer
ca8717d4a7 bdk: bm92t: do not parse non fixed pdos 2026-02-12 21:56:39 +02:00
CTCaer
e6984a149b bdk: sdmmc: remove dependency to ram for init 2026-02-12 21:53:59 +02:00
CTCaer
9171fa70c9 bdk: mem: rename sdmmc dma buffer 2026-02-12 21:38:56 +02:00
CTCaer
d14a1fb7d6 bdk: move exception type base away from IRQ stack 
Allow a more heavy stack usage by IRQ handlers.
 2026-02-12 21:32:43 +02:00
CTCaer
380bbe77a5 bdk: lvgl: complete black theme 
This has the side-effect to make any theme color component from 0x0B to 0xC7 work.
 2026-02-07 00:04:44 +02:00
CTCaer
b297e58bc8 bdk: add missing header guards 2026-01-29 09:07:22 +02:00
CTCaer
2014a72774 bdk: ianos: restructure for future expansion 2026-01-29 08:58:19 +02:00
CTCaer
55330b1bf5 bdk: pmc: refactor register defines and structs 2026-01-29 08:33:01 +02:00
CTCaer
0da69efd07 bdk: pinmux: always detach I2C4 pins from I2C3 pm 
Generally I2C3 communication can work via I2C3 or I2C4 pins.
Defaults are fine as long as one of the pin groups are floating or grounded or
both share I2C traces.

In NX boards I2C4 SDA is used for GC and connected to 1V8.
So if a GC is slotted, I2C3 works, if not, no communication is possible.

This config was done previously inside I2C3 consumer driver (touchscreen).
Now it's moved inside pinmux_config_i2c.
 2026-01-21 23:49:59 +02:00
CTCaer
74972a68df bdk: joycon: make init stricter but relax timings 
Additionally, if both Joy-Con are found, try to send rumble simultaneously.
 2026-01-20 20:03:38 +02:00
CTCaer
3134af6e92 bdk: display: reduce display off waiting time 
And align oled panel inside vblank.
Assumes display deinit happens before the rest of deinit.
 2026-01-20 06:13:02 +02:00
CTCaer
5936d9bad4 bdk: se: add T210 SHA256 silicon errata WAR 
Apparently, some T210 silicon have an undocumented errata where the MSG_LEFT2/3
registers are not ignored as they should.
When they have random data in POR they cause a hang as long as the message and
SHA calculation speed. So always clear them.
Additionally, clear MSG_LENGTH2/3 registers too even though they do not matter.
 2026-01-15 19:09:34 +02:00
CTCaer
68281d3051 bdk: se: adjust T210 silicon errata coherency WAR 
Add a 15us worst case scenario delay after OP done for T210.
Practically, because of 1600 MHz RAM, less than 1us delay is needed.
(204 MHz: 15us, 408 MHz: 5us, etc).
 2026-01-15 19:02:36 +02:00
CTCaer
e3267d1db7 bdk: se: correct result for < block size aes 2026-01-15 17:40:52 +02:00
CTCaer
8ab6f04243 bdk: hwinit: remove coreboot support 
Everything external is finally updated and beyond parity with old things that needed it.
 2026-01-12 03:57:39 +02:00
CTCaer
bf5a7b1a12 bdk: joycon: more refactoring 2026-01-12 03:08:20 +02:00
CTCaer
d94f356bf5 bdk: joycon: generalize _jc_packet_add_uart_hdr 
Correct its header construction in case it's used in the future.
Plus some unhardcoding of lengths.
 2026-01-11 17:24:18 +02:00
CTCaer
876d6adbe7 bdk: joycon: increase connection timeout to 1.8s 2026-01-11 17:06:48 +02:00
CTCaer
b4fcc72b6b bdk: joycon: refactor some fields 
And add better comments.
 2026-01-11 17:05:37 +02:00
CTCaer
928985ced1 bdk: joycon: use packed structs and bitfields 2026-01-10 13:39:06 +02:00
CTCaer
8123de714a bdk: joycon: correct crc8 offsets 
By luck the current offset and length of the calculation always worked.
Correct it though because the function might be used fully in the future.
 2026-01-10 13:36:34 +02:00
CTCaer
f05759e0f2 bdk: joycon: maintain consistent naming styles 2026-01-10 13:32:46 +02:00
CTCaer
76cb5422e3 bdk: joycon: optimize rumble enable 2026-01-06 23:14:11 +02:00
CTCaer
316650dda6 bdk: display: add OLED status pin 
Code is commented out for now until it gets used.
Status is set when RST is enabled.
 2026-01-06 23:10:42 +02:00
CTCaer
afa9715cf4 bdk: se: support multiple/partial blocks for RNG 2026-01-06 23:02:33 +02:00
CTCaer
1696dd8ebf bdk: se: use proper naming for ctx keys 2026-01-06 23:00:46 +02:00
CTCaer
c9208593af bdk: se: refactor and optimize SHA256 
- Simplify config and fix partial hashing
- Add partial function calls
- All partial state is handled internally
- All functions now use the classic naming convention.
 2026-01-06 22:59:20 +02:00
CTCaer
607b19067a bdk: se: use classic naming convention for XTS 2026-01-06 22:52:21 +02:00
CTCaer
b7f1641bce bdk: se: add AES OFB encryption/decryption support 2026-01-06 22:49:57 +02:00
CTCaer
2fa1a6a4af bdk: se: remove dst/src size argument requirement 
All operations expect the destination buffer to fit the selected size.
And for simplicity STATE_WAIT is not supported.

Additionally, remove single block ECB and just use the normal function.
 2026-01-06 22:47:54 +02:00
CTCaer
3463623126 bdk: se: optimize and update aes cmac hashing 
`se_aes_cmac_128` was also renamed to `se_aes_hash_cmac`.
By following the convention of 128bit functions not having size in their name.
 2026-01-06 22:32:26 +02:00
CTCaer
b4ca6cae21 bdk: se: handle original and updated IV in one go 
IV set now requires a size where the second block is updated IV
IV clear now clears both.
 2026-01-06 22:28:18 +02:00
CTCaer
d442390e9b bdk: se: support partial blocks for all aes modes 2026-01-06 22:23:25 +02:00
CTCaer
ca307e78c8 bdk: se: do a trivial refactor pass 2026-01-06 22:18:45 +02:00
CTCaer
13c91d2848 bdk: heap: use ultra fast defragmentation 
The defragmentation runs on every free and it only merges subsequent nodes.
So there's no point of looping all nodes.
So, just check if previous and next nodes are mergeable.
This makes free performant and achieves the same exact functionality.
 2026-01-05 12:33:31 +02:00