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bdk: vic: add hw version that this driver aims for

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Also TRM lies about best cache width, like always.
The higher the faster. The lower the simpler alignment.
A balanced one is used by default.
This commit is contained in:
CTCaer
2026-02-12 22:04:56 +02:00
parent 634d96ea66
commit 38210a08d1
1 changed files with 4 additions and 3 deletions
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7
bdk/display/vic.c
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@@ -1,5 +1,5 @@
/*
* VIC driver for Tegra X1
* VIC (4.0) driver for Tegra X1
*
* Copyright (c) 2018-2024 CTCaer
*
@@ -45,9 +45,10 @@
#define VIC_FC_CFG_STRUCT_SLOT_CFG2 0x10B0C
#define CACHE_WIDTH(n) ((n) << 16)
#define CACHE_WIDTH_16BX16 0 // Block Linear.
#define CACHE_WIDTH_32BX8 1 // Block Linear. Recommended for Block Linear.
#define CACHE_WIDTH_64BX4 2 // Block Linear, Pitch. Recommended for Pitch.
#define CACHE_WIDTH_32BX8 1 // Block Linear.
#define CACHE_WIDTH_64BX4 2 // Block Linear, Pitch. Recommended.
#define CACHE_WIDTH_128BX2 3 // Block Linear, Pitch.
#define CACHE_WIDTH_256BX1 4 // Pitch.
#define OUTPUT_FLIP_X BIT(20)
#define OUTPUT_FLIP_Y BIT(21)
#define OUTPUT_TRANSPOSE BIT(22)