OmniNX/hekate
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a2ea3fb08e58ac6882e20031b3234864cf6e3871
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535 Commits

Author SHA1 Message Date
CTCaer
a2ea3fb08e bdk: clock: use SET/CLR registers for all modules 
This is not mandatory but removes unnecessary load-mask/or-stores.

On the other hand, due to an undocumented T210 silicon errata,
these are mandatory for SDMMC modules.
This is because a fraction of T210 chips can glitch out and cause SoC hang.
T210B01 is not affected.
 2025-11-26 14:33:56 +02:00
CTCaer
813346f796 bdk: bpmp: add binX clock defines 2025-11-11 13:52:00 +02:00
CTCaer
260e28e628 bdk: fuse: add sense function 2025-11-11 13:28:44 +02:00
CTCaer
602945d918 bdk: fuse: add extra info on regs 2025-11-11 13:27:36 +02:00
CTCaer
7e01438ed3 bdk: fuse: correct masking on array read cmd 2025-11-11 13:27:13 +02:00
CTCaer
2c66b17f42 bdk: t210: add mc channel macros 2025-11-11 13:24:06 +02:00
CTCaer
e2f043a58a bdk: emc/mc: don't use [io]_rsvd naming for unused regs 2025-11-11 13:23:07 +02:00
CTCaer
0737f27ba0 bdk: lvgl: make sure task has a task to call 2025-11-11 13:17:34 +02:00
CTCaer
ded26332c6 bdk: ini: switch back to ASCII ordering 
For combining multiple inis.
 2025-08-27 15:22:54 +03:00
CTCaer
9309b53054 bdk: dirlist: use flags instead of arguments 
A new flag was also added that forces an ASCII ordering instead of Alphabetical one.
 2025-08-27 15:18:41 +03:00
CTCaer
9368a780cd bdk: minerva: allow sdmmc la to be skipped on L4T 2025-08-27 15:16:42 +03:00
CTCaer
20fa8382e6 bdk: hwinit: refactor MBIST WAR & add description 
The biggest take here is that the split approach of having it in Bootrom and
Bootloader is that it's only for boot. Any later powerdown must rerun the WAR
for that particular power domain.
 2025-08-27 15:13:56 +03:00
CTCaer
3cde8b7d58 bdk: hwinit: fix RAM_SVOP_PDP try no 2 
Previously the correct reg name was used but register address was not fixed.
So finally fix it.
 2025-08-27 15:10:47 +03:00
CTCaer
bdf556fd36 bdk: storage: small mmc refactoring 
- Correct some Response Type names
- And use _def for mmc defines similarly to sd_def
 2025-08-27 15:08:11 +03:00
CTCaer
fee7571135 bdk: mc: carveouts are not set by cfg so fix them 
For HOS <= 3.0.2 the carveouts are set by bootloader and sdram config actually does not set them.
So add which need different value from reset and also make sure that data is flushed for WPR config.
 2025-08-27 15:02:27 +03:00
CTCaer
459fe8c19c bdk: make use of new MC/EMC defines 2025-08-27 14:57:12 +03:00
CTCaer
a1e4549c29 bdk: rework MC/EMC register defines from scratch 
And add register structs also.
 2025-08-27 14:52:36 +03:00
CTCaer
f354f0e5bd bdk: add some t210 and fuses defines 
PGUP tag register can be used to identify which cpu we are running on.
 2025-08-27 14:48:35 +03:00
CTCaer
ea3a60f516 bdk: clock: simplify logic 
Simplify logic for clock enable and sdmmc clock management
 2025-08-27 14:44:41 +03:00
CTCaer
b4b3133570 bdk: clock: remove non existent module ids 
And add comments to special handling ones
 2025-08-27 14:41:27 +03:00
CTCaer
c63ccd0cdc bdk: pmc: rename pmc_enable_partition 2025-08-27 14:39:44 +03:00
CTCaer
8be2c5506e bdk: clock: wait for PLLD to lock when set 2025-08-08 15:58:32 +03:00
CTCaer
f083dcd280 bdk: add tegra BCT/BIT headers for T210/T210B01 2025-08-08 15:12:30 +03:00
CTCaer
28594c8777 bdk: rtc: add auto dst support and fix an off-by-one 2025-08-08 14:47:47 +03:00
CTCaer
a1a6111819 bdk: lvgl: set long press to 5s 2025-06-22 13:39:37 +03:00
CTCaer
01c414a180 bdk: fatfs: optimize format and fix PrFILE2 SAFE 
The FAT tables are now always aligned 1MB which can increase the FAT traversing
speed. Additionally, always aligning the FAT tables to minimum 16KB fixes a case
where PrFILE2 SAFE could be disabled because of unaligned FAT.
 2025-06-22 13:38:56 +03:00
CTCaer
9fe953bee1 bdk: use f_unmount instead of null f_mount 2025-06-22 13:34:42 +03:00
CTCaer
05cc9b6985 bdk: refactor several comments and defines 2025-06-22 13:32:32 +03:00
CTCaer
d9fda9411b bdk: update memory map to increase ramdisk size 
From 1040 to 1280MB.
 2025-06-22 13:27:25 +03:00
CTCaer
40b05ea5ea bdk: usb: revamp hid logic 
- Add support for GET REPORT. Allows OS to get a single input report.
- Add support for SET_IDLE. Allows OS to control when to send input reports

The SET IDLE and the underlying logic change fixes several things:
- The old issue of congestion in some systems.
- The new bug that would not allow setup packets to be received because mode
 was set to only send when there are changes.
- Now this starts properly as the old code but allows to be changed by OS on
 demand, while continuing servicing setup packets.
 2025-06-22 13:24:47 +03:00
CTCaer
e1ea05d53a bdk: usb: small refactor 2025-06-22 13:16:10 +03:00
CTCaer
88c0d13f0b bdk: usb: remove unused endpoint from hid 2025-06-22 13:10:47 +03:00
CTCaer
a1e8ddb2a7 bdk: max17050: add version check 2025-06-22 13:00:50 +03:00
CTCaer
39de4464ee bdk: bq24193: add version check 2025-06-22 13:00:27 +03:00
CTCaer
835dba384b bdk: bm92t: add version check 2025-06-22 13:00:01 +03:00
CTCaer
f365dd40f4 bdk: smmu: add smmu disable 2025-06-22 12:52:55 +03:00
CTCaer
1fbecfc76a bdk: display: update comments 
And also set WinD reg updating to HSYNC
 2025-06-22 12:50:27 +03:00
CTCaer
d851c16ce7 bdk: clock: refactor common PLL defines 2025-06-22 12:47:26 +03:00
CTCaer
b3194f6379 bdk: mc: fix warning for arbiter check 2025-04-30 09:14:32 +03:00
CTCaer
129a70c32d bdk: se: heap is not used anymore 2025-04-30 09:13:55 +03:00
CTCaer
811971dfa0 bdk: als: no need to check above 255 with u8 2025-04-30 09:13:19 +03:00
CTCaer
08872325c8 bdk: se: add 0 byte sha256 support 2025-04-30 08:15:15 +03:00
CTCaer
c07a155cc1 bdk: small refactoring 2025-04-30 08:14:32 +03:00
CTCaer
1d75c30c61 bdk: display: update color mode definitions 2025-04-30 08:11:51 +03:00
CTCaer
b9496f81b1 bdk: sdmmc: add extention regs read/parse 2025-01-24 16:42:14 +02:00
CTCaer
94b36f658c bdk: utils: added qsort compare functions 
int qsort_compare_int(const void *a, const void *b);
int qsort_compare_char(const void *a, const void *b);
int qsort_compare_char_case(const void *a, const void *b);
 2025-01-24 16:33:51 +02:00
CTCaer
7ac47b9ffe bdk: dirlist: switch to alphabetical ordering 2025-01-24 15:46:27 +02:00
CTCaer
595ac2c11e bdk: sdmmc: refactor error checking on rw 
And also check if card status is ok after a read/write.
 2025-01-24 15:44:33 +02:00
CTCaer
dcd4e4c4ec bdk: sdmmc: check that cmd timed out if SDSC 
Instead of assuming that, check it.
This fix will make SDUC not to be assumed as SDSC.
 2025-01-24 15:40:38 +02:00
CTCaer
018ed3f38a bdk: sdmmc: update unstuff_bits to use mod 
Since unstuff_bits only supports 128bits, instead of subtracting the correct amount of bits with the offset array, use % 128.
 2025-01-24 15:39:17 +02:00