OmniNX/hekate
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Author SHA1 Message Date
CTCaer
6cf7c645df nyx: fix bt pairing dumping 2025-11-27 12:37:36 +02:00
CTCaer
5775b3c47e nyx: info: add forced 8GB ram info 2025-11-27 12:36:20 +02:00
CTCaer
7c212358ed hekate: show errors before parsing R2C 2025-11-27 12:30:51 +02:00
CTCaer
e5566c0a46 hekate: add force 8GB ram config mode 2025-11-27 12:29:16 +02:00
CTCaer
dcf8e76441 loader/hekate/nyx: utilize the new rsvd cfg 2025-11-27 12:28:19 +02:00
CTCaer
7cbefa3061 bdk: add reserved cfg to ipl meta and nyx storage 2025-11-27 12:17:33 +02:00
CTCaer
5176ce4394 bdk: sdmmc: correct drive ohms comment 2025-11-27 12:14:43 +02:00
CTCaer
a6d4e5adaa bdk: clock: add i2c to the errata affected list 2025-11-27 12:12:13 +02:00
CTCaer
4a24956f3a bdk: fuse: allow overriding dram id fuses 
This should be set before running sdram init.
fuse_read_dramid(true) will still return the real id.
 2025-11-27 12:04:12 +02:00
CTCaer
364465399e hekate/nyx: use minerva storage and panel id 2025-11-27 11:28:26 +02:00
CTCaer
727d37c991 bdl: minerva: add deinit function 
Removes dependency to Nyx storage for hw init too.
 2025-11-27 11:25:08 +02:00
CTCaer
1fc92cfa33 bdk: nyx: rename disp_id to panel_id 2025-11-27 11:21:06 +02:00
CTCaer
62163f3255 bdk: minerva: remove dependency to Nyx storage 
minerva_str_t must be used now and passed directly to minerva_init.
 2025-11-27 11:20:19 +02:00
CTCaer
fc71e405d2 bdk: display: remove dependency to Nyx storage 
display_get_verbose_panel_id should now be used to get the full panel id.
 2025-11-27 11:13:54 +02:00
CTCaer
e7783f0bd7 bdk: bpmp: add write commits 
And deduplicate bpmp_clk_rate_relaxed in bpmp_clk_rate_set.
 2025-11-26 16:53:19 +02:00
CTCaer
e50ad58d61 bdk: clock: add sdmmc1 to the errata affected list 2025-11-26 16:47:29 +02:00
CTCaer
0a63fa19a3 bdk: clock: allow pll lock wait to timeout 
Also enable PLLC4 p/f lock and reduce time waiting before disabling.
 2025-11-26 16:46:11 +02:00
CTCaer
19285745b5 bdk: clock: improve PLLC init 
- Use 6 as divm and div1 for OUT1 to avoid having very high frequency on OUT0
 There seems to be an undocumented silicon errata where PLLC OUT0 produces EMI
 to input mux logic in modules, even when not using it.
- Always check if PLL is enabled and disable first in order to avoid a silicon
 errata with hybrid PLLs
- Fix PLLC_FLL_LD_MEM value
 2025-11-26 14:48:47 +02:00
CTCaer
9c028cd94a bdk: clock: streamline sdmmc func naming 
Additionally, restored the pclock variable because of _clock_sdmmc_config_clock_host store order.
 2025-11-26 14:37:14 +02:00
CTCaer
a2ea3fb08e bdk: clock: use SET/CLR registers for all modules 
This is not mandatory but removes unnecessary load-mask/or-stores.

On the other hand, due to an undocumented T210 silicon errata,
these are mandatory for SDMMC modules.
This is because a fraction of T210 chips can glitch out and cause SoC hang.
T210B01 is not affected.
 2025-11-26 14:33:56 +02:00
CTCaer
50ac32fd40 Bump hekate to v6.4.1 and Nyx to v1.8.1 2025-11-16 22:11:31 +02:00
CTCaer
43dec3021f nyx: info: add hos version for 22 fuses burnt 2025-11-16 21:54:03 +02:00
CTCaer
c72f97eef3 hos: fix 21.0.0 nogc FS patch and refactor patches 
The NOGC sdmmc memio patch was incorrectly changing the register that keeps the value for HOS 21.0.0.
Refactored all patches to stop patching the whole op and just change the value from 0x200 to 0x400.
 2025-11-16 21:53:26 +02:00
CTCaer
8e813ae8b6 Bump hekate to v6.4.0 and Nyx to v1.8.0 2025-11-15 22:37:09 +02:00
CTCaer
3eab7889bf nyx: parted: do not allow FULL on upgraded eMMC 
It's not allowed on creation anyway because of unknown HOS USER size factors
 2025-11-14 18:49:41 +02:00
CTCaer
69ac0292f0 hos: add 21.0.0 support 2025-11-11 14:17:04 +02:00
CTCaer
119fcdf9e8 nyx: extend bpmpclock 
Add 2 more slower modes.
 2025-11-11 13:54:33 +02:00
CTCaer
813346f796 bdk: bpmp: add binX clock defines 2025-11-11 13:52:00 +02:00
CTCaer
260e28e628 bdk: fuse: add sense function 2025-11-11 13:28:44 +02:00
CTCaer
602945d918 bdk: fuse: add extra info on regs 2025-11-11 13:27:36 +02:00
CTCaer
7e01438ed3 bdk: fuse: correct masking on array read cmd 2025-11-11 13:27:13 +02:00
CTCaer
2c66b17f42 bdk: t210: add mc channel macros 2025-11-11 13:24:06 +02:00
CTCaer
e2f043a58a bdk: emc/mc: don't use [io]_rsvd naming for unused regs 2025-11-11 13:23:07 +02:00
CTCaer
0737f27ba0 bdk: lvgl: make sure task has a task to call 2025-11-11 13:17:34 +02:00
CTCaer
453ec18048 nyx: part: extend Fix Hybrid MBR/GPT functionality 
- Allow invalid/out-of-bounds and empty partitions to be removed from GPT
- Add fix for wrong emuMMC offset because of older bugged Android Dynamic scheme
 2025-11-10 15:28:41 +02:00
CTCaer
b461bfc846 nyx: info: update SD errors after a bench session 2025-11-10 13:53:43 +02:00
CTCaer
e38cff815b nyx: info: say when sbk fuses can't be read 
Additionally, swap the IDDQ real with raw values.
 2025-11-10 13:52:43 +02:00
CTCaer
5d75b01491 nyx: fix a mem leak on closing emummc change win 2025-11-10 13:50:07 +02:00
CTCaer
50d56c7b4b nyx: part: add support for max 24GB resized emuMMC 
If a partition is added manually, 28GB is the max allowed to be created.
 2025-11-07 13:33:34 +02:00
CTCaer
0aa35d16da Update template with ;/# and newline info 2025-08-27 16:02:42 +03:00
CTCaer
91e2f6d9db nyx: backup/restore UX improvements 
- Fix the verification % and bar if restored backup is smaller than partition
- Use orange bar for restoring when writing to eMMC/emuMMC.
- Fix bar color on restoring after verification
- Allow verification to be aborted for all parts in partial mode (FAT32 or small card)
 2025-08-27 15:56:04 +03:00
CTCaer
3896b7cb8f nyx: part mgr: remove gpt 126 entries check 
It's done before to validate GPT anyway
 2025-08-27 15:48:24 +03:00
CTCaer
dad9abe93d minerva: update to v1.5 
- "Perf" hack removal (match L4T mini Minerva)
 It's not a performance hack, it just kills low power modes.
 If wanted in L4T, use HP Mode in `ram_oc_opt`.
- Simplify of burst regs config
- Refactor of several bit defines and variables
 2025-08-27 15:45:58 +03:00
CTCaer
aa4d0678d3 l4t: add some missing carveout configs 
Mostly relevant for CARVEOUT_NVDEC_TSEC_ENABLE.
 2025-08-27 15:30:47 +03:00
CTCaer
ded26332c6 bdk: ini: switch back to ASCII ordering 
For combining multiple inis.
 2025-08-27 15:22:54 +03:00
CTCaer
21c9e3f81f hekate: use the new dirlist 2025-08-27 15:21:46 +03:00
CTCaer
9309b53054 bdk: dirlist: use flags instead of arguments 
A new flag was also added that forces an ASCII ordering instead of Alphabetical one.
 2025-08-27 15:18:41 +03:00
CTCaer
9368a780cd bdk: minerva: allow sdmmc la to be skipped on L4T 2025-08-27 15:16:42 +03:00
CTCaer
20fa8382e6 bdk: hwinit: refactor MBIST WAR & add description 
The biggest take here is that the split approach of having it in Bootrom and
Bootloader is that it's only for boot. Any later powerdown must rerun the WAR
for that particular power domain.
 2025-08-27 15:13:56 +03:00
CTCaer
3cde8b7d58 bdk: hwinit: fix RAM_SVOP_PDP try no 2 
Previously the correct reg name was used but register address was not fixed.
So finally fix it.
 2025-08-27 15:10:47 +03:00