OmniNX/hekate
2
0 Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
1,937 Commits 1 Branch 0 Tags
5936d9bad40dfd6268728e700770ffcf656d0e3f
Commit Graph
100 Commits
This Branch
This Branch
All Branches
Author SHA1 Message Date
CTCaer 5936d9bad4 bdk: se: add T210 SHA256 silicon errata WAR 
Apparently, some T210 silicon have an undocumented errata where the MSG_LEFT2/3
registers are not ignored as they should.
When they have random data in POR they cause a hang as long as the message and
SHA calculation speed. So always clear them.
Additionally, clear MSG_LENGTH2/3 registers too even though they do not matter.
 2026-01-15 19:09:34 +02:00
CTCaer 68281d3051 bdk: se: adjust T210 silicon errata coherency WAR 
Add a 15us worst case scenario delay after OP done for T210.
Practically, because of 1600 MHz RAM, less than 1us delay is needed.
(204 MHz: 15us, 408 MHz: 5us, etc).
 2026-01-15 19:02:36 +02:00
CTCaer e3267d1db7 bdk: se: correct result for < block size aes 2026-01-15 17:40:52 +02:00
CTCaer accc9aa7b0 hos: store wb anyway even if unused 
Partially reverts 73d96b7ca8.
This should be completely removed at some point.
 2026-01-15 17:39:05 +02:00
CTCaer 116d4042c2 hos: refactor ctr/hash vars in pkg2 header 2026-01-15 17:32:00 +02:00
CTCaer 3af777f839 Bump hekate to v6.5.0 and Nyx to v1.9.0 2026-01-14 05:10:05 +02:00
CTCaer 8b8c9e8dd8 hos: add 21.2.0 support 2026-01-14 04:58:34 +02:00
CTCaer f0dde780f4 hekate/nyx: remove coreboot support 
Everything external is finally updated and beyond parity with old things that needed it.
 2026-01-12 04:04:08 +02:00
CTCaer 8ab6f04243 bdk: hwinit: remove coreboot support 
Everything external is finally updated and beyond parity with old things that needed it.
 2026-01-12 03:57:39 +02:00
CTCaer bf5a7b1a12 bdk: joycon: more refactoring 2026-01-12 03:08:20 +02:00
CTCaer d94f356bf5 bdk: joycon: generalize _jc_packet_add_uart_hdr 
Correct its header construction in case it's used in the future.
Plus some unhardcoding of lengths.
 2026-01-11 17:24:18 +02:00
CTCaer 876d6adbe7 bdk: joycon: increase connection timeout to 1.8s 2026-01-11 17:06:48 +02:00
CTCaer b4fcc72b6b bdk: joycon: refactor some fields 
And add better comments.
 2026-01-11 17:05:37 +02:00
CTCaer 928985ced1 bdk: joycon: use packed structs and bitfields 2026-01-10 13:39:06 +02:00
CTCaer 8123de714a bdk: joycon: correct crc8 offsets 
By luck the current offset and length of the calculation always worked.
Correct it though because the function might be used fully in the future.
 2026-01-10 13:36:34 +02:00
CTCaer f05759e0f2 bdk: joycon: maintain consistent naming styles 2026-01-10 13:32:46 +02:00
CTCaer 02484ae3b7 nyx: always show console stats 
When main Joy-Con or all are disconnected, always show Joy-Con debug info.
Additionally, always allow opening/closing console window with the secondary one,
in the same conditions.
 2026-01-07 00:20:10 +02:00
CTCaer 01ffbeecd6 nyx: make sure ram is set to 1600 MHz 
No matter how Nyx was launched.
 2026-01-06 23:22:04 +02:00
CTCaer e558d0c2c4 nyx: options: make sure var has a value in all -O# 2026-01-06 23:20:45 +02:00
CTCaer 76cb5422e3 bdk: joycon: optimize rumble enable 2026-01-06 23:14:11 +02:00
CTCaer 316650dda6 bdk: display: add OLED status pin 
Code is commented out for now until it gets used.
Status is set when RST is enabled.
 2026-01-06 23:10:42 +02:00
CTCaer 1d2a7631d9 nyx: update rng calls based on new bdk 2026-01-06 23:04:26 +02:00
CTCaer afa9715cf4 bdk: se: support multiple/partial blocks for RNG 2026-01-06 23:02:33 +02:00
CTCaer 73f7d53572 hekate/nyx: update ctx keys calls based on new bdk 2026-01-06 23:01:54 +02:00
CTCaer 1696dd8ebf bdk: se: use proper naming for ctx keys 2026-01-06 23:00:46 +02:00
CTCaer bb1087006a hekate/nyx: update sha calls based on new bdk 2026-01-06 22:59:53 +02:00
CTCaer c9208593af bdk: se: refactor and optimize SHA256 
- Simplify config and fix partial hashing
- Add partial function calls
- All partial state is handled internally
- All functions now use the classic naming convention.
 2026-01-06 22:59:20 +02:00
CTCaer 607b19067a bdk: se: use classic naming convention for XTS 2026-01-06 22:52:21 +02:00
CTCaer b7f1641bce bdk: se: add AES OFB encryption/decryption support 2026-01-06 22:49:57 +02:00
CTCaer ee1b0db130 hekate/nyx: update aes calls based on new bdk 2026-01-06 22:49:09 +02:00
CTCaer 2fa1a6a4af bdk: se: remove dst/src size argument requirement 
All operations expect the destination buffer to fit the selected size.
And for simplicity STATE_WAIT is not supported.

Additionally, remove single block ECB and just use the normal function.
 2026-01-06 22:47:54 +02:00
CTCaer 3463623126 bdk: se: optimize and update aes cmac hashing 
`se_aes_cmac_128` was also renamed to `se_aes_hash_cmac`.
By following the convention of 128bit functions not having size in their name.
 2026-01-06 22:32:26 +02:00
CTCaer b4ca6cae21 bdk: se: handle original and updated IV in one go 
IV set now requires a size where the second block is updated IV
IV clear now clears both.
 2026-01-06 22:28:18 +02:00
CTCaer d442390e9b bdk: se: support partial blocks for all aes modes 2026-01-06 22:23:25 +02:00
CTCaer ca307e78c8 bdk: se: do a trivial refactor pass 2026-01-06 22:18:45 +02:00
CTCaer 13c91d2848 bdk: heap: use ultra fast defragmentation 
The defragmentation runs on every free and it only merges subsequent nodes.
So there's no point of looping all nodes.
So, just check if previous and next nodes are mergeable.
This makes free performant and achieves the same exact functionality.
 2026-01-05 12:33:31 +02:00
CTCaer 1de3206e79 Restructure and refactor makefiles 
- Allow rebuilds without rebuilding everything
 By detecting changes everywhere that matters (flags, objects and headers).
- Add progress bar
- Fully clean everything when clean goal is used
 2025-12-31 14:19:56 +02:00
CTCaer 800bec2ec2 bdk: max17050: simplify calculations 
And make current readings a tiny bit (±0.16%) more accurate.
 2025-12-31 03:44:44 +02:00
CTCaer 520bce08cf nyx: add joycon charging debug info 2025-12-27 06:30:36 +02:00
CTCaer ee22d660dc minerva: update rate_from if clock the same 2025-12-27 06:16:59 +02:00
CTCaer 067c12655b bdk: max17050: remove unused cached batt voltage 2025-12-27 06:06:56 +02:00
CTCaer c03757e73d bdk: joycon: improve charger config 
Utilize charger config set command which allows for supplement mode.
Additionally, remove ping config when SIO and parse buttons/sticks on subcmd reports.
 2025-12-27 06:06:17 +02:00
CTCaer acb50dad7b fatfs: set default date to 1/1/2026 2025-12-25 12:58:32 +02:00
CTCaer 9bc878e85d l4t: make mselect config common for t210/t210b01 
It's already handled in soc powerdown exit in ATF but it doesn't hurt to have it generally.
 2025-12-25 12:55:04 +02:00
CTCaer 0cab56293d bdk: ccplex: do not disable mselect on cpu pwrgate 2025-12-25 12:51:37 +02:00
CTCaer 69ab954119 hekate/nyx: remove last calloc references 2025-12-25 12:50:24 +02:00
CTCaer ae7c5fdfdb bdk: heap: add more safe guards 
- Use magic for used regions
- Deduplicate calloc
Enable a print/abort in _heap_free() for debugging.
 2025-12-25 12:33:41 +02:00
CTCaer a7ad3d4984 bdk: display: improve and deduplicate more 
- Add delay after a DSI soft reset
- Remove more duplicated configs
- Improve code to save code size
- Improve comments
- Do not allow display_backlight to be used with OLED
 2025-12-25 11:36:06 +02:00
CTCaer 67140d026c bdk: util: use volatile base for reg_write_array 2025-12-18 11:50:00 +02:00
CTCaer 998053f8db bdk: display: use a scratch reg for backlight 
Spare registers normally have hidden hw config usage, so avoid them just in case.
 2025-12-18 11:48:53 +02:00
CTCaer b5a6c8eb64 bdk: display: simplify macros 
Expand register index in parent macro and remove _DI/_DSIREG macros.
 2025-12-18 11:17:43 +02:00
CTCaer 8faa1a6690 bdk: display: use spare reg to store dcs bl duty 
And also remove backlight pwm restoring from coreboot hw deinit path.
 2025-12-18 09:54:26 +02:00
CTCaer ba95bb7494 bdk: fatfs: improve fat read/write 
- Convert access from min cluster size to block size
  Also allow read/writes to less than cluster size
- In case of intercluster access throw an error
- Do not error on zero size

On reads buffer still needs to be block (instead of cluster) aligned.
On writes, buffer still needs to be readable out of bounds.
 2025-12-17 07:11:51 +02:00
CTCaer b90935ac16 nyx: info: update 20nm wafer bounds 2025-12-17 06:54:57 +02:00
CTCaer c78b94b0ac nyx: info: unlocked T210B01 fuses dumping support 2025-12-17 06:51:04 +02:00
CTCaer 20a50988c5 bdk: fuse: return array size with fuse_read_array 2025-12-17 06:41:52 +02:00
CTCaer ac60695b24 nyx: parted: remove invisible btns in eMMC mode 2025-12-17 06:34:42 +02:00
CTCaer 468544ce1e nyx: add a small stall in lvgl loop 
EMC CC should not run in less than 20us.
 2025-12-17 06:33:05 +02:00
CTCaer 73d96b7ca8 hos/l4t: deduplicate sc7exit-b01 load 
And remove obsolete MWS (L4T one deprecated it 3 years ago).
 2025-12-17 06:28:36 +02:00
CTCaer 4af4692710 hos: reflect minerva changes 2025-12-17 06:07:58 +02:00
CTCaer 4229a43818 lp0 cfg: use a more appropriate entry name 2025-12-17 06:00:02 +02:00
CTCaer b6ec6a8f6e minerva: update tov1.6_T210/v0.1_T21X 
T21X v0.1:
- Add IRB/no table support
T210 v1.6/Common:
- Add a proper table for 8GB T210 config instead of editing a 4GB one
- Increase timeout to 2ms
- Generally improve checks and guard against unknown SoCs/SKUs
- Remove the long ago obsolete OVERCLOCK_FREQ/OVERCLOCK_VOLTAGE ifdefs
 2025-12-17 05:58:09 +02:00
CTCaer 0db758592a bdk: minerva: add IRB support 
Aka no table support.
 2025-12-17 05:24:16 +02:00
CTCaer 8b4d5507f6 hekate: gfx: correct a very very very old typo 2025-12-17 04:48:37 +02:00
CTCaer c584242873 hekate: exo: simplify fatal screen to save space 
And remove an obsolete message.
 2025-12-17 04:45:20 +02:00
CTCaer 3f75917c8b hekate: remove precise free clusters calc in TUI 2025-12-17 04:37:36 +02:00
CTCaer 8d6bb5f427 bdk: clock: update some defines 2025-12-17 04:33:40 +02:00
CTCaer 4797b42e76 bdk: sdmmc: add defines for max block number 2025-12-17 04:30:12 +02:00
CTCaer 6207a783d7 Bump hekate to v6.4.2 and Nyx to v1.8.2 2025-12-02 12:59:51 +02:00
CTCaer 768824df33 nyx: options: add month/date checks for roller 
Now the roller will return back automatically if day can't be set for selected month.
Additionally, fix the check when saving.
 2025-12-01 14:19:03 +02:00
CTCaer 03a9c2d75c nyx: info: add wafer graph with die x/y placement 2025-12-01 14:16:26 +02:00
CTCaer 84bf634e33 nyx: info: streamline hw info from fuses 
- Compact and group relevant values together
- Use actual value name instead of register name where possible
- Fix LOT code masking
- Fully parse and show LOT code (it's the same marking on die)
- Correct X coordinate parsing (9bit 2s complement)
- Add product code
 2025-12-01 14:15:18 +02:00
CTCaer 86871bea7d hekate: write rsvd cfg to update.bin if different 2025-12-01 13:53:34 +02:00
CTCaer 98960a72d8 nyx: do init always with lowest clock boost 2025-11-27 12:38:52 +02:00
CTCaer 6cf7c645df nyx: fix bt pairing dumping 2025-11-27 12:37:36 +02:00
CTCaer 5775b3c47e nyx: info: add forced 8GB ram info 2025-11-27 12:36:20 +02:00
CTCaer 7c212358ed hekate: show errors before parsing R2C 2025-11-27 12:30:51 +02:00
CTCaer e5566c0a46 hekate: add force 8GB ram config mode 2025-11-27 12:29:16 +02:00
CTCaer dcf8e76441 loader/hekate/nyx: utilize the new rsvd cfg 2025-11-27 12:28:19 +02:00
CTCaer 7cbefa3061 bdk: add reserved cfg to ipl meta and nyx storage 2025-11-27 12:17:33 +02:00
CTCaer 5176ce4394 bdk: sdmmc: correct drive ohms comment 2025-11-27 12:14:43 +02:00
CTCaer a6d4e5adaa bdk: clock: add i2c to the errata affected list 2025-11-27 12:12:13 +02:00
CTCaer 4a24956f3a bdk: fuse: allow overriding dram id fuses 
This should be set before running sdram init.
fuse_read_dramid(true) will still return the real id.
 2025-11-27 12:04:12 +02:00
CTCaer 364465399e hekate/nyx: use minerva storage and panel id 2025-11-27 11:28:26 +02:00
CTCaer 727d37c991 bdl: minerva: add deinit function 
Removes dependency to Nyx storage for hw init too.
 2025-11-27 11:25:08 +02:00
CTCaer 1fc92cfa33 bdk: nyx: rename disp_id to panel_id 2025-11-27 11:21:06 +02:00
CTCaer 62163f3255 bdk: minerva: remove dependency to Nyx storage 
minerva_str_t must be used now and passed directly to minerva_init.
 2025-11-27 11:20:19 +02:00
CTCaer fc71e405d2 bdk: display: remove dependency to Nyx storage 
display_get_verbose_panel_id should now be used to get the full panel id.
 2025-11-27 11:13:54 +02:00
CTCaer e7783f0bd7 bdk: bpmp: add write commits 
And deduplicate bpmp_clk_rate_relaxed in bpmp_clk_rate_set.
 2025-11-26 16:53:19 +02:00
CTCaer e50ad58d61 bdk: clock: add sdmmc1 to the errata affected list 2025-11-26 16:47:29 +02:00
CTCaer 0a63fa19a3 bdk: clock: allow pll lock wait to timeout 
Also enable PLLC4 p/f lock and reduce time waiting before disabling.
 2025-11-26 16:46:11 +02:00
CTCaer 19285745b5 bdk: clock: improve PLLC init 
- Use 6 as divm and div1 for OUT1 to avoid having very high frequency on OUT0
 There seems to be an undocumented silicon errata where PLLC OUT0 produces EMI
 to input mux logic in modules, even when not using it.
- Always check if PLL is enabled and disable first in order to avoid a silicon
 errata with hybrid PLLs
- Fix PLLC_FLL_LD_MEM value
 2025-11-26 14:48:47 +02:00
CTCaer 9c028cd94a bdk: clock: streamline sdmmc func naming 
Additionally, restored the pclock variable because of _clock_sdmmc_config_clock_host store order.
 2025-11-26 14:37:14 +02:00
CTCaer a2ea3fb08e bdk: clock: use SET/CLR registers for all modules 
This is not mandatory but removes unnecessary load-mask/or-stores.

On the other hand, due to an undocumented T210 silicon errata,
these are mandatory for SDMMC modules.
This is because a fraction of T210 chips can glitch out and cause SoC hang.
T210B01 is not affected.
 2025-11-26 14:33:56 +02:00
CTCaer 50ac32fd40 Bump hekate to v6.4.1 and Nyx to v1.8.1 2025-11-16 22:11:31 +02:00
CTCaer 43dec3021f nyx: info: add hos version for 22 fuses burnt 2025-11-16 21:54:03 +02:00
CTCaer c72f97eef3 hos: fix 21.0.0 nogc FS patch and refactor patches 
The NOGC sdmmc memio patch was incorrectly changing the register that keeps the value for HOS 21.0.0.
Refactored all patches to stop patching the whole op and just change the value from 0x200 to 0x400.
 2025-11-16 21:53:26 +02:00
CTCaer 8e813ae8b6 Bump hekate to v6.4.0 and Nyx to v1.8.0 2025-11-15 22:37:09 +02:00
CTCaer 3eab7889bf nyx: parted: do not allow FULL on upgraded eMMC 
It's not allowed on creation anyway because of unknown HOS USER size factors
 2025-11-14 18:49:41 +02:00
CTCaer 69ac0292f0 hos: add 21.0.0 support 2025-11-11 14:17:04 +02:00