CTCaer a2ea3fb08e bdk: clock: use SET/CLR registers for all modules ...

This is not mandatory but removes unnecessary load-mask/or-stores.

On the other hand, due to an undocumented T210 silicon errata,
these are mandatory for SDMMC modules.
This is because a fraction of T210 chips can glitch out and cause SoC hang.
T210B01 is not affected.

2025-11-26 14:33:56 +02:00

26 KiB

Raw Blame History

View Raw