173 lines
4.8 KiB
C
173 lines
4.8 KiB
C
/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2022-2025 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _PKG1_H_
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#define _PKG1_H_
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#include <bdk.h>
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#define PKG1_MAGIC 0x31314B50
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#define PK11_SECTION_WB 0
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#define PK11_SECTION_LD 1
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#define PK11_SECTION_SM 2
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#define PKG1_BOOTLOADER_SIZE SZ_256K
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#define PKG1_BOOTLOADER_MAIN_OFFSET (0x100000 / EMMC_BLOCKSIZE)
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#define PKG1_BOOTLOADER_BACKUP_OFFSET (0x140000 / EMMC_BLOCKSIZE)
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#define PKG1_BOOTLOADER_SAFE_OFFSET (0x000000 / EMMC_BLOCKSIZE)
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#define PKG1_HOS_EKS_OFFSET (0x180000 / EMMC_BLOCKSIZE)
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#define PKG1_ERISTA_ON_MARIKO_MAGIC 0xE59FD00C // For 4.0.0 Erista and up.
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#define PKG1_MARIKO_ON_ERISTA_MAGIC 0x40010040 // Mariko pkg1 entrypoint.
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typedef struct _patch_t
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{
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u32 off;
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u32 val;
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} patch_t;
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#define PATCHSET_DEF(name, ...) \
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const patch_t name[] = { \
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__VA_ARGS__, \
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{ 0xFFFFFFFF, 0xFFFFFFFF } \
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}
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typedef struct _bl_hdr_t210b01_t
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{
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/* 0x000 */ u8 aes_mac[0x10];
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/* 0x010 */ u8 rsa_sig[0x100];
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/* 0x110 */ u8 salt[0x20];
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/* 0x130 */ u8 sha256[0x20];
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/* 0x150 */ u32 version;
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/* 0x154 */ u32 size;
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/* 0x158 */ u32 load_addr;
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/* 0x15C */ u32 entrypoint;
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/* 0x160 */ u8 rsvd[0x10];
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} bl_hdr_t210b01_t;
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typedef struct _eks_keys_t
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{
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u8 master_kekseed[SE_KEY_128_SIZE];
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u8 random_data[0x70];
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u8 package1_key[SE_KEY_128_SIZE];
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} eks_keys_t;
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typedef struct _pkg1_eks_t
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{
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u8 cmac[SE_KEY_128_SIZE];
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u8 ctr[SE_AES_IV_SIZE];
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eks_keys_t keys;
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u8 padding[0x150];
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} pkg1_eks_t;
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typedef struct _pk1_hdr_t
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{
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/* 0x00 */ u32 si_sha256; // Secure Init.
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/* 0x04 */ u32 sm_sha256; // Secure Monitor.
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/* 0x08 */ u32 sl_sha256; // Secure Loader.
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/* 0x0C */ u32 unk; // what's this? It's not warmboot.
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/* 0x10 */ char timestamp[14];
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/* 0x1E */ u8 keygen;
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/* 0x1F */ u8 version;
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} pk1_hdr_t;
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typedef struct _pkg1_id_t
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{
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const char *id;
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u16 mkey;
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u16 fuses;
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u16 tsec_off;
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u16 pkg11_off;
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u32 secmon_base;
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u32 warmboot_base;
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const patch_t *secmon_patchset;
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} pkg1_id_t;
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typedef struct _pk11_hdr_t
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{
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/* 0x00 */ u32 magic;
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/* 0x04 */ u32 wb_size;
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/* 0x08 */ u32 wb_off;
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/* 0x0C */ u32 pad;
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/* 0x10 */ u32 ldr_size;
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/* 0x14 */ u32 ldr_off;
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/* 0x18 */ u32 sm_size;
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/* 0x1C */ u32 sm_off;
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} pk11_hdr_t;
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/*
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* NX BIT - Secure monitor mailbox
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*
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* On older versions the Tegra BIT was remaining intact.
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* The bootloader info from BCT was copied in the mailbox at 0x40002E10.
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* On >= 4.0.0 the boot reason was replaced by BCT boot type.
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* On newer versions (>= 7.0.0) the Tegra BIT is replaced with NX BIT.
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* That also includes secmon state mailbox and pkg1 and pkg11 headers.
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*/
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#define NX_BIT1_MAILBOX_ADDR 0x40002E00
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#define NX_BIT7_MAILBOX_ADDR 0x40000000
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enum
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{
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SECMON_STATE_NOT_READY = 0,
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PKG1_STATE_NOT_READY = 0,
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PKG1_STATE_NXBC_COPIED = 1,
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PKG1_STATE_DRAM_READY = 2,
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PKG1_STATE_PKG2_READY_OLD = 3,
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PKG1_STATE_PKG2_READY = 4
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};
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#define NX_BIT_BL_ATTR_SAFE_MODE BIT(0)
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#define NX_BIT_BL_ATTR_SMC_BLACKLIST_STANDARD BIT(1) // Accounted only on >= 8.0.0.
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#define NX_BIT_BL_ATTR_SMC_BLACKLIST_DEVICEUD BIT(2) // Accounted only on >= 8.0.0.
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#define NX_BIT_BL_ATTR_SMC_BLACKLIST_SAFEMODE BIT(3) // Accounted only on >= 8.0.0.
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typedef struct _nx_bit_t
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{
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/* 0x00 */ u32 secldr_tmr_start;
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/* 0x04 */ u32 secldr_tmr_end;
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/* 0x08 */ u32 secmon_tmr_start;
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/* 0x0C */ u32 secmon_tmr_end;
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/* 0x10 */ u32 bl_version;
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/* 0x14 */ u32 bl_start_block;
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/* 0x18 */ u32 bl_start_page;
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/* 0x1C */ u32 bl_attribute; // bit0: Safe, bit1-4: SMC blacklist mask.
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/* 0x20 */ u32 boot_type; // 0: None, 1: Coldboot, 2: RMC, 3: UART, 4: Exit RCM.
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/* 0x24 */ u8 padding_nxbit[12];
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/* 0x30 */ pk1_hdr_t pk1_hdr; // (>= 7.0.0).
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/* 0x50 */ pk11_hdr_t pk11_hdr; // (>= 7.0.0).
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/* 0x70 */ u8 padding_pkg1[0x88];
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/* 0xF8 */ vu32 secldr_state;
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/* 0xFC */ vu32 secmon_state;
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u8 padding_mail[0x100];
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} nx_bit_t;
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const pkg1_id_t *pkg1_get_latest();
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const pkg1_id_t *pkg1_identify(u8 *pkg1);
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bool pkg1_decrypt(const pkg1_id_t *id, u8 *pkg1);
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const u8 *pkg1_unpack(void *wm_dst, u32 *wb_sz, void *sm_dst, void *ldr_dst, const pkg1_id_t *id, u8 *pkg1);
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void pkg1_secmon_patch(void *hos_ctxt, u32 secmon_base, bool t210b01);
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void pkg1_warmboot_patch(void *hos_ctxt);
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int pkg1_warmboot_config(void *hos_ctxt, u32 warmboot_base, u32 fuses_fw, u8 mkey);
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void pkg1_warmboot_rsa_mod(u32 warmboot_base);
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#endif
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