- Use 6 as divm and div1 for OUT1 to avoid having very high frequency on OUT0
There seems to be an undocumented silicon errata where PLLC OUT0 produces EMI
to input mux logic in modules, even when not using it.
- Always check if PLL is enabled and disable first in order to avoid a silicon
errata with hybrid PLLs
- Fix PLLC_FLL_LD_MEM value
This is not mandatory but removes unnecessary load-mask/or-stores.
On the other hand, due to an undocumented T210 silicon errata,
these are mandatory for SDMMC modules.
This is because a fraction of T210 chips can glitch out and cause SoC hang.
T210B01 is not affected.
The NOGC sdmmc memio patch was incorrectly changing the register that keeps the value for HOS 21.0.0.
Refactored all patches to stop patching the whole op and just change the value from 0x200 to 0x400.
- Allow invalid/out-of-bounds and empty partitions to be removed from GPT
- Add fix for wrong emuMMC offset because of older bugged Android Dynamic scheme
- Fix the verification % and bar if restored backup is smaller than partition
- Use orange bar for restoring when writing to eMMC/emuMMC.
- Fix bar color on restoring after verification
- Allow verification to be aborted for all parts in partial mode (FAT32 or small card)
- "Perf" hack removal (match L4T mini Minerva)
It's not a performance hack, it just kills low power modes.
If wanted in L4T, use HP Mode in `ram_oc_opt`.
- Simplify of burst regs config
- Refactor of several bit defines and variables
The biggest take here is that the split approach of having it in Bootrom and
Bootloader is that it's only for boot. Any later powerdown must rerun the WAR
for that particular power domain.
For HOS <= 3.0.2 the carveouts are set by bootloader and sdram config actually does not set them.
So add which need different value from reset and also make sure that data is flushed for WPR config.
