bdk: add some t210 and fuses defines
PGUP tag register can be used to identify which cpu we are running on.
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@@ -201,7 +201,7 @@
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#define FUSE_RESERVED_ODM29_B01 0x294
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#define FUSE_APB2JTAG_DISABLE 0x298
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#define FUSE_ODM_INFO 0x29C
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#define FUSE_ODM_INFO 0x29C // Debug features disable.
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#define FUSE_ARM_CRYPT_DE_FEATURE 0x2A8
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#define FUSE_OPT_RAM_WTSEL_TSMCPDP_PO4SVT_B01 0x2B0
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@@ -212,6 +212,9 @@
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#define FUSE_WOA_SKU_FLAG 0x2C0
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#define FUSE_ECO_RESERVE_1 0x2C4
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#define FUSE_GCPLEX_CONFIG_FUSE 0x2C8
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#define FUSE_GPU_VPR_AUTO_FETCH_DIS BIT(0)
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#define FUSE_GPU_VPR_ENABLED BIT(1)
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#define FUSE_GPU_WPR_ENABLED BIT(2)
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#define FUSE_PRODUCTION_MONTH 0x2CC
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#define FUSE_RAM_REPAIR_INDICATOR 0x2D0
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#define FUSE_TSENSOR9_CALIB 0x2D4
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@@ -223,7 +226,7 @@
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#define FUSE_OPT_GPU_DISABLE_CP1 0x2F0
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#define FUSE_SPARE_ENDIS 0x2F4
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#define FUSE_ECO_RESERVE_0 0x2F8
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#define FUSE_RESERVED_CALIB0 0x304
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#define FUSE_RESERVED_CALIB0 0x304 // GPCPLL ADC Calibration.
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#define FUSE_RESERVED_CALIB1 0x308
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#define FUSE_OPT_GPU_TPC0_DISABLE 0x30C
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#define FUSE_OPT_GPU_TPC0_DISABLE_CP1 0x310
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@@ -38,6 +38,7 @@
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#define SOR1_BASE 0x54580000
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#define GPU_BASE 0x57000000
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#define GPU_USER_BASE 0x58000000
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#define PG_BASE 0x60000000
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#define RES_SEMAPH_BASE 0x60001000
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#define ARB_SEMAPH_BASE 0x60002000
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#define ARB_PRI_BASE 0x60003000
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@@ -114,6 +115,7 @@
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#define SOR1(off) MMIO_REG32(SOR1_BASE, off)
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#define GPU(off) MMIO_REG32(GPU_BASE, off)
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#define GPU_USER(off) MMIO_REG32(GPU_USER_BASE, off)
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#define PG(off) MMIO_REG32(PG_BASE, off)
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#define ARB_PRI(off) MMIO_REG32(ARB_PRI_BASE, off)
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#define ICTLR(cidx, off) MMIO_REG32(ICTLR_BASE + (0x100 * (cidx)), off)
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#define TMR(off) MMIO_REG32(TMR_BASE, off)
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@@ -376,4 +378,12 @@
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#define NVDEC_SA_KEYSLOT_OTF 0x210C
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#define NVDEC_SA_KEYSLOT_GLOBAL_RW 0x2118
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#define NVDEC_VPR_ALL_OTF_GOTO_VPR 0x211C
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/* PG registers */
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#define PG_UP_TAG 0x0 // Changes depending on what does the reg read request.
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#define TAG_PID_CCPLEX 0x55555555
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#define TAG_PID_BPMP 0xAAAAAAAA
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#define TAG_PID_COP2 0x99999999
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#define TAG_PID_OTHER 0xCCCCCCCC
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#endif
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