bdk: refactor several comments and defines
This commit is contained in:
@@ -1,5 +1,5 @@
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/*
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/*
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* Touch driver for Nintendo Switch's STM FingerTip S (4CD60D) touch controller
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* Touch driver for Nintendo Switch's STM FingerTip S (FTM4CD60DA1BE/FTM4CD50TA1BE) touch controller
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*
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*
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* Copyright (c) 2018 langerhans
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* Copyright (c) 2018 langerhans
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* Copyright (c) 2018-2023 CTCaer
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* Copyright (c) 2018-2023 CTCaer
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@@ -74,6 +74,7 @@ void mc_config_carveout()
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SEC_CARVEOUT_CFG_WR_NS;
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SEC_CARVEOUT_CFG_WR_NS;
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}
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}
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// SDMMC, TSEC, XUSB and probably more need it to access < DRAM_START.
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void mc_enable_ahb_redirect()
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void mc_enable_ahb_redirect()
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{
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{
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// Enable ARC_CLK_OVR_ON.
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// Enable ARC_CLK_OVR_ON.
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@@ -19,6 +19,8 @@
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#ifndef __BQ24193_H_
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#ifndef __BQ24193_H_
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#define __BQ24193_H_
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#define __BQ24193_H_
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#include <utils/types.h>
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#define BQ24193_I2C_ADDR 0x6B
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#define BQ24193_I2C_ADDR 0x6B
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// REG 0 masks.
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// REG 0 masks.
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@@ -34,6 +34,8 @@
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#define FUSE_PRIV2INTFC 0x20
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#define FUSE_PRIV2INTFC 0x20
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#define FUSE_FUSEBYPASS 0x24
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#define FUSE_FUSEBYPASS 0x24
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#define FUSE_PRIVATEKEYDISABLE 0x28
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#define FUSE_PRIVATEKEYDISABLE 0x28
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#define FUSE_PRIVKEY_DISABLE BIT(0)
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#define FUSE_PRIVKEY_TZ_STICKY_BIT BIT(4)
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#define FUSE_DISABLEREGPROGRAM 0x2C
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#define FUSE_DISABLEREGPROGRAM 0x2C
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#define FUSE_WRITE_ACCESS_SW 0x30
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#define FUSE_WRITE_ACCESS_SW 0x30
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#define FUSE_PWR_GOOD_SW 0x34
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#define FUSE_PWR_GOOD_SW 0x34
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@@ -266,6 +266,9 @@ static void _config_se_brom()
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// Try to set SBK from fuses. If patched, skip.
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// Try to set SBK from fuses. If patched, skip.
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fuse_set_sbk();
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fuse_set_sbk();
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// Make SBK unreadable.
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//FUSE(FUSE_PRIVATEKEYDISABLE) = FUSE_PRIVKEY_TZ_STICKY_BIT | FUSE_PRIVKEY_DISABLE;
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// Lock SSK (although it's not set and unused anyways).
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// Lock SSK (although it's not set and unused anyways).
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// se_key_acc_ctrl(15, SE_KEY_TBL_DIS_KEYREAD_FLAG);
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// se_key_acc_ctrl(15, SE_KEY_TBL_DIS_KEYREAD_FLAG);
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@@ -365,9 +368,8 @@ void hw_init()
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bool tegra_t210 = hw_get_chip_id() == GP_HIDREV_MAJOR_T210;
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bool tegra_t210 = hw_get_chip_id() == GP_HIDREV_MAJOR_T210;
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bool nx_hoag = fuse_read_hw_type() == FUSE_NX_HW_TYPE_HOAG;
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bool nx_hoag = fuse_read_hw_type() == FUSE_NX_HW_TYPE_HOAG;
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// Bootrom stuff we skipped by going through rcm.
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// Bootrom stuff we might skipped by going through rcm.
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_config_se_brom();
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_config_se_brom();
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//FUSE(FUSE_PRIVATEKEYDISABLE) = 0x11;
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// Unset APB2JTAG_OVERRIDE_EN and OBS_OVERRIDE_EN.
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// Unset APB2JTAG_OVERRIDE_EN and OBS_OVERRIDE_EN.
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SYSREG(AHB_AHB_SPARE_REG) &= 0xFFFFFF9F;
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SYSREG(AHB_AHB_SPARE_REG) &= 0xFFFFFF9F;
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@@ -422,9 +424,10 @@ void hw_init()
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// Set BPMP/SCLK to PLLP_OUT (408MHz).
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// Set BPMP/SCLK to PLLP_OUT (408MHz).
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CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003333;
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CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003333;
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// Power on T210B01 shadow TZRAM and lock the reg.
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// Disable T210B01 TZRAM power-gating and lock the reg.
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if (!tegra_t210)
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if (!tegra_t210)
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{
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{
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// This is not actually needed since it's done by bootrom. The read locks are extra.
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PMC(APBDEV_PMC_TZRAM_PWR_CNTRL) &= ~PMC_TZRAM_PWR_CNTRL_SD;
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PMC(APBDEV_PMC_TZRAM_PWR_CNTRL) &= ~PMC_TZRAM_PWR_CNTRL_SD;
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PMC(APBDEV_PMC_TZRAM_NON_SEC_DISABLE) = PMC_TZRAM_DISABLE_REG_WRITE | PMC_TZRAM_DISABLE_REG_READ;
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PMC(APBDEV_PMC_TZRAM_NON_SEC_DISABLE) = PMC_TZRAM_DISABLE_REG_WRITE | PMC_TZRAM_DISABLE_REG_READ;
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PMC(APBDEV_PMC_TZRAM_SEC_DISABLE) = PMC_TZRAM_DISABLE_REG_WRITE | PMC_TZRAM_DISABLE_REG_READ;
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PMC(APBDEV_PMC_TZRAM_SEC_DISABLE) = PMC_TZRAM_DISABLE_REG_WRITE | PMC_TZRAM_DISABLE_REG_READ;
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@@ -154,6 +154,8 @@
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#define APBDEV_PMC_SCRATCH188 0x810
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#define APBDEV_PMC_SCRATCH188 0x810
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#define APBDEV_PMC_SCRATCH190 0x818
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#define APBDEV_PMC_SCRATCH190 0x818
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#define APBDEV_PMC_SCRATCH200 0x840
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#define APBDEV_PMC_SCRATCH200 0x840
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#define PMC_NX_PANIC_SAFE_MODE 0x20
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#define PMC_NX_PANIC_BYPASS_FUSES 0x21
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#define APBDEV_PMC_SCRATCH201 0x844
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#define APBDEV_PMC_SCRATCH201 0x844
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#define APBDEV_PMC_SCRATCH250 0x908
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#define APBDEV_PMC_SCRATCH250 0x908
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#define APBDEV_PMC_SECURE_SCRATCH108 0xB08
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#define APBDEV_PMC_SECURE_SCRATCH108 0xB08
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@@ -21,6 +21,8 @@
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#include <storage/emmc.h>
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#include <storage/emmc.h>
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#include <storage/sdmmc.h>
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#include <storage/sdmmc.h>
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#define NAND_PATROL_SECTOR 0xC20
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typedef struct _nx_emmc_cal0_spk_t
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typedef struct _nx_emmc_cal0_spk_t
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{
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{
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u16 unk0;
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u16 unk0;
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@@ -65,13 +67,18 @@ typedef struct _nx_emmc_cal0_spk_t
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typedef struct _nx_emmc_cal0_t
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typedef struct _nx_emmc_cal0_t
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{
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{
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// Header.
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u32 magic; // 'CAL0'.
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u32 magic; // 'CAL0'.
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u32 version;
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u32 version;
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u32 body_size;
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u32 body_size;
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u16 model;
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u16 model;
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u16 update_cnt;
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u16 update_cnt;
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u8 pad_crc16_0[0x10];
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u8 pad_crc16_hdr[0x10];
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// SHA256 for body.
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u8 body_sha256[0x20];
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u8 body_sha256[0x20];
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// Body.
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char cfg_id1[0x1E];
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char cfg_id1[0x1E];
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u8 crc16_pad1[2];
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u8 crc16_pad1[2];
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u8 rsvd0[0x20];
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u8 rsvd0[0x20];
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@@ -225,6 +232,7 @@ typedef struct _nx_emmc_cal0_t
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// 10.0.0 and up.
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// 10.0.0 and up.
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u8 console_6axis_sensor_mount_type;
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u8 console_6axis_sensor_mount_type;
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u8 crc16_pad61[0xF];
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} __attribute__((packed)) nx_emmc_cal0_t;
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} __attribute__((packed)) nx_emmc_cal0_t;
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int nx_emmc_bis_read(u32 sector, u32 count, void *buff);
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int nx_emmc_bis_read(u32 sector, u32 count, void *buff);
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@@ -21,6 +21,7 @@
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#include <soc/t210.h>
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#include <soc/t210.h>
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#include <thermal/tmp451.h>
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#include <thermal/tmp451.h>
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// Remote Sensor.
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u16 tmp451_get_soc_temp(bool intenger)
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u16 tmp451_get_soc_temp(bool intenger)
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{
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{
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u8 val;
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u8 val;
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@@ -37,6 +38,7 @@ u16 tmp451_get_soc_temp(bool intenger)
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return temp;
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return temp;
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}
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}
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// Local Sensor.
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u16 tmp451_get_pcb_temp(bool intenger)
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u16 tmp451_get_pcb_temp(bool intenger)
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{
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{
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u8 val;
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u8 val;
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@@ -72,7 +74,7 @@ void tmp451_init()
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i2c_send_byte(I2C_1, TMP451_I2C_ADDR, TMP451_SOC_TMP_OFL_REG, 0x80); // + 0.5 oC.
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i2c_send_byte(I2C_1, TMP451_I2C_ADDR, TMP451_SOC_TMP_OFL_REG, 0x80); // + 0.5 oC.
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}
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}
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// Set conversion rate to 32/s and make a read to update the reg.
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// Set conversion rate to 31 ms and make a read to update the reg.
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i2c_send_byte(I2C_1, TMP451_I2C_ADDR, TMP451_CNV_RATE_REG, 9);
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i2c_send_byte(I2C_1, TMP451_I2C_ADDR, TMP451_CNV_RATE_REG, 9);
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tmp451_get_soc_temp(false);
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tmp451_get_soc_temp(false);
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@@ -287,7 +287,7 @@ void power_set_state(power_state_t state)
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break;
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break;
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case REBOOT_BYPASS_FUSES:
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case REBOOT_BYPASS_FUSES:
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panic(0x21); // Bypass fuse programming in package1.
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panic(PMC_NX_PANIC_BYPASS_FUSES); // Bypass fuse programming in package1.
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break;
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break;
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case POWER_OFF:
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case POWER_OFF:
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