Bump hekate to v5.5.1 and Nyx to v0.9.7

hos: Add HOS 11.0.1 support
hos: Fix sleep on modchiped Erista
2020-12-11 18:34:52 +02:00 · 2020-12-11 18:24:10 +02:00 · 2020-12-11 18:22:33 +02:00 · 2020-12-11 18:14:00 +02:00 · 2020-12-11 17:49:06 +02:00 · 2020-12-11 17:46:44 +02:00
28 changed files with 370 additions and 149 deletions
--- a/7
+++ b/7
@@ -67,11 +67,12 @@ CUSTOMDEFINES += -DBL_VER_MJ=$(BLVERSION_MAJOR) -DBL_VER_MN=$(BLVERSION_MINOR) -
 CUSTOMDEFINES += -DNYX_VER_MJ=$(NYXVERSION_MAJOR) -DNYX_VER_MN=$(NYXVERSION_MINOR) -DNYX_VER_HF=$(NYXVERSION_HOTFX) -DNYX_RESERVED=$(NYXVERSION_RSVD)
 CUSTOMDEFINES += -DGFX_INC=$(GFX_INC) -DFFCFG_INC=$(FFCFG_INC)

-# 0: UART_A, 1: UART_B.
-#CUSTOMDEFINES += -DDEBUG_UART_PORT=0
-
 #CUSTOMDEFINES += -DDEBUG

+# UART Logging: Max baudrate 12.5M.
+# DEBUG_UART_PORT - 0: UART_A, 1: UART_B, 2: UART_C.
+#CUSTOMDEFINES += -DDEBUG_UART_BAUDRATE=115200 -DDEBUG_UART_INVERT=0 -DDEBUG_UART_PORT=0
+
 ARCH := -march=armv4t -mtune=arm7tdmi -mthumb -mthumb-interwork
 CFLAGS = $(ARCH) -O2 -g -nostdlib -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-inline -std=gnu11 -Wall $(CUSTOMDEFINES)
 LDFLAGS = $(ARCH) -nostartfiles -lgcc -Wl,--nmagic,--gc-sections -Xlinker --defsym=IPL_LOAD_ADDR=$(IPL_LOAD_ADDR)
--- a/Versions.inc
+++ b/Versions.inc
@@ -1,11 +1,11 @@
 # IPL Version.
 BLVERSION_MAJOR := 5
 BLVERSION_MINOR := 5
-BLVERSION_HOTFX := 0
+BLVERSION_HOTFX := 1
 BLVERSION_RSVD := 0

 # Nyx Version.
 NYXVERSION_MAJOR := 0
 NYXVERSION_MINOR := 9
-NYXVERSION_HOTFX := 6
+NYXVERSION_HOTFX := 7
 NYXVERSION_RSVD := 0
--- a/bdk/gfx/di.c
+++ b/bdk/gfx/di.c
@@ -221,7 +221,7 @@ void display_init()
 	// Get Chip ID.
 	bool tegra_t210 = hw_get_chip_id() == GP_HIDREV_MAJOR_T210;

-	// T210B01: Power on SD2 regulator for supplying LD0.
+	// T210B01: Power on SD2 regulator for supplying LDO0.
 	if (!tegra_t210)
 	{
 		// Set SD2 regulator voltage.
@@ -600,11 +600,20 @@ skip_panel_deinit:

 void display_end() { _display_panel_and_hw_end(false); };

-u16 display_get_decoded_lcd_id()
+u16 display_get_decoded_panel_id()
 {
 	return _display_id;
 }

+void display_set_decoded_panel_id(u32 id)
+{
+	// Decode Display ID.
+	_display_id = ((id >> 8) & 0xFF00) | (id & 0xFF);
+
+	if ((_display_id & 0xFF) == PANEL_JDI_XXX062M)
+		_display_id = PANEL_JDI_XXX062M;
+}
+
 void display_color_screen(u32 color)
 {
 	exec_cfg((u32 *)DISPLAY_A_BASE, cfg_display_one_color, 8);
--- a/bdk/gfx/di.h
+++ b/bdk/gfx/di.h
@@ -671,10 +671,12 @@
 * 20h: InnoLux Corporation
 * 30h: AU Optronics
 * 40h: Unknown1
+ * 50h: Unknown2 (OLED? Samsung? LG?)
 *
 * Boards, Panel Size:
 * 0Fh: Icosa/Iowa, 6.2"
 * 10h: Hoag,       5.5"
+ * 20h: Unknown,    x.x"
 */

 enum
@@ -693,8 +695,9 @@ void display_init();
 void display_backlight_pwm_init();
 void display_end();

-/*! Get Display panel ID. */
-u16 display_get_decoded_lcd_id();
+/*! Get/Set Display panel ID. */
+u16  display_get_decoded_panel_id();
+void display_set_decoded_panel_id(u32 id);

 /*! Show one single color on the display. */
 void display_color_screen(u32 color);
--- a/bdk/input/joycon.c
+++ b/bdk/input/joycon.c
@@ -816,10 +816,10 @@ void jc_init_hw()
 	jc_l.uart = UART_C;
 	jc_r.uart = UART_B;

+#if !defined(DEBUG_UART_PORT) || !(DEBUG_UART_PORT)
 	if (fuse_read_hw_type() == FUSE_NX_HW_TYPE_HOAG)
 		return;

-#ifndef DEBUG_UART_PORT
 	jc_power_supply(UART_C, true);
 	jc_power_supply(UART_B, true);

--- a/bdk/libs/lv_conf.h
+++ b/bdk/libs/lv_conf.h
@@ -155,7 +155,7 @@


 /*Log settings*/
-#ifdef DEBUG_UART_PORT
+#ifdef DEBUG_UART_LV_LOG
 #  define USE_LV_LOG        1   /*Enable/disable the log module*/
 #else
 #  define USE_LV_LOG        0   /*Enable/disable the log module*/
--- a/bdk/libs/lvgl/lv_misc/lv_log.c
+++ b/bdk/libs/lvgl/lv_misc/lv_log.c
@@ -63,7 +63,7 @@ void lv_log_add(lv_log_level_t level, const char * file, int line, const char *

    if(level >= LV_LOG_LEVEL) {

-#if LV_LOG_PRINTF
+#if LV_LOG_PRINTF && defined(DEBUG_UART_PORT)
        static const char * lvl_prefix[] = {"Trace", "Info", "Warn", "Error"};
        char *log = (char *)malloc(0x1000);
        s_printf(log, "%s: %s \t(%s #%d)\r\n", lvl_prefix[level], dsc,  file, line);
--- a/bdk/power/max7762x.c
+++ b/bdk/power/max7762x.c
@@ -57,7 +57,7 @@ static const max77620_regulator_t _pmic_regulators[] = {
 	{ REGULATOR_LDO, "ldo1", 0x00,  25000, 800000, 1050000, 1050000, MAX77620_REG_LDO1_CFG, MAX77620_REG_LDO1_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00,  MAX77620_REG_FPS_LDO1, 3, 7, 0 },
 	{ REGULATOR_LDO, "ldo2", 0x00,  50000, 800000, 1800000, 3300000, MAX77620_REG_LDO2_CFG, MAX77620_REG_LDO2_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00,  MAX77620_REG_FPS_LDO2, 3, 7, 0 },
 	{ REGULATOR_LDO, "ldo3", 0x00,  50000, 800000, 3100000, 3100000, MAX77620_REG_LDO3_CFG, MAX77620_REG_LDO3_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00,  MAX77620_REG_FPS_LDO3, 3, 7, 0 },
-	{ REGULATOR_LDO, "ldo4", 0x00,  12500, 800000,  850000,  850000, MAX77620_REG_LDO4_CFG, MAX77620_REG_LDO4_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00,  MAX77620_REG_FPS_LDO4, 0, 7, 1 },
+	{ REGULATOR_LDO, "ldo4", 0x00,  12500, 800000,  850000, 1000000, MAX77620_REG_LDO4_CFG, MAX77620_REG_LDO4_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00,  MAX77620_REG_FPS_LDO4, 0, 7, 1 },
 	{ REGULATOR_LDO, "ldo5", 0x00,  50000, 800000, 1800000, 1800000, MAX77620_REG_LDO5_CFG, MAX77620_REG_LDO5_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00,  MAX77620_REG_FPS_LDO5, 3, 7, 0 },
 	{ REGULATOR_LDO, "ldo6", 0x00,  50000, 800000, 2900000, 2900000, MAX77620_REG_LDO6_CFG, MAX77620_REG_LDO6_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00,  MAX77620_REG_FPS_LDO6, 3, 7, 0 },
 	{ REGULATOR_LDO, "ldo7", 0x00,  50000, 800000, 1050000, 1050000, MAX77620_REG_LDO7_CFG, MAX77620_REG_LDO7_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00,  MAX77620_REG_FPS_LDO7, 1, 4, 3 },
--- a/bdk/sec/se.c
+++ b/bdk/sec/se.c
@@ -1,6 +1,6 @@
 /*
 * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018 CTCaer
+ * Copyright (c) 2018-2020 CTCaer
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
@@ -21,6 +21,7 @@
 #include "se_t210.h"
 #include <mem/heap.h>
 #include <soc/bpmp.h>
+#include <soc/pmc.h>
 #include <soc/t210.h>
 #include <utils/util.h>

@@ -160,9 +161,11 @@ static int _se_execute_one_block(u32 op, void *dst, u32 dst_size, const void *sr

 static void _se_aes_ctr_set(void *ctr)
 {
-	u32 *data = (u32 *)ctr;
-	for (u32 i = 0; i < 4; i++)
-		SE(SE_CRYPTO_CTR_REG_OFFSET + 4 * i) = data[i];
+	u32 data[TEGRA_SE_AES_BLOCK_SIZE / 4];
+	memcpy(data, ctr, TEGRA_SE_AES_BLOCK_SIZE);
+
+	for (u32 i = 0; i < (TEGRA_SE_AES_BLOCK_SIZE / 4); i++)
+		SE(SE_CRYPTO_CTR_REG_OFFSET + (4 * i)) = data[i];
 }

 void se_rsa_acc_ctrl(u32 rs, u32 flags)
@@ -190,8 +193,10 @@ u32 se_key_acc_ctrl_get(u32 ks)

 void se_aes_key_set(u32 ks, void *key, u32 size)
 {
-	u32 *data = (u32 *)key;
-	for (u32 i = 0; i < size / 4; i++)
+	u32 data[TEGRA_SE_AES_MAX_KEY_SIZE / 4];
+	memcpy(data, key, size);
+
+	for (u32 i = 0; i < (size / 4); i++)
 	{
 		SE(SE_KEYTABLE_REG_OFFSET) = SE_KEYTABLE_SLOT(ks) | i;
 		SE(SE_KEYTABLE_DATA0_REG_OFFSET) = data[i];
@@ -200,9 +205,10 @@ void se_aes_key_set(u32 ks, void *key, u32 size)

 void se_aes_iv_set(u32 ks, void *iv)
 {
-	u32 *data = (u32 *)iv;
+	u32 data[TEGRA_SE_AES_BLOCK_SIZE / 4];
+	memcpy(data, iv, TEGRA_SE_AES_BLOCK_SIZE);

-	for (u32 i = 0; i < TEGRA_SE_AES_MIN_KEY_SIZE / 4; i++)
+	for (u32 i = 0; i < (TEGRA_SE_AES_BLOCK_SIZE / 4); i++)
 	{
 		SE(SE_KEYTABLE_REG_OFFSET) = SE_KEYTABLE_SLOT(ks) | SE_KEYTABLE_QUAD(QUAD_ORG_IV) | i;
 		SE(SE_KEYTABLE_DATA0_REG_OFFSET) = data[i];
@@ -211,17 +217,20 @@ void se_aes_iv_set(u32 ks, void *iv)

 void se_aes_key_get(u32 ks, void *key, u32 size)
 {
-	u32 *data = (u32 *)key;
-	for (u32 i = 0; i < size / 4; i++)
+	u32 data[TEGRA_SE_AES_MAX_KEY_SIZE / 4];
+
+	for (u32 i = 0; i < (size / 4); i++)
 	{
 		SE(SE_KEYTABLE_REG_OFFSET) = SE_KEYTABLE_SLOT(ks) | i;
 		data[i] = SE(SE_KEYTABLE_DATA0_REG_OFFSET);
 	}
+
+	memcpy(key, data, size);
 }

 void se_aes_key_clear(u32 ks)
 {
-	for (u32 i = 0; i < TEGRA_SE_AES_MAX_KEY_SIZE / 4; i++)
+	for (u32 i = 0; i < (TEGRA_SE_AES_MAX_KEY_SIZE / 4); i++)
 	{
 		SE(SE_KEYTABLE_REG_OFFSET) = SE_KEYTABLE_SLOT(ks) | i;
 		SE(SE_KEYTABLE_DATA0_REG_OFFSET) = 0;
@@ -230,7 +239,7 @@ void se_aes_key_clear(u32 ks)

 void se_aes_iv_clear(u32 ks)
 {
-	for (u32 i = 0; i < TEGRA_SE_AES_MIN_KEY_SIZE / 4; i++)
+	for (u32 i = 0; i < (TEGRA_SE_AES_BLOCK_SIZE / 4); i++)
 	{
 		SE(SE_KEYTABLE_REG_OFFSET) = SE_KEYTABLE_SLOT(ks) | SE_KEYTABLE_QUAD(QUAD_ORG_IV) | i;
 		SE(SE_KEYTABLE_DATA0_REG_OFFSET) = 0;
@@ -365,10 +374,10 @@ int se_aes_xts_crypt(u32 ks1, u32 ks2, u32 enc, u64 sec, void *dst, void *src, u
 int se_calc_sha256(void *hash, u32 *msg_left, const void *src, u32 src_size, u64 total_size, u32 sha_cfg, bool is_oneshot)
 {
 	int res;
-	u32 *hash32 = (u32 *)hash;
+	u32 hash32[TEGRA_SE_SHA_256_SIZE / 4];

 	//! TODO: src_size must be 512 bit aligned if continuing and not last block for SHA256.
-	if (src_size > 0xFFFFFF || (u32)hash % 4 || !hash) // Max 16MB - 1 chunks and aligned x4 hash buffer.
+	if (src_size > 0xFFFFFF || !hash) // Max 16MB - 1 chunks and aligned x4 hash buffer.
 		return 0;

 	// Setup config for SHA256.
@@ -400,7 +409,8 @@ int se_calc_sha256(void *hash, u32 *msg_left, const void *src, u32 src_size, u64
 		SE(SE_SHA_MSG_LEFT_1_REG_OFFSET) = msg_left[1];

 		// Restore hash reg.
-		for (u32 i = 0; i < 8; i++)
+		memcpy(hash32, hash, TEGRA_SE_SHA_256_SIZE);
+		for (u32 i = 0; i < (TEGRA_SE_SHA_256_SIZE / 4); i++)
 			SE(SE_HASH_RESULT_REG_OFFSET + (i << 2)) = byte_swap_32(hash32[i]);
 	}

@@ -417,8 +427,9 @@ int se_calc_sha256(void *hash, u32 *msg_left, const void *src, u32 src_size, u64
 		}

 		// Copy output hash.
-		for (u32 i = 0; i < 8; i++)
+		for (u32 i = 0; i < (TEGRA_SE_SHA_256_SIZE / 4); i++)
 			hash32[i] = byte_swap_32(SE(SE_HASH_RESULT_REG_OFFSET + (i << 2)));
+		memcpy(hash, hash32, TEGRA_SE_SHA_256_SIZE);
 	}

 	return res;
@@ -431,7 +442,7 @@ int se_calc_sha256_oneshot(void *hash, const void *src, u32 src_size)

 int se_calc_sha256_finalize(void *hash, u32 *msg_left)
 {
-	u32 *hash32 = (u32 *)hash;
+	u32 hash32[TEGRA_SE_SHA_256_SIZE / 4];
 	int res = _se_execute_finalize();

 	// Backup message left.
@@ -442,8 +453,9 @@ int se_calc_sha256_finalize(void *hash, u32 *msg_left)
 	}

 	// Copy output hash.
-	for (u32 i = 0; i < 8; i++)
+	for (u32 i = 0; i < (TEGRA_SE_SHA_256_SIZE / 4); i++)
 		hash32[i] = byte_swap_32(SE(SE_HASH_RESULT_REG_OFFSET + (i << 2)));
+	memcpy(hash, hash32, TEGRA_SE_SHA_256_SIZE);

 	return res;
 }
@@ -501,7 +513,7 @@ void se_get_aes_keys(u8 *buf, u8 *keys, u32 keysize)

 	// Save SRK to PMC secure scratches.
 	SE(SE_CONTEXT_SAVE_CONFIG_REG_OFFSET) = SE_CONTEXT_SAVE_SRC(SRK);
-	SE(0x80) = 0; // SE_CRYPTO_LAST_BLOCK
+	SE(SE_CRYPTO_LAST_BLOCK) = 0;
 	_se_execute_oneshot(OP_CTX_SAVE, NULL, 0, NULL, 0);

 	// End context save.
@@ -510,10 +522,10 @@ void se_get_aes_keys(u8 *buf, u8 *keys, u32 keysize)

 	// Get SRK.
 	u32 srk[4];
-	srk[0] = PMC(0xC0);
-	srk[1] = PMC(0xC4);
-	srk[2] = PMC(0x224);
-	srk[3] = PMC(0x228);
+	srk[0] = PMC(APBDEV_PMC_SECURE_SCRATCH4);
+	srk[1] = PMC(APBDEV_PMC_SECURE_SCRATCH5);
+	srk[2] = PMC(APBDEV_PMC_SECURE_SCRATCH6);
+	srk[3] = PMC(APBDEV_PMC_SECURE_SCRATCH7);

 	// Decrypt context.
 	se_aes_key_clear(3);
--- a/bdk/sec/se_t210.h
+++ b/bdk/sec/se_t210.h
@@ -265,6 +265,10 @@
 #define TEGRA_SE_AES_MIN_KEY_SIZE	16
 #define TEGRA_SE_AES_MAX_KEY_SIZE	32
 #define TEGRA_SE_AES_IV_SIZE		16
+#define TEGRA_SE_SHA_512_SIZE		64
+#define TEGRA_SE_SHA_384_SIZE		48
+#define TEGRA_SE_SHA_256_SIZE		32
+#define TEGRA_SE_SHA_192_SIZE		24
 #define TEGRA_SE_RNG_IV_SIZE		16
 #define TEGRA_SE_RNG_DT_SIZE		16
 #define TEGRA_SE_RNG_KEY_SIZE		16
--- a/bdk/soc/hw_init.c
+++ b/bdk/soc/hw_init.c
@@ -285,6 +285,10 @@ static void _config_se_brom()

 static void _config_regulators(bool tegra_t210)
 {
+	// Set RTC/AO domain to POR voltage.
+	if (tegra_t210)
+		max77620_regulator_set_voltage(REGULATOR_LDO4, 1000000);
+
 	// Disable low battery shutdown monitor.
 	max77620_low_battery_monitor_config(false);

@@ -373,7 +377,8 @@ void hw_init()

 #ifdef DEBUG_UART_PORT
 	clock_enable_uart(DEBUG_UART_PORT);
-	uart_init(DEBUG_UART_PORT, 115200);
+	uart_init(DEBUG_UART_PORT, DEBUG_UART_BAUDRATE);
+	uart_invert(DEBUG_UART_PORT, DEBUG_UART_INVERT, UART_INVERT_TXD);
 #endif

 	// Enable Dynamic Voltage and Frequency Scaling device clock.
@@ -396,12 +401,12 @@ void hw_init()
 	// Initialize I2C1 for various power related devices.
 	i2c_init(I2C_1);

-	// Enable charger in case it's disabled.
-	bq24193_enable_charger();
-
 	// Initialize various regulators based on Erista/Mariko platform.
 	_config_regulators(tegra_t210);

+	// Enable charger in case it's disabled.
+	bq24193_enable_charger();
+
 	_config_pmc_scratch(); // Missing from 4.x+

 	// Set BPMP/SCLK to PLLP_OUT (408MHz).
--- a/bdk/soc/i2c.c
+++ b/bdk/soc/i2c.c
@@ -136,10 +136,10 @@ static int _i2c_send_single(u32 i2c_idx, u32 dev_addr, u8 *buf, u32 size)
 	// Initiate transaction on normal mode.
 	base[I2C_CNFG] = (base[I2C_CNFG] & 0xFFFFF9FF) | NORMAL_MODE_GO;

-	u32 timeout = get_tmr_ms() + 400; // Actual for max 8 bytes at 100KHz is 0.74ms.
+	u32 timeout = get_tmr_us() + 200000; // Actual for max 8 bytes at 100KHz is 0.74ms.
 	while (base[I2C_STATUS] & I2C_STATUS_BUSY)
 	{
-		if (get_tmr_ms() > timeout)
+		if (get_tmr_us() > timeout)
 			return 0;
 	}

@@ -168,10 +168,10 @@ static int _i2c_recv_single(u32 i2c_idx, u8 *buf, u32 size, u32 dev_addr)
 	// Initiate transaction on normal mode.
 	base[I2C_CNFG] = (base[I2C_CNFG] & 0xFFFFF9FF) | NORMAL_MODE_GO;

-	u32 timeout = get_tmr_ms() + 400; // Actual for max 8 bytes at 100KHz is 0.74ms.
+	u32 timeout = get_tmr_us() + 200000; // Actual for max 8 bytes at 100KHz is 0.74ms.
 	while (base[I2C_STATUS] & I2C_STATUS_BUSY)
 	{
-		if (get_tmr_ms() > timeout)
+		if (get_tmr_us() > timeout)
 			return 0;
 	}

--- a/bdk/soc/pmc.h
+++ b/bdk/soc/pmc.h
@@ -40,6 +40,8 @@
 #define  PMC_SCRATCH0_MODE_CUSTOM_ALL (PMC_SCRATCH0_MODE_RECOVERY | PMC_SCRATCH0_MODE_FASTBOOT | PMC_SCRATCH0_MODE_PAYLOAD)
 #define APBDEV_PMC_SCRATCH1 0x54
 #define APBDEV_PMC_SCRATCH20 0xA0
+#define APBDEV_PMC_SECURE_SCRATCH4 0xC0
+#define APBDEV_PMC_SECURE_SCRATCH5 0xC4
 #define APBDEV_PMC_PWR_DET_VAL 0xE4
 #define  PMC_PWR_DET_SDMMC1_IO_EN BIT(12)
 #define  PMC_PWR_DET_AUDIO_HV     BIT(18)
@@ -63,6 +65,8 @@
 #define APBDEV_PMC_IO_DPD2_REQ 0x1C0
 #define APBDEV_PMC_VDDP_SEL 0x1CC
 #define APBDEV_PMC_DDR_CFG 0x1D0
+#define APBDEV_PMC_SECURE_SCRATCH6 0x224
+#define APBDEV_PMC_SECURE_SCRATCH7 0x228
 #define APBDEV_PMC_SCRATCH45 0x234
 #define APBDEV_PMC_SCRATCH46 0x238
 #define APBDEV_PMC_SCRATCH49 0x244
--- a/bdk/storage/mmc.h
+++ b/bdk/storage/mmc.h
@@ -142,7 +142,10 @@ c : clear by read
 #define R1_SWITCH_ERROR		(1 << 7)	/* sx, c */
 #define R1_EXCEPTION_EVENT	(1 << 6)	/* sr, a */
 #define R1_APP_CMD		(1 << 5)	/* sr, c */
+#define R1_SKIP_STATE_CHECK	(1 << 4)	/* Custom state to skip expected state check */
+#define R1_AKE_SEQ_ERROR	(1 << 3)

+/* R1_CURRENT_STATE 12:9 */
 #define R1_STATE_IDLE	0
 #define R1_STATE_READY	1
 #define R1_STATE_IDENT	2
--- a/bdk/storage/sd.h
+++ b/bdk/storage/sd.h
@@ -34,14 +34,16 @@
 #define SD_APP_SEND_SCR          51   /* adtc                    R1  */

 /* OCR bit definitions */
+#define SD_OCR_CCS          (1 << 30)    /* Card Capacity Status */
+#define SD_OCR_XPC          (1 << 28)    /* SDXC power control */
 #define SD_OCR_S18R         (1 << 24)    /* 1.8V switching request */
 #define SD_ROCR_S18A        SD_OCR_S18R  /* 1.8V switching accepted by card */
-#define SD_OCR_XPC          (1 << 28)    /* SDXC power control */
-#define SD_OCR_CCS          (1 << 30)    /* Card Capacity Status */
 #define SD_OCR_VDD_27_34    (0x7F << 15) /* VDD voltage 2.7 ~ 3.4 */
 #define SD_OCR_VDD_32_33    (1 << 20)	 /* VDD voltage 3.2 ~ 3.3 */
 #define SD_OCR_VDD_18       (1 << 7)	 /* VDD voltage 1.8 */

+#define SD_VHD_27_36        (1 << 8)     /* VDD voltage 2.7 ~ 3.6 */
+
 /*
 * SD_SWITCH argument format:
 *
--- a/bdk/storage/sdmmc.c
+++ b/bdk/storage/sdmmc.c
@@ -45,7 +45,7 @@ static inline u32 unstuff_bits(u32 *resp, u32 start, u32 size)
 * Common functions for SD and MMC.
 */

-static int _sdmmc_storage_check_result(u32 res)
+static int _sdmmc_storage_check_card_status(u32 res)
 {
 	//Error mask:
 	//TODO: R1_SWITCH_ERROR can be skipped for certain card types.
@@ -66,15 +66,15 @@ static int _sdmmc_storage_execute_cmd_type1_ex(sdmmc_storage_t *storage, u32 *re
 {
 	sdmmc_cmd_t cmdbuf;
 	sdmmc_init_cmd(&cmdbuf, cmd, arg, SDMMC_RSP_TYPE_1, check_busy);
-	if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, 0, 0))
+	if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, NULL, NULL))
 		return 0;

 	sdmmc_get_rsp(storage->sdmmc, resp, 4, SDMMC_RSP_TYPE_1);
 	if (mask)
 		*resp &= ~mask;

-	if (_sdmmc_storage_check_result(*resp))
-		if (expected_state == 0x10 || R1_CURRENT_STATE(*resp) == expected_state)
+	if (_sdmmc_storage_check_card_status(*resp))
+		if (expected_state == R1_SKIP_STATE_CHECK || R1_CURRENT_STATE(*resp) == expected_state)
 			return 1;

 	return 0;
@@ -91,34 +91,34 @@ static int _sdmmc_storage_go_idle_state(sdmmc_storage_t *storage)
 	sdmmc_cmd_t cmd;
 	sdmmc_init_cmd(&cmd, MMC_GO_IDLE_STATE, 0, SDMMC_RSP_TYPE_0, 0);

-	return sdmmc_execute_cmd(storage->sdmmc, &cmd, 0, 0);
+	return sdmmc_execute_cmd(storage->sdmmc, &cmd, NULL, NULL);
 }

 static int _sdmmc_storage_get_cid(sdmmc_storage_t *storage, void *buf)
 {
 	sdmmc_cmd_t cmd;
 	sdmmc_init_cmd(&cmd, MMC_ALL_SEND_CID, 0, SDMMC_RSP_TYPE_2, 0);
-	if (!sdmmc_execute_cmd(storage->sdmmc, &cmd, 0, 0))
+	if (!sdmmc_execute_cmd(storage->sdmmc, &cmd, NULL, NULL))
 		return 0;

-	sdmmc_get_rsp(storage->sdmmc, buf, 0x10, SDMMC_RSP_TYPE_2);
+	sdmmc_get_rsp(storage->sdmmc, buf, 16, SDMMC_RSP_TYPE_2);

 	return 1;
 }

 static int _sdmmc_storage_select_card(sdmmc_storage_t *storage)
 {
-	return _sdmmc_storage_execute_cmd_type1(storage, MMC_SELECT_CARD, storage->rca << 16, 1, 0x10);
+	return _sdmmc_storage_execute_cmd_type1(storage, MMC_SELECT_CARD, storage->rca << 16, 1, R1_SKIP_STATE_CHECK);
 }

 static int _sdmmc_storage_get_csd(sdmmc_storage_t *storage, void *buf)
 {
 	sdmmc_cmd_t cmdbuf;
 	sdmmc_init_cmd(&cmdbuf, MMC_SEND_CSD, storage->rca << 16, SDMMC_RSP_TYPE_2, 0);
-	if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, 0, 0))
+	if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, NULL, NULL))
 		return 0;

-	sdmmc_get_rsp(storage->sdmmc, buf, 0x10, SDMMC_RSP_TYPE_2);
+	sdmmc_get_rsp(storage->sdmmc, buf, 16, SDMMC_RSP_TYPE_2);

 	return 1;
 }
@@ -306,7 +306,7 @@ static int _mmc_storage_get_op_cond_inner(sdmmc_storage_t *storage, u32 *pout, u
 	}

 	sdmmc_init_cmd(&cmd, MMC_SEND_OP_COND, arg, SDMMC_RSP_TYPE_3, 0);
-	if (!sdmmc_execute_cmd(storage->sdmmc, &cmd, 0, 0))
+	if (!sdmmc_execute_cmd(storage->sdmmc, &cmd, NULL, NULL))
 		return 0;

 	return sdmmc_get_rsp(storage->sdmmc, pout, 4, SDMMC_RSP_TYPE_3);
@@ -340,7 +340,7 @@ static int _mmc_storage_get_op_cond(sdmmc_storage_t *storage, u32 power)

 static int _mmc_storage_set_relative_addr(sdmmc_storage_t *storage)
 {
-	return _sdmmc_storage_execute_cmd_type1(storage, MMC_SET_RELATIVE_ADDR, storage->rca << 16, 0, 0x10);
+	return _sdmmc_storage_execute_cmd_type1(storage, MMC_SET_RELATIVE_ADDR, storage->rca << 16, 0, R1_SKIP_STATE_CHECK);
 }

 static void _mmc_storage_parse_cid(sdmmc_storage_t *storage)
@@ -432,19 +432,19 @@ static int _mmc_storage_get_ext_csd(sdmmc_storage_t *storage, void *buf)
 	reqbuf.is_multi_block = 0;
 	reqbuf.is_auto_cmd12 = 0;

-	if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, 0))
+	if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, NULL))
 		return 0;

 	u32 tmp = 0;
 	sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1);
 	_mmc_storage_parse_ext_csd(storage, buf);

-	return _sdmmc_storage_check_result(tmp);
+	return _sdmmc_storage_check_card_status(tmp);
 }

 static int _mmc_storage_switch(sdmmc_storage_t *storage, u32 arg)
 {
-	return _sdmmc_storage_execute_cmd_type1(storage, MMC_SWITCH, arg, 1, 0x10);
+	return _sdmmc_storage_execute_cmd_type1(storage, MMC_SWITCH, arg, 1, R1_SKIP_STATE_CHECK);
 }

 static int _mmc_storage_switch_buswidth(sdmmc_storage_t *storage, u32 bus_width)
@@ -688,53 +688,60 @@ static int _sd_storage_execute_app_cmd_type1(sdmmc_storage_t *storage, u32 *resp
 static int _sd_storage_send_if_cond(sdmmc_storage_t *storage)
 {
 	sdmmc_cmd_t cmdbuf;
-	sdmmc_init_cmd(&cmdbuf, SD_SEND_IF_COND, 0x1AA, SDMMC_RSP_TYPE_5, 0);
-	if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, 0, 0))
+	u16 vhd_pattern = SD_VHD_27_36 | 0xAA;
+	sdmmc_init_cmd(&cmdbuf, SD_SEND_IF_COND, vhd_pattern, SDMMC_RSP_TYPE_5, 0);
+	if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, NULL, NULL))
 		return 1; // The SD Card is version 1.X

+	// Card version is >= 2.0, parse results.
 	u32 resp = 0;
 	if (!sdmmc_get_rsp(storage->sdmmc, &resp, 4, SDMMC_RSP_TYPE_5))
-		return 2;
+		return 2; // Failed.

-	return (resp & 0xFF) == 0xAA ? 0 : 2;
+	// Check if VHD was accepted and pattern was properly returned.
+	if ((resp & 0xFFF) == vhd_pattern)
+		return 0;
+
+	// Failed.
+	return 2;
 }

-static int _sd_storage_get_op_cond_once(sdmmc_storage_t *storage, u32 *cond, int is_version_1, int bus_low_voltage_support)
+static int _sd_storage_get_op_cond_once(sdmmc_storage_t *storage, u32 *cond, int is_version_1, int bus_uhs_support)
 {
 	sdmmc_cmd_t cmdbuf;
 	// Support for Current > 150mA
-	u32 arg = (~is_version_1 & 1) ? SD_OCR_XPC : 0;
+	u32 arg = !is_version_1 ? SD_OCR_XPC : 0;
 	// Support for handling block-addressed SDHC cards
-	arg	|= (~is_version_1 & 1) ? SD_OCR_CCS : 0;
+	arg	|= !is_version_1 ? SD_OCR_CCS : 0;
 	// Support for 1.8V
-	arg |= (bus_low_voltage_support & ~is_version_1 & 1) ? SD_OCR_S18R : 0;
+	arg |= (bus_uhs_support && !is_version_1) ? SD_OCR_S18R : 0;
 	// This is needed for most cards. Do not set bit7 even if 1.8V is supported.
 	arg |= SD_OCR_VDD_32_33;
 	sdmmc_init_cmd(&cmdbuf, SD_APP_OP_COND, arg, SDMMC_RSP_TYPE_3, 0);
-	if (!_sd_storage_execute_app_cmd(storage, 0x10, is_version_1 ? 0x400000 : 0, &cmdbuf, 0, 0))
+	if (!_sd_storage_execute_app_cmd(storage, R1_SKIP_STATE_CHECK, is_version_1 ? R1_ILLEGAL_COMMAND : 0, &cmdbuf, NULL, NULL))
 		return 0;

 	return sdmmc_get_rsp(storage->sdmmc, cond, 4, SDMMC_RSP_TYPE_3);
 }

-static int _sd_storage_get_op_cond(sdmmc_storage_t *storage, int is_version_1, int bus_low_voltage_support)
+static int _sd_storage_get_op_cond(sdmmc_storage_t *storage, int is_version_1, int bus_uhs_support)
 {
 	u32 timeout = get_tmr_ms() + 1500;

 	while (1)
 	{
 		u32 cond = 0;
-		if (!_sd_storage_get_op_cond_once(storage, &cond, is_version_1, bus_low_voltage_support))
+		if (!_sd_storage_get_op_cond_once(storage, &cond, is_version_1, bus_uhs_support))
 			break;
 		if (cond & MMC_CARD_BUSY)
 		{
-DPRINTF("[SD] cond: %08X, lv: %d\n", cond, bus_low_voltage_support);
+DPRINTF("[SD] op cond: %08X, lv: %d\n", cond, bus_uhs_support);

 			if (cond & SD_OCR_CCS)
 				storage->has_sector_access = 1;

 			// Check if card supports 1.8V signaling.
-			if (cond & SD_ROCR_S18A && bus_low_voltage_support)
+			if (cond & SD_ROCR_S18A && bus_uhs_support)
 			{
 				//The low voltage regulator configuration is valid for SDMMC1 only.
 				if (storage->sdmmc->id == SDMMC_1 &&
@@ -771,7 +778,7 @@ static int _sd_storage_get_rca(sdmmc_storage_t *storage)

 	while (1)
 	{
-		if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, 0, 0))
+		if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, NULL, NULL))
 			break;

 		u32 resp = 0;
@@ -822,7 +829,7 @@ int _sd_storage_get_scr(sdmmc_storage_t *storage, u8 *buf)
 	reqbuf.is_multi_block = 0;
 	reqbuf.is_auto_cmd12 = 0;

-	if (!_sd_storage_execute_app_cmd(storage, R1_STATE_TRAN, 0, &cmdbuf, &reqbuf, 0))
+	if (!_sd_storage_execute_app_cmd(storage, R1_STATE_TRAN, 0, &cmdbuf, &reqbuf, NULL))
 		return 0;

 	u32 tmp = 0;
@@ -838,7 +845,7 @@ int _sd_storage_get_scr(sdmmc_storage_t *storage, u8 *buf)
 	_sd_storage_parse_scr(storage);
 	//gfx_hexdump(0, storage->raw_scr, 8);

-	return _sdmmc_storage_check_result(tmp);
+	return _sdmmc_storage_check_card_status(tmp);
 }

 int _sd_storage_switch_get(sdmmc_storage_t *storage, void *buf)
@@ -854,12 +861,12 @@ int _sd_storage_switch_get(sdmmc_storage_t *storage, void *buf)
 	reqbuf.is_multi_block = 0;
 	reqbuf.is_auto_cmd12 = 0;

-	if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, 0))
+	if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, NULL))
 		return 0;

 	u32 tmp = 0;
 	sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1);
-	return _sdmmc_storage_check_result(tmp);
+	return _sdmmc_storage_check_card_status(tmp);
 }

 int _sd_storage_switch(sdmmc_storage_t *storage, void *buf, int mode, int group, u32 arg)
@@ -878,12 +885,12 @@ int _sd_storage_switch(sdmmc_storage_t *storage, void *buf, int mode, int group,
 	reqbuf.is_multi_block = 0;
 	reqbuf.is_auto_cmd12 = 0;

-	if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, 0))
+	if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, NULL))
 		return 0;

 	u32 tmp = 0;
 	sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1);
-	return _sdmmc_storage_check_result(tmp);
+	return _sdmmc_storage_check_card_status(tmp);
 }

 void _sd_storage_set_current_limit(sdmmc_storage_t *storage, u16 current_limit, u8 *buf)
@@ -1057,6 +1064,44 @@ int _sd_storage_enable_hs_high_volt(sdmmc_storage_t *storage, u8 *buf)
 	return sdmmc_setup_clock(storage->sdmmc, SDHCI_TIMING_SD_HS25);
 }

+u32 sd_storage_ssr_get_au(sdmmc_storage_t *storage)
+{
+	u32 au_size = storage->ssr.uhs_au_size;
+
+	if (!au_size)
+		au_size = storage->ssr.au_size;
+
+	if (au_size <= 10)
+	{
+		u32 shift = au_size;
+		au_size = shift ? 8 : 0;
+    	au_size <<= shift;
+	}
+	else
+	{
+		switch (au_size)
+		{
+		case 11:
+			au_size = 12288;
+			break;
+		case 12:
+			au_size = 16384;
+			break;
+		case 13:
+			au_size = 24576;
+			break;
+		case 14:
+			au_size = 32768;
+			break;
+		case 15:
+			au_size = 65536;
+			break;
+		}
+	}
+
+	return au_size;
+}
+
 static void _sd_storage_parse_ssr(sdmmc_storage_t *storage)
 {
 	// unstuff_bits supports only 4 u32 so break into 2 x 16byte groups
@@ -1106,6 +1151,9 @@ static void _sd_storage_parse_ssr(sdmmc_storage_t *storage)
 	storage->ssr.video_class = unstuff_bits(raw_ssr1, 384 - 384, 8);

 	storage->ssr.app_class = unstuff_bits(raw_ssr2, 336 - 256, 4);
+
+	storage->ssr.au_size = unstuff_bits(raw_ssr1, 428 - 384, 4);
+	storage->ssr.uhs_au_size = unstuff_bits(raw_ssr1, 392 - 384, 4);
 }

 static int _sd_storage_get_ssr(sdmmc_storage_t *storage, u8 *buf)
@@ -1127,7 +1175,7 @@ DPRINTF("[SD] ssr: Card lacks mandatory SD Status function\n");
 		return 0;
 	}

-	if (!_sd_storage_execute_app_cmd(storage, R1_STATE_TRAN, 0, &cmdbuf, &reqbuf, 0))
+	if (!_sd_storage_execute_app_cmd(storage, R1_STATE_TRAN, 0, &cmdbuf, &reqbuf, NULL))
 		return 0;

 	u32 tmp = 0;
@@ -1143,7 +1191,7 @@ DPRINTF("[SD] ssr: Card lacks mandatory SD Status function\n");
 	_sd_storage_parse_ssr(storage);
 	//gfx_hexdump(0, storage->raw_ssr, 64);

-	return _sdmmc_storage_check_result(tmp);
+	return _sdmmc_storage_check_card_status(tmp);
 }

 static void _sd_storage_parse_cid(sdmmc_storage_t *storage)
@@ -1186,7 +1234,7 @@ static void _sd_storage_parse_csd(sdmmc_storage_t *storage)
 	}
 }

-static bool _sdmmc_storage_get_low_voltage_support(u32 bus_width, u32 type)
+static bool _sdmmc_storage_get_bus_uhs_support(u32 bus_width, u32 type)
 {
 	switch (type)
 	{
@@ -1235,13 +1283,13 @@ DPRINTF("[SD] after init\n");
 DPRINTF("[SD] went to idle state\n");

 	is_version_1 = _sd_storage_send_if_cond(storage);
-	if (is_version_1 == 2)
+	if (is_version_1 == 2) // Failed.
 		return 0;
 DPRINTF("[SD] after send if cond\n");

-	bool bus_low_voltage_support = _sdmmc_storage_get_low_voltage_support(bus_width, type);
+	bool bus_uhs_support = _sdmmc_storage_get_bus_uhs_support(bus_width, type);

-	if (!_sd_storage_get_op_cond(storage, is_version_1, bus_low_voltage_support))
+	if (!_sd_storage_get_op_cond(storage, is_version_1, bus_uhs_support))
 		return 0;
 DPRINTF("[SD] got op cond\n");

@@ -1310,6 +1358,7 @@ DPRINTF("[SD] switched to wide bus width\n");
 	}
 	else
 	{
+		bus_width = SDMMC_BUS_WIDTH_1;
 DPRINTF("[SD] SD does not support wide bus width\n");
 	}

@@ -1321,7 +1370,7 @@ DPRINTF("[SD] enabled UHS\n");

 		sdmmc_card_clock_powersave(sdmmc, SDMMC_POWER_SAVE_ENABLE);
 	}
-	else if (type != SDHCI_TIMING_SD_DS12 && (storage->scr.sda_vsn & 0xF) != 0)
+	else if (type != SDHCI_TIMING_SD_DS12 && (storage->scr.sda_vsn & 0xF)) // Not default speed and not SD Version 1.x
 	{
 		if (!_sd_storage_enable_hs_high_volt(storage, buf))
 			return 0;
@@ -1368,7 +1417,7 @@ int _gc_storage_custom_cmd(sdmmc_storage_t *storage, void *buf)
 	reqbuf.is_multi_block = 0;
 	reqbuf.is_auto_cmd12 = 0;

-	if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, 0))
+	if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, NULL))
 	{
 		sdmmc_stop_transmission(storage->sdmmc, &resp);
 		return 0;
@@ -1376,7 +1425,7 @@ int _gc_storage_custom_cmd(sdmmc_storage_t *storage, void *buf)

 	if (!sdmmc_get_rsp(storage->sdmmc, &resp, 4, SDMMC_RSP_TYPE_1))
 		return 0;
-	if (!_sdmmc_storage_check_result(resp))
+	if (!_sdmmc_storage_check_card_status(resp))
 		return 0;
 	return _sdmmc_storage_check_status(storage);
 }
--- a/bdk/storage/sdmmc.h
+++ b/bdk/storage/sdmmc.h
@@ -95,6 +95,8 @@ typedef struct _sd_ssr
 	u8 uhs_grade;
 	u8 video_class;
 	u8 app_class;
+	u8 au_size;
+	u8 uhs_au_size;
 	u32 protected_size;
 } sd_ssr_t;

@@ -107,6 +109,7 @@ typedef struct _sdmmc_storage_t
 	u32 sec_cnt;
 	int is_low_voltage;
 	u32 partition;
+	int initialized;
 	u8  raw_cid[0x10];
 	u8  raw_csd[0x10];
 	u8  raw_scr[8];
@@ -116,16 +119,17 @@ typedef struct _sdmmc_storage_t
 	mmc_ext_csd_t ext_csd;
 	sd_scr_t      scr;
 	sd_ssr_t      ssr;
-	int initialized;
 } sdmmc_storage_t;

-int sdmmc_storage_end(sdmmc_storage_t *storage);
-int sdmmc_storage_read(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf);
-int sdmmc_storage_write(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf);
-int sdmmc_storage_init_mmc(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 bus_width, u32 type);
-int sdmmc_storage_set_mmc_partition(sdmmc_storage_t *storage, u32 partition);
+int  sdmmc_storage_end(sdmmc_storage_t *storage);
+int  sdmmc_storage_read(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf);
+int  sdmmc_storage_write(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf);
+int  sdmmc_storage_init_mmc(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 bus_width, u32 type);
+int  sdmmc_storage_set_mmc_partition(sdmmc_storage_t *storage, u32 partition);
 void sdmmc_storage_init_wait_sd();
-int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 bus_width, u32 type);
-int sdmmc_storage_init_gc(sdmmc_storage_t *storage, sdmmc_t *sdmmc);
+int  sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 bus_width, u32 type);
+int  sdmmc_storage_init_gc(sdmmc_storage_t *storage, sdmmc_t *sdmmc);
+
+u32  sd_storage_ssr_get_au(sdmmc_storage_t *storage);

 #endif
--- a/bdk/storage/sdmmc_driver.c
+++ b/bdk/storage/sdmmc_driver.c
@@ -501,7 +501,7 @@ int sdmmc_get_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 size, u32 type)
 		break;

 	case SDMMC_RSP_TYPE_2:
-		if (size < 0x10)
+		if (size < 16)
 			return 0;
 		rsp[0] = sdmmc->rsp[0];
 		rsp[1] = sdmmc->rsp[1];
@@ -1052,7 +1052,7 @@ DPRINTF("rsp(%d): %08X, %08X, %08X, %08X\n", result,
 			if (!result)
 			{
 #ifdef ERROR_EXTRA_PRINTING
-				EPRINTFARGS("SDMMC: DMA Update failed (%08X)!", result);
+				EPRINTF("SDMMC: DMA Update failed!");
 #endif
 			}
 		}
@@ -1332,6 +1332,7 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type, int p

 void sdmmc1_disable_power()
 {
+#if 0
 	// Ensure regulator is into default voltage.
 	if (PMC(APBDEV_PMC_PWR_DET_VAL) & PMC_PWR_DET_SDMMC1_IO_EN)
 	{
@@ -1343,7 +1344,7 @@ void sdmmc1_disable_power()
 		PMC(APBDEV_PMC_PWR_DET_VAL) &= ~(PMC_PWR_DET_SDMMC1_IO_EN);
 		(void)PMC(APBDEV_PMC_PWR_DET_VAL); // Commit write.
 	}
-
+#endif
 	// T210B01 WAR: Clear pull down from CLK pad.
 	PINMUX_AUX(PINMUX_AUX_SDMMC1_CLK) &= ~PINMUX_PULL_MASK;

--- a/bdk/utils/util.c
+++ b/bdk/utils/util.c
@@ -44,7 +44,7 @@ u32 get_tmr_ms()

 u32 get_tmr_us()
 {
-	return TMR(TIMERUS_CNTR_1US); //TIMERUS_CNTR_1US
+	return TMR(TIMERUS_CNTR_1US);
 }

 void msleep(u32 ms)
--- a/bdk/utils/util.h
+++ b/bdk/utils/util.h
@@ -21,6 +21,8 @@
 #include <utils/types.h>
 #include <mem/minerva.h>

+#define NYX_NEW_INFO 0x3058594E
+
 typedef enum
 {
 	NYX_CFG_BIS  = BIT(5),
@@ -49,6 +51,10 @@ typedef struct _cfg_op_t

 typedef struct _nyx_info_t
 {
+	u32 magic;
+	u32 sd_init;
+	u32 sd_errors[3];
+	u8  rsvd[0x1000];
 	u32 disp_id;
 	u32 errors;
 } nyx_info_t;
--- a/bootloader/hos/hos.c
+++ b/bootloader/hos/hos.c
@@ -286,10 +286,6 @@ void hos_eks_save(u32 kb)
 			u8 *keys = (u8 *)calloc(0x1000, 1);
 			se_get_aes_keys(keys + 0x800, keys, 0x10);

-			// Set SBK back.
-			if (FUSE(FUSE_PRIVATE_KEY0) == 0xFFFFFFFF)
-				se_aes_key_set(14, keys + 14 * 0x10, 0x10);
-
 			// Set magic and personalized info.
 			h_cfg.eks->magic = HOS_EKS_MAGIC;
 			h_cfg.eks->enabled[key_idx] = kb;
--- a/bootloader/hos/pkg2.c
+++ b/bootloader/hos/pkg2.c
@@ -77,6 +77,7 @@ u32 pkg2_newkern_ini1_end;
 #define ID_SND_OFF_900  0x329A0
 #define ID_SND_OFF_1000 0x34404
 #define ID_SND_OFF_1100 0x245B4
+#define ID_SND_OFF_1101 0x245B8

 #define ID_RCV_OFF_100  0x219F0
 #define ID_RCV_OFF_200  0x3D1A8
@@ -90,6 +91,7 @@ u32 pkg2_newkern_ini1_end;
 #define ID_RCV_OFF_900  0x309B4
 #define ID_RCV_OFF_1000 0x322F8
 #define ID_RCV_OFF_1100 0x22B24
+#define ID_RCV_OFF_1101 0x22B28

 static u32 PRC_ID_SND_100[] =
 {
@@ -384,11 +386,11 @@ KERNEL_PATCHSET_DEF(_kernel_10_patchset,
 	{ ATM_SYSM_INCR, 0x66950, _MOVZW(19, 0x1D80, LSL16), NULL }, // System memory pool increase.
 	{ ATM_GEN_PATCH, ID_SND_OFF_1000, _B(ID_SND_OFF_1000, FREE_CODE_OFF_1ST_1000), NULL},    // Send process id branch.
 	{ ATM_ARR_PATCH, FREE_CODE_OFF_1ST_1000, sizeof(PRC_ID_SND_1000) >> 2, PRC_ID_SND_1000}, // Send process id code.
-	{ ATM_GEN_PATCH, FREE_CODE_OFF_1ST_1000 + sizeof(PRC_ID_SND_1000),                      // Branch back and skip 4 instructions.
+	{ ATM_GEN_PATCH, FREE_CODE_OFF_1ST_1000 + sizeof(PRC_ID_SND_1000),                       // Branch back and skip 4 instructions.
 		_B(FREE_CODE_OFF_1ST_1000 + sizeof(PRC_ID_SND_1000), ID_SND_OFF_1000 + sizeof(u32) * 4), NULL},
 	{ ATM_GEN_PATCH, ID_RCV_OFF_1000, _B(ID_RCV_OFF_1000, FREE_CODE_OFF_2ND_1000), NULL},    // Receive process id branch.
 	{ ATM_ARR_PATCH, FREE_CODE_OFF_2ND_1000, sizeof(PRC_ID_RCV_1000) >> 2, PRC_ID_RCV_1000}, // Receive process id code.
-	{ ATM_GEN_PATCH, FREE_CODE_OFF_2ND_1000 + sizeof(PRC_ID_RCV_1000),                      // Branch back and skip 4 instructions.
+	{ ATM_GEN_PATCH, FREE_CODE_OFF_2ND_1000 + sizeof(PRC_ID_RCV_1000),                       // Branch back and skip 4 instructions.
 		_B(FREE_CODE_OFF_2ND_1000 + sizeof(PRC_ID_RCV_1000), ID_RCV_OFF_1000 + sizeof(u32) * 4), NULL}
 );

@@ -400,14 +402,30 @@ KERNEL_PATCHSET_DEF(_kernel_11_patchset,
 	{ ATM_SYSM_INCR, 0x490C4, _MOVZW(21, 0x1D80, LSL16), NULL }, // System memory pool increase.
 	{ ATM_GEN_PATCH, ID_SND_OFF_1100, _B(ID_SND_OFF_1100, FREE_CODE_OFF_1ST_1100), NULL},    // Send process id branch.
 	{ ATM_ARR_PATCH, FREE_CODE_OFF_1ST_1100, sizeof(PRC_ID_SND_1100) >> 2, PRC_ID_SND_1100}, // Send process id code.
-	{ ATM_GEN_PATCH, FREE_CODE_OFF_1ST_1100 + sizeof(PRC_ID_SND_1100),                      // Branch back and skip 4 instructions.
+	{ ATM_GEN_PATCH, FREE_CODE_OFF_1ST_1100 + sizeof(PRC_ID_SND_1100),                       // Branch back and skip 4 instructions.
 		_B(FREE_CODE_OFF_1ST_1100 + sizeof(PRC_ID_SND_1100), ID_SND_OFF_1100 + sizeof(u32) * 4), NULL},
 	{ ATM_GEN_PATCH, ID_RCV_OFF_1100, _B(ID_RCV_OFF_1100, FREE_CODE_OFF_2ND_1100), NULL},    // Receive process id branch.
 	{ ATM_ARR_PATCH, FREE_CODE_OFF_2ND_1100, sizeof(PRC_ID_RCV_1100) >> 2, PRC_ID_RCV_1100}, // Receive process id code.
-	{ ATM_GEN_PATCH, FREE_CODE_OFF_2ND_1100 + sizeof(PRC_ID_RCV_1100),                      // Branch back and skip 4 instructions.
+	{ ATM_GEN_PATCH, FREE_CODE_OFF_2ND_1100 + sizeof(PRC_ID_RCV_1100),                       // Branch back and skip 4 instructions.
 		_B(FREE_CODE_OFF_2ND_1100 + sizeof(PRC_ID_RCV_1100), ID_RCV_OFF_1100 + sizeof(u32) * 4), NULL}
 );

+KERNEL_PATCHSET_DEF(_kernel_1101_patchset,
+	{ SVC_GENERIC,   0x2FD04, _NOP(), NULL },          // Allow same process on svcControlCodeMemory.
+	{ SVC_VERIFY_DS, 0x39194, _NOP(), NULL },          // Disable SVC verifications.
+	{ DEBUG_MODE_EN, 0x460C0, _MOVZX(8, 1, 0), NULL }, // Enable Debug Patch.
+	// Atmosphère kernel patches.
+	{ ATM_SYSM_INCR, 0x490C4, _MOVZW(21, 0x1D80, LSL16), NULL }, // System memory pool increase.
+	{ ATM_GEN_PATCH, ID_SND_OFF_1101, _B(ID_SND_OFF_1101, FREE_CODE_OFF_1ST_1100), NULL},    // Send process id branch.
+	{ ATM_ARR_PATCH, FREE_CODE_OFF_1ST_1100, sizeof(PRC_ID_SND_1100) >> 2, PRC_ID_SND_1100}, // Send process id code.
+	{ ATM_GEN_PATCH, FREE_CODE_OFF_1ST_1100 + sizeof(PRC_ID_SND_1100),                       // Branch back and skip 4 instructions.
+		_B(FREE_CODE_OFF_1ST_1100 + sizeof(PRC_ID_SND_1100), ID_SND_OFF_1101 + sizeof(u32) * 4), NULL},
+	{ ATM_GEN_PATCH, ID_RCV_OFF_1101, _B(ID_RCV_OFF_1101, FREE_CODE_OFF_2ND_1100), NULL},    // Receive process id branch.
+	{ ATM_ARR_PATCH, FREE_CODE_OFF_2ND_1100, sizeof(PRC_ID_RCV_1100) >> 2, PRC_ID_RCV_1100}, // Receive process id code.
+	{ ATM_GEN_PATCH, FREE_CODE_OFF_2ND_1100 + sizeof(PRC_ID_RCV_1100),                       // Branch back and skip 4 instructions.
+		_B(FREE_CODE_OFF_2ND_1100 + sizeof(PRC_ID_RCV_1100), ID_RCV_OFF_1101 + sizeof(u32) * 4), NULL}
+);
+
 // Kernel sha256 hashes.
 static const pkg2_kernel_id_t _pkg2_kernel_ids[] =
 {
@@ -424,6 +442,7 @@ static const pkg2_kernel_id_t _pkg2_kernel_ids[] =
 	{ "\xa2\xe3\xad\x1c\x98\xd8\x7a\x62", _kernel_9_patchset },   //  9.2.0. Kernel only.
 	{ "\x21\xc1\xd7\x24\x8e\xcd\xbd\xa8", _kernel_10_patchset },  // 10.0.0. Kernel only.
 	{ "\xD5\xD0\xBA\x5D\x52\xB9\x77\x85", _kernel_11_patchset },  // 11.0.0. Kernel only.
+	{ "\xF8\x1E\xE0\x30\x3C\x7A\x08\x04", _kernel_1101_patchset },// 11.0.1. Kernel only.
 };

 enum kip_offset_section
--- a/bootloader/hos/secmon_exo.c
+++ b/bootloader/hos/secmon_exo.c
@@ -82,8 +82,10 @@ typedef struct _exo_cfg_t
 	u32 fwno;
 	u32 flags[2];
 	u16 display_id;
-	u16 rsvd0;
-	u32 rsvd1[3];
+	u8  uart_port;
+	u8  uart_invert;
+	u32 uart_baudrate;
+	u32 rsvd1[2];
 	exo_emummc_config_t emummc_cfg;
 } exo_cfg_t;

@@ -244,6 +246,12 @@ void config_exosphere(launch_ctxt_t *ctxt, u32 warmboot_base, bool exo_new)
 				{
 					if (!strcmp("debugmode_user", kv->key))
 						user_debug = atoi(kv->val);
+					else if (!strcmp("log_port", kv->key))
+						exo_cfg->uart_port = atoi(kv->val);
+					else if (!strcmp("log_inverted", kv->key))
+						exo_cfg->uart_invert = atoi(kv->val);
+					else if (!strcmp("log_baud_rate", kv->key))
+						exo_cfg->uart_baudrate = atoi(kv->val);
 					else if (emu_cfg.enabled && !h_cfg.emummc_force_disable)
 					{
 						if (!strcmp("blank_prodinfo_emummc", kv->key))
@@ -292,7 +300,6 @@ void config_exosphere(launch_ctxt_t *ctxt, u32 warmboot_base, bool exo_new)
 	exo_cfg->magic = EXO_MAGIC_VAL;
 	exo_cfg->fwno = exoFwNo;
 	exo_cfg->flags[0] = exoFlags;
-	exo_cfg->flags[1] = 0;

 	// If warmboot is lp0fw, add in RSA modulus.
 	volatile wb_cfg_t *wb_cfg = (wb_cfg_t *)(warmboot_base + ATM_WB_HEADER_OFF);
@@ -305,13 +312,25 @@ void config_exosphere(launch_ctxt_t *ctxt, u32 warmboot_base, bool exo_new)
 		u8 *rsa_mod = (u8 *)malloc(512);

 		sdmmc_storage_set_mmc_partition(&emmc_storage, EMMC_BOOT0);
-		sdmmc_storage_read(&emmc_storage, 1, 1, rsa_mod);

-		// Patch AutoRCM out.
-		if ((fuse_read_odm(4) & 3) != 3)
-			rsa_mod[0x10] = 0xF7;
-		else
-			rsa_mod[0x10] = 0x37;
+		u32 sector;
+		for (u32 i = 0; i < 4; i++)
+		{
+			sector = 1 + (32 * i); // 0x4000 bct + 0x200 offset.
+			sdmmc_storage_read(&emmc_storage, sector, 1, rsa_mod);
+
+			// Check if 2nd byte of modulus is correct.
+			if (rsa_mod[0x11] != 0x86)
+				continue;
+
+			// Patch AutoRCM out.
+			if ((fuse_read_odm(4) & 3) != 3)
+				rsa_mod[0x10] = 0xF7;
+			else
+				rsa_mod[0x10] = 0x37;
+
+			break;
+		}

 		memcpy((void *)(warmboot_base + 0x10), rsa_mod + 0x10, 0x100);
 	}
@@ -342,10 +361,20 @@ void config_exosphere(launch_ctxt_t *ctxt, u32 warmboot_base, bool exo_new)
 		memset((void *)ATM_EXO_FATAL_ADDR, 0, ATM_EXO_FATAL_SIZE);
 		if (ctxt->exofatal)
 			memcpy((void *)ATM_EXO_FATAL_ADDR, ctxt->exofatal, ctxt->exofatal_size);
+
+		// Set display id.
+		exo_cfg->display_id = display_get_decoded_panel_id();
 	}

-	// Set display id.
-	exo_cfg->display_id = display_get_decoded_lcd_id();
+#ifdef DEBUG_UART_PORT
+	// Ovverride logging parameters if set in compile time.
+	if (!ctxt->stock)
+	{
+		exo_cfg->uart_port = DEBUG_UART_PORT;
+		exo_cfg->uart_invert = DEBUG_UART_INVERT;
+		exo_cfg->uart_baudrate = DEBUG_UART_BAUDRATE;
+	}
+#endif
 }

 static const char *get_error_desc(u32 error_desc)
--- a/bootloader/main.c
+++ b/bootloader/main.c
@@ -689,9 +689,7 @@ void nyx_load_run()

 	sd_end();

-	u32 expected_nyx_ver = ((NYX_VER_MJ + '0') << 24) | ((NYX_VER_MN + '0') << 16) | ((NYX_VER_HF + '0') << 8);
-	u32 nyx_ver = byte_swap_32(*(u32 *)(nyx + NYX_VER_OFF));
-
+	// Show loading logo.
 	gfx_clear_grey(0x1B);
 	u8 *BOOTLOGO = (void *)malloc(0x4000);
 	blz_uncompress_srcdest(BOOTLOGO_BLZ, SZ_BOOTLOGO_BLZ, BOOTLOGO, SZ_BOOTLOGO);
@@ -700,6 +698,8 @@ void nyx_load_run()
 	display_backlight_brightness(h_cfg.backlight, 1000);

 	// Check if Nyx version is old.
+	u32 expected_nyx_ver = ((NYX_VER_MJ + '0') << 24) | ((NYX_VER_MN + '0') << 16) | ((NYX_VER_HF + '0') << 8);
+	u32 nyx_ver = byte_swap_32(*(u32 *)(nyx + NYX_VER_OFF));
 	if (nyx_ver < expected_nyx_ver)
 	{
 		h_cfg.errors |= ERR_SYSOLD_NYX;
@@ -713,7 +713,10 @@ void nyx_load_run()
 		btn_wait();
 	}

+	// Set hekate errors.
 	nyx_str->info.errors = h_cfg.errors;
+
+	// Set Nyx mode.
 	nyx_str->cfg = 0;
 	if (b_cfg.extra_cfg)
 	{
@@ -735,8 +738,16 @@ void nyx_load_run()
 		}
 	}

+	// Set hekate version used to boot Nyx.
 	nyx_str->version = ipl_ver.version - 0x303030; // Convert ASCII to numbers.

+	// Set SD card initialization info.
+	nyx_str->info.magic = NYX_NEW_INFO;
+	nyx_str->info.sd_init = sd_get_mode();
+	u16 *sd_errors = sd_get_error_count();
+	for (u32 i = 0; i < 3; i++)
+		nyx_str->info.sd_errors[i] = sd_errors[i];
+
 	//memcpy((u8 *)nyx_str->irama, (void *)IRAM_BASE, 0x8000);
 	volatile reloc_meta_t *reloc = (reloc_meta_t *)(IPL_LOAD_ADDR + RELOC_META_OFF);
 	memcpy((u8 *)nyx_str->hekate, (u8 *)reloc->start, reloc->end - reloc->start);
@@ -1122,32 +1133,31 @@ static void _patched_rcm_protection()
 	u8 *buf = (u8 *)malloc(0x200);
 	sdmmc_storage_set_mmc_partition(&storage, EMMC_BOOT0);

+	u32 sector;
 	u8 corr_mod_byte0;
-	int i, sect = 0;
 	if ((fuse_read_odm(4) & 3) != 3)
 		corr_mod_byte0 = 0xF7;
 	else
 		corr_mod_byte0 = 0x37;

-	for (i = 0; i < 4; i++)
+	for (u32 i = 0; i < 4; i++)
 	{
-		sect = (0x200 + (0x4000 * i)) / NX_EMMC_BLOCKSIZE;
-		sdmmc_storage_read(&storage, sect, 1, buf);
+		sector = 1 + (32 * i); // 0x4000 bct + 0x200 offset.
+		sdmmc_storage_read(&storage, sector, 1, buf);

 		// Check if 2nd byte of modulus is correct.
-		if (buf[0x11] == 0x86)
-			goto out;
+		if (buf[0x11] != 0x86)
+			continue;

 		// If AutoRCM is enabled, disable it.
 		if (buf[0x10] != corr_mod_byte0)
 		{
 			buf[0x10] = corr_mod_byte0;

-			sdmmc_storage_write(&storage, sect, 1, buf);
+			sdmmc_storage_write(&storage, sector, 1, buf);
 		}
 	}

-out:
 	free(buf);
 	sdmmc_storage_end(&storage);
 }
@@ -1504,7 +1514,7 @@ ment_t ment_top[] = {
 	MDEF_END()
 };

-menu_t menu_top = { ment_top, "hekate - CTCaer mod v5.5.0", 0, 0 };
+menu_t menu_top = { ment_top, "hekate - CTCaer mod v5.5.1", 0, 0 };

 extern void pivot_stack(u32 stack_top);

--- a/nyx/Makefile
+++ b/nyx/Makefile
@@ -80,12 +80,15 @@ CUSTOMDEFINES := -DNYX_LOAD_ADDR=$(NYX_LOAD_ADDR) -DNYX_MAGIC=$(NYX_MAGIC)
 CUSTOMDEFINES += -DNYX_VER_MJ=$(NYXVERSION_MAJOR) -DNYX_VER_MN=$(NYXVERSION_MINOR) -DNYX_VER_HF=$(NYXVERSION_HOTFX) -DNYX_RESERVED=$(NYXVERSION_RSVD)
 CUSTOMDEFINES += -DNYX -DGFX_INC=$(GFX_INC) -DFFCFG_INC=$(FFCFG_INC)

-# 0: UART_A, 1: UART_B, 2: UART_C.
-# Also enables LV LOG.
-#CUSTOMDEFINES += -DDEBUG_UART_PORT=1
-
 #CUSTOMDEFINES += -DDEBUG

+# UART Logging: Max baudrate 12.5M. Disables Joycon on Nyx if UARTB or UARTC.
+# DEBUG_UART_PORT - 0: UART_A, 1: UART_B, 2: UART_C.
+#CUSTOMDEFINES += -DDEBUG_UART_BAUDRATE=115200 -DDEBUG_UART_INVERT=0 -DDEBUG_UART_PORT=0
+
+# LvGL UART LOG.
+#CUSTOMDEFINES += -DDEBUG_UART_LV_LOG
+
 ARCH := -march=armv4t -mtune=arm7tdmi -mthumb-interwork
 CFLAGS = $(ARCH) -O2 -g -nostdlib -ffunction-sections -fdata-sections -fomit-frame-pointer -std=gnu11 -Wall $(CUSTOMDEFINES)
 LDFLAGS = $(ARCH) -nostartfiles -lgcc -Wl,--nmagic,--gc-sections -Xlinker --defsym=NYX_LOAD_ADDR=$(NYX_LOAD_ADDR)
--- a/nyx/nyx_gui/frontend/gui_info.c
+++ b/nyx/nyx_gui/frontend/gui_info.c
@@ -1468,7 +1468,8 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn)
 			"HW rev:\n"
 			"FW rev:\n"
 			"S/N:\n"
-			"Month/Year:"
+			"Month/Year:\n\n"
+			"Bootloader bus:"
 		);

 		lv_obj_t *val = lv_cont_create(win, NULL);
@@ -1521,13 +1522,31 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn)
 			break;
 		}

-		s_printf(txt_buf + strlen(txt_buf), "(%02X)\n%c%c\n%c%c%c%c%c\n%X\n%X\n%08x\n%02d/%04d",
+		s_printf(txt_buf + strlen(txt_buf), "(%02X)\n%c%c\n%c%c%c%c%c\n%X\n%X\n%08x\n%02d/%04d\n\n",
 			sd_storage.cid.manfid, (sd_storage.cid.oemid >> 8) & 0xFF, sd_storage.cid.oemid & 0xFF,
 			sd_storage.cid.prod_name[0], sd_storage.cid.prod_name[1], sd_storage.cid.prod_name[2],
 			sd_storage.cid.prod_name[3], sd_storage.cid.prod_name[4],
 			sd_storage.cid.hwrev, sd_storage.cid.fwrev, sd_storage.cid.serial,
 			sd_storage.cid.month, sd_storage.cid.year);

+		switch (nyx_str->info.sd_init)
+		{
+		case SD_1BIT_HS25:
+			strcat(txt_buf, "HS25 1bit");
+			break;
+		case SD_4BIT_HS25:
+			strcat(txt_buf, "HS25");
+			break;
+		case SD_UHS_SDR82: // Report as SDR104.
+		case SD_UHS_SDR104:
+			strcat(txt_buf, "SDR104");
+			break;
+		case 0:
+		default:
+			strcat(txt_buf, "Undefined");
+			break;
+		}
+
 		lv_label_set_text(lb_val, txt_buf);

 		lv_obj_set_width(lb_val, lv_obj_get_width(val));
@@ -1574,14 +1593,22 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn)
 			break;
 		}

+		bool uhs_au_mb = false;
+		u32 uhs_au_size = sd_storage_ssr_get_au(&sd_storage);
+		if (uhs_au_size >= 1024)
+		{
+			uhs_au_mb = true;
+			uhs_au_size /= 1024;
+		}
+
 		s_printf(txt_buf,
-			"#00DDFF v%d.0#\n%02X\n%d MiB\n%X (CP %X)\n%d\n%d MB/s (%d MHz)\n%d\nU%d\nV%d\nA%d\n%s",
+			"#00DDFF v%d.0#\n%02X\n%d MiB\n%X (CP %X)\n%d\n%d MB/s (%d MHz)\n%d (AU: %d %s\nU%d\nV%d\nA%d\n%s",
 			sd_storage.csd.structure + 1, sd_storage.csd.cmdclass,
 			sd_storage.sec_cnt >> 11, sd_storage.sec_cnt, sd_storage.ssr.protected_size >> 9,
 			sd_storage.ssr.bus_width, sd_storage.csd.busspeed,
 			(sd_storage.csd.busspeed > 10) ? (sd_storage.csd.busspeed * 2) : 50,
-			sd_storage.ssr.speed_class, sd_storage.ssr.uhs_grade, sd_storage.ssr.video_class,
-			sd_storage.ssr.app_class, wp_info);
+			sd_storage.ssr.speed_class, uhs_au_size, uhs_au_mb ? "MiB)" : "KiB)", sd_storage.ssr.uhs_grade,
+			sd_storage.ssr.video_class, sd_storage.ssr.app_class, wp_info);

 		lv_label_set_text(lb_val2, txt_buf);

@@ -1656,7 +1683,8 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn)
 		lv_obj_t * lb_val4 = lv_label_create(val4, lb_desc);

 		u16 *sd_errors = sd_get_error_count();
-		s_printf(txt_buf, "\n%d\n%d\n%d", sd_errors[0], sd_errors[1], sd_errors[2]);
+		s_printf(txt_buf, "\n%d (%d)\n%d (%d)\n%d (%d)",
+			sd_errors[0], nyx_str->info.sd_errors[0], sd_errors[1], nyx_str->info.sd_errors[1], sd_errors[2], nyx_str->info.sd_errors[2]);

 		lv_label_set_text(lb_val4, txt_buf);

--- a/nyx/nyx_gui/hos/hos.c
+++ b/nyx/nyx_gui/hos/hos.c
@@ -117,7 +117,7 @@ static const u8 new_console_kekseed[KB_FIRMWARE_VERSION_MAX - KB_FIRMWARE_VERSIO
 	{ 0x86, 0x61, 0xB0, 0x16, 0xFA, 0x7A, 0x9A, 0xEA, 0xF6, 0xF5, 0xBE, 0x1A, 0x13, 0x5B, 0x6D, 0x9E }, // 7.0.0 New Device Keygen Source.
 	{ 0xA6, 0x81, 0x71, 0xE7, 0xB5, 0x23, 0x74, 0xB0, 0x39, 0x8C, 0xB7, 0xFF, 0xA0, 0x62, 0x9F, 0x8D }, // 8.1.0 New Device Keygen Source.
 	{ 0x03, 0xE7, 0xEB, 0x43, 0x1B, 0xCF, 0x5F, 0xB5, 0xED, 0xDC, 0x97, 0xAE, 0x21, 0x8D, 0x19, 0xED }, // 9.0.0 New Device Keygen Source.
-	{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // TODO: 9.1.0 New Device Keygen Source to be added on next change-of-keys.
+	{ 0xCE, 0xFE, 0x41, 0x0F, 0x46, 0x9A, 0x30, 0xD6, 0xF2, 0xE9, 0x0C, 0x6B, 0xB7, 0x15, 0x91, 0x36 }, // 9.1.0 New Device Keygen Source.
 };

 static const u8 gen_keyseed[0x10] =
@@ -231,10 +231,6 @@ void hos_eks_save(u32 kb)
 			u8 *keys = (u8 *)calloc(0x1000, 1);
 			se_get_aes_keys(keys + 0x800, keys, 0x10);

-			// Set SBK back.
-			if (h_cfg.sbk_set)
-				se_aes_key_set(14, keys + 14 * 0x10, 0x10);
-
 			// Set magic and personalized info.
 			h_cfg.eks->magic = HOS_EKS_MAGIC;
 			h_cfg.eks->enabled[key_idx] = kb;
@@ -598,6 +594,19 @@ static void _hos_validate_sept_mkey(u32 kb)
 	hos_eks_clear(kb);
 }

+static void _hos_bis_print_key(u32 idx, u8 *key)
+{
+	gfx_printf("BIS %d Crypt: ", idx);
+	for (int i = 0; i < 0x10; i++)
+		gfx_printf("%02X", key[((idx * 2 + 0) * 0x10) + i]);
+	gfx_puts("\n");
+
+	gfx_printf("BIS %d Tweak: ", idx);
+	for (int i = 0; i < 0x10; i++)
+		gfx_printf("%02X", key[((idx * 2 + 1) * 0x10) + i]);
+	gfx_puts("\n");
+}
+
 int hos_bis_keygen(u8 *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt)
 {
 	u32 keygen_rev = 0;
@@ -614,6 +623,8 @@ int hos_bis_keygen(u8 *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt)
 		// We check unconditionally in order to support downgrades.
 		keygen_rev = fuse_read_odm_keygen_rev();

+		gfx_printf("Keygen rev: %d\n", keygen_rev);
+
 		if (keygen_rev)
 		{
 			u8 tmp_mkey[0x10];
@@ -690,6 +701,10 @@ int hos_bis_keygen(u8 *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt)
 		memcpy(bis_keys + (5 * 0x10), h_cfg.eks->bis_keys[2].tweak, 0x10);
 	}

+	_hos_bis_print_key(0, bis_keys);
+	_hos_bis_print_key(1, bis_keys);
+	_hos_bis_print_key(2, bis_keys);
+
 	// Clear all AES keyslots.
 	for (u32 i = 0; i < 6; i++)
 		se_aes_key_clear(i);
--- a/nyx/nyx_gui/nyx.c
+++ b/nyx/nyx_gui/nyx.c
@@ -32,11 +32,13 @@
 #include <mem/minerva.h>
 #include <mem/sdram.h>
 #include <power/max77620.h>
+#include <soc/clock.h>
 #include <soc/bpmp.h>
 #include <soc/fuse.h>
 #include <soc/gpio.h>
 #include <soc/hw_init.h>
 #include <soc/i2c.h>
+#include <soc/pinmux.h>
 #include <soc/pmc.h>
 #include <soc/t210.h>
 #include <soc/uart.h>
@@ -355,6 +357,21 @@ void nyx_init_load_res()
 	set_default_configuration();
 	set_nyx_default_configuration();

+	// Reset new info if magic not correct.
+	if (nyx_str->info.magic != NYX_NEW_INFO)
+	{
+		nyx_str->info.sd_init = 0;
+		for (u32 i = 0; i < 3; i++)
+			nyx_str->info.sd_errors[i] = 0;
+	}
+
+	// Clear info magic.
+	nyx_str->info.magic = 0;
+
+	// Set display id from previous initialization.
+	display_set_decoded_panel_id(nyx_str->info.disp_id);
+
+	// Initialize gfx console.
 	gfx_init_ctxt((u32 *)LOG_FB_ADDRESS, 1280, 656, 656);
 	gfx_con_init();

@@ -421,7 +438,8 @@ void ipl_main()
 	#endif
 	pinmux_config_uart(DEBUG_UART_PORT);
 	clock_enable_uart(DEBUG_UART_PORT);
-	uart_init(DEBUG_UART_PORT, 115200);
+	uart_init(DEBUG_UART_PORT, DEBUG_UART_BAUDRATE);
+	uart_invert(DEBUG_UART_PORT, DEBUG_UART_INVERT, UART_INVERT_TXD);

 	uart_send(DEBUG_UART_PORT, (u8 *)"hekate-NYX: Hello!\r\n", 20);
 	uart_wait_idle(DEBUG_UART_PORT, UART_TX_IDLE);
Author	SHA1	Message	Date
CTCaer	9d79f39897	Bump hekate to v5.5.1 and Nyx to v0.9.7	2020-12-11 18:34:52 +02:00
CTCaer	2a7a3452ba	hos: Add HOS 11.0.1 support	2020-12-11 18:24:10 +02:00
CTCaer	f1386c60af	hos: Fix sleep on modchiped Erista	2020-12-11 18:22:33 +02:00
CTCaer	b6ec217484	exo: Support uart logging This can be enabled via compile time flags or exosphere.ini. Compile time flags override exosphere.ini	2020-12-11 18:14:00 +02:00
CTCaer	ad560b650e	nyx: di: Set display id we got from bootloader	2020-12-11 17:49:06 +02:00
CTCaer	14a048a496	nyx: Add SD init info from bootloader This shows info about the sd initialization process that happened on hekate main	2020-12-11 17:46:44 +02:00
CTCaer	ba984d02eb	sdmmc: Mitigate some Phison SDs which think they are SDSC	2020-12-11 17:43:01 +02:00
CTCaer	fce59fba43	nyx: Add SD card AU info	2020-12-11 17:41:09 +02:00
CTCaer	685663dcf6	nyx: Add bis key print in console	2020-12-11 17:39:30 +02:00
CTCaer	cb61e856ad	hos: Fix bis keygen for keygen rev 11 (HOS 9.1.0+)	2020-12-11 17:39:05 +02:00
CTCaer	5b8fb9fb6b	Various refactoring and addition of comments	2020-12-11 17:25:59 +02:00
CTCaer	8249d9e1a2	se: Ensure aligned key/iv/ctr/hash copy	2020-12-05 20:39:17 +02:00