Compare commits
6 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
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03268c4655 | ||
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072bbcabf4 | ||
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7c877c5bce | ||
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6aa1bdd1c6 | ||
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91606334c4 | ||
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25f6e91677 |
2
Makefile
2
Makefile
@@ -10,7 +10,7 @@ IPL_LOAD_ADDR := 0x40008000
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IPL_MAGIC := 0x43544349 #"ICTC"
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BLVERSION_MAJOR := 4
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BLVERSION_MINOR := 10
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BLVERSION_HOTFX := 0
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BLVERSION_HOTFX := 1
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BL_RESERVED := 0
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@@ -45,6 +45,7 @@ void set_default_configuration()
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h_cfg.autonogc = 1;
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h_cfg.sept_run = EMC(EMC_SCRATCH0) & EMC_SEPT_RUN;
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h_cfg.rcm_patched = true;
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h_cfg.sd_timeoff = 0;
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}
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int create_config_entry()
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@@ -35,6 +35,7 @@ typedef struct _hekate_config
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u32 errors;
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int sept_run;
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bool rcm_patched;
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u32 sd_timeoff;
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} hekate_config;
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typedef enum
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@@ -91,7 +91,7 @@ void dump_packages12()
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kb = pkg1_id->kb;
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if (!h_cfg.se_keygen_done || kb == KB_FIRMWARE_VERSION_620)
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if (!h_cfg.se_keygen_done)
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{
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tsec_ctxt.fw = (void *)pkg1 + pkg1_id->tsec_off;
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tsec_ctxt.pkg1 = (void *)pkg1;
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@@ -119,8 +119,8 @@ void dump_packages12()
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// Decrypt.
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keygen(keyblob, kb, &tsec_ctxt);
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h_cfg.se_keygen_done = 1;
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if (kb <= KB_FIRMWARE_VERSION_600)
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h_cfg.se_keygen_done = 1;
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free(keyblob);
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}
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@@ -188,10 +188,13 @@ void dump_packages12()
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pkg2_size_aligned / NX_EMMC_BLOCKSIZE, pkg2);
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// Decrypt package2 and parse KIP1 blobs in INI1 section.
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pkg2_hdr_t *pkg2_hdr = pkg2_decrypt(pkg2);
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if (!pkg2_hdr)
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{
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gfx_printf("Pkg2 decryption failed!\n");
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goto out;
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}
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// Display info.
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u32 kernel_crc32 = crc32c(pkg2_hdr->data, pkg2_hdr->sec_size[PKG2_SEC_KERNEL]);
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gfx_printf("\n%kKernel CRC32C: %k0x%08X\n\n", 0xFFC7EA46, 0xFFCCCCCC, kernel_crc32);
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gfx_printf("%kKernel size: %k0x%05X\n\n", 0xFFC7EA46, 0xFFCCCCCC, pkg2_hdr->sec_size[PKG2_SEC_KERNEL]);
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gfx_printf("%kINI1 size: %k0x%05X\n\n", 0xFFC7EA46, 0xFFCCCCCC, pkg2_hdr->sec_size[PKG2_SEC_INI1]);
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@@ -415,7 +415,7 @@ int hos_launch(ini_sec_t *cfg)
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gfx_printf("Loaded pkg1 & keyblob\n");
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// Generate keys.
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if (!h_cfg.se_keygen_done || ctxt.pkg1_id->kb == KB_FIRMWARE_VERSION_620)
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if (!h_cfg.se_keygen_done)
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{
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tsec_ctxt.fw = (u8 *)ctxt.pkg1 + ctxt.pkg1_id->tsec_off;
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tsec_ctxt.pkg1 = ctxt.pkg1;
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@@ -431,8 +431,8 @@ int hos_launch(ini_sec_t *cfg)
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if (!keygen(ctxt.keyblob, ctxt.pkg1_id->kb, &tsec_ctxt))
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return 0;
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DPRINTF("Generated keys\n");
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h_cfg.se_keygen_done = 1;
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if (ctxt.pkg1_id->kb <= KB_FIRMWARE_VERSION_600)
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h_cfg.se_keygen_done = 1;
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}
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// Decrypt and unpack package1 if we require parts of it.
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@@ -488,8 +488,6 @@ int hos_launch(ini_sec_t *cfg)
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gfx_printf("Loaded warmboot and secmon\n");
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// Read package2.
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if (!strcmp(ctxt.pkg1_id->id, "20190314172056"))
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ctxt.new_pkg2 = true;
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u8 *bootConfigBuf = _read_emmc_pkg2(&ctxt);
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if (!bootConfigBuf)
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return 0;
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@@ -505,7 +503,7 @@ int hos_launch(ini_sec_t *cfg)
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}
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LIST_INIT(kip1_info);
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pkg2_parse_kips(&kip1_info, pkg2_hdr);
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pkg2_parse_kips(&kip1_info, pkg2_hdr, &ctxt.new_pkg2);
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gfx_printf("Parsed ini1\n");
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@@ -517,15 +515,15 @@ int hos_launch(ini_sec_t *cfg)
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if (!ctxt.stock && (ctxt.svcperm || ctxt.debugmode || ctxt.atmosphere))
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{
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u32 kernel_crc32;
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// New Kernel with INI1 takes long to hash with crc32c. Hash kernel only.
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u8 kernel_hash[0x20];
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// Hash only Kernel when it embeds INI1.
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if (!ctxt.new_pkg2)
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kernel_crc32 = crc32c(ctxt.kernel, ctxt.kernel_size);
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se_calc_sha256(kernel_hash, ctxt.kernel, ctxt.kernel_size);
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else
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kernel_crc32 = crc32c(ctxt.kernel + PKG2_NEWKERN_START,
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se_calc_sha256(kernel_hash, ctxt.kernel + PKG2_NEWKERN_START,
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*(u32 *)(ctxt.kernel + PKG2_NEWKERN_INI1_START) - PKG2_NEWKERN_START);
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ctxt.pkg2_kernel_id = pkg2_identify(kernel_crc32);
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ctxt.pkg2_kernel_id = pkg2_identify(kernel_hash);
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// In case a kernel patch option is set; allows to disable SVC verification or/and enable debug mode.
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kernel_patch_t *kernel_patchset = ctxt.pkg2_kernel_id->kernel_patchset;
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@@ -288,18 +288,18 @@ KERNEL_PATCHSET_DEF(_kernel_8_patchset,
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_B(FREE_CODE_OFF_2ND_800 + sizeof(PRC_ID_RCV_700), ID_RCV_OFF_800 + sizeof(u32) * 4), NULL}
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);
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// Kernel sha256 hashes.
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static const pkg2_kernel_id_t _pkg2_kernel_ids[] =
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{
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{ 0x427f2647, _kernel_1_patchset }, //1.0.0
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{ 0xae19cf1b, _kernel_2_patchset }, //2.0.0 - 2.3.0
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{ 0x73c9e274, _kernel_3_patchset }, //3.0.0 - 3.0.1
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{ 0xe0e8cdc4, _kernel_302_patchset }, //3.0.2
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{ 0x485d0157, _kernel_4_patchset }, //4.0.0 - 4.1.0
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{ 0xf3c363f2, _kernel_5_patchset }, //5.0.0 - 5.1.0
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{ 0x64ce1a44, _kernel_6_patchset }, //6.0.0 - 6.2.0
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{ 0x908175e1, _kernel_7_patchset }, //7.0.0
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{ 0x22832de4, _kernel_8_patchset }, //8.0.0. Kernel only.
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{ 0, 0 } //End.
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{ "\xb8\xc5\x0c\x68\x25\xa9\xb9\x5b", _kernel_1_patchset }, //1.0.0
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{ "\x64\x0b\x51\xff\x28\x01\xb8\x30", _kernel_2_patchset }, //2.0.0 - 2.3.0
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{ "\x50\x84\x23\xac\x6f\xa1\x5d\x3b", _kernel_3_patchset }, //3.0.0 - 3.0.1
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{ "\x81\x9d\x08\xbe\xe4\x5e\x1f\xbb", _kernel_302_patchset }, //3.0.2
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{ "\xe6\xc0\xb7\xe3\x2f\xf9\x44\x51", _kernel_4_patchset }, //4.0.0 - 4.1.0
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{ "\xb2\x38\x61\xa8\xe1\xe2\xe4\xe4", _kernel_5_patchset }, //5.0.0 - 5.1.0
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{ "\x85\x97\x40\xf6\xc0\x3e\x3d\x44", _kernel_6_patchset }, //6.0.0 - 6.2.0
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{ "\xa2\x5e\x47\x0c\x8e\x6d\x2f\xd7", _kernel_7_patchset }, //7.0.0
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{ "\xf1\x5e\xc8\x34\xfd\x68\xf0\xf0", _kernel_8_patchset } //8.0.0. Kernel only.
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};
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enum kip_offset_section
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@@ -595,38 +595,38 @@ static kip1_patchset_t _fs_patches_800_exfat[] =
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// SHA256 hashes.
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static kip1_id_t _kip_ids[] =
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{
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{ "FS", "\xde\x9f\xdd\xa4\x08\x5d\xd5\xfe\x68\xdc\xb2\x0b\x41\x09\x5b\xb4", _fs_patches_100 }, // FS 1.0.0
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{ "FS", "\xfc\x3e\x80\x99\x1d\xca\x17\x96\x4a\x12\x1f\x04\xb6\x1b\x17\x5e", _fs_patches_100 }, // FS 1.0.0 exfat
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{ "FS", "\xcd\x7b\xbe\x18\xd6\x13\x0b\x28\xf6\x2f\x19\xfa\x79\x45\x53\x5b", _fs_patches_200 }, // FS 2.0.0
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{ "FS", "\xe7\x66\x92\xdf\xaa\x04\x20\xe9\xfd\xd6\x8e\x43\x63\x16\x18\x18", _fs_patches_200 }, // FS 2.0.0 exfat
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{ "FS", "\x0d\x70\x05\x62\x7b\x07\x76\x7c\x0b\x96\x3f\x9a\xff\xdd\xe5\x66", _fs_patches_210 }, // FS 2.1.0
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{ "FS", "\xdb\xd8\x5f\xca\xcc\x19\x3d\xa8\x30\x51\xc6\x64\xe6\x45\x2d\x32", _fs_patches_210 }, // FS 2.1.0 exfat
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{ "FS", "\xa8\x6d\xa5\xe8\x7e\xf1\x09\x7b\x23\xda\xb5\xb4\xdb\xba\xef\xe7", _fs_patches_300 }, // FS 3.0.0
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{ "FS", "\x98\x1c\x57\xe7\xf0\x2f\x70\xf7\xbc\xde\x75\x31\x81\xd9\x01\xa6", _fs_patches_300 }, // FS 3.0.0 exfat
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{ "FS", "\x57\x39\x7c\x06\x3f\x10\xb6\x31\x3f\x4d\x83\x76\x53\xcc\xc3\x71", _fs_patches_30x }, // FS 3.0.1
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{ "FS", "\x07\x30\x99\xd7\xc6\xad\x7d\x89\x83\xbc\x7a\xdd\x93\x2b\xe3\xd1", _fs_patches_30x }, // FS 3.0.1 exfat
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{ "FS", "\x06\xe9\x07\x19\x59\x5a\x01\x0c\x62\x46\xff\x70\x94\x6f\x10\xfb", _fs_patches_40x }, // FS 4.0.1
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{ "FS", "\x54\x9b\x0f\x8d\x6f\x72\xc4\xe9\xf3\xfd\x1f\x19\xea\xce\x4a\x5a", _fs_patches_40x }, // FS 4.0.1 exfat
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{ "FS", "\x80\x96\xaf\x7c\x6a\x35\xaa\x82\x71\xf3\x91\x69\x95\x41\x3b\x0b", _fs_patches_410 }, // FS 4.1.0
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{ "FS", "\x02\xd5\xab\xaa\xfd\x20\xc8\xb0\x63\x3a\xa0\xdb\xae\xe0\x37\x7e", _fs_patches_410 }, // FS 4.1.0 exfat
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{ "FS", "\xa6\xf2\x7a\xd9\xac\x7c\x73\xad\x41\x9b\x63\xb2\x3e\x78\x5a\x0c", _fs_patches_50x }, // FS 5.0.0
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{ "FS", "\xce\x3e\xcb\xa2\xf2\xf0\x62\xf5\x75\xf8\xf3\x60\x84\x2b\x32\xb4", _fs_patches_50x }, // FS 5.0.0 exfat
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{ "FS", "\x76\xf8\x74\x02\xc9\x38\x7c\x0f\x0a\x2f\xab\x1b\x45\xce\xbb\x93", _fs_patches_510 }, // FS 5.1.0
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{ "FS", "\x10\xb2\xd8\x16\x05\x48\x85\x99\xdf\x22\x42\xcb\x6b\xac\x2d\xf1", _fs_patches_510 }, // FS 5.1.0 exfat
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{ "FS", "\x1b\x82\xcb\x22\x18\x67\xcb\x52\xc4\x4a\x86\x9e\xa9\x1a\x1a\xdd", _fs_patches_600 }, // FS 6.0.0-4.0
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{ "FS", "\x96\x6a\xdd\x3d\x20\xb6\x27\x13\x2c\x5a\x8d\xa4\x9a\xc9\xd8\xdd", _fs_patches_600_exfat }, // FS 6.0.0-4.0 exfat
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{ "FS", "\x3a\x57\x4d\x43\x61\x86\x19\x1d\x17\x88\xeb\x2c\x0f\x07\x6b\x11", _fs_patches_600 }, // FS 6.0.0-5.0
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{ "FS", "\x33\x05\x53\xf6\xb5\xfb\x55\xc4\xc2\xd7\xb7\x36\x24\x02\x76\xb3", _fs_patches_600_exfat }, // FS 6.0.0-5.0 exfat
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{ "FS", "\x2A\xDB\xE9\x7E\x9B\x5F\x41\x77\x9E\xC9\x5F\xFE\x26\x99\xC9\x33", _fs_patches_700 }, // FS 7.0.0
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{ "FS", "\x2C\xCE\x65\x9C\xEC\x53\x6A\x8E\x4D\x91\xF3\xBE\x4B\x74\xBE\xD3", _fs_patches_700_exfat }, // FS 7.0.0 exfat
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{ "FS", "\xB2\xF5\x17\x6B\x35\x48\x36\x4D\x07\x9A\x29\xB1\x41\xA2\x3B\x06", _fs_patches_800 }, // FS 8.0.0
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{ "FS", "\xDB\xD9\x41\xC0\xC5\x3C\x52\xCC\xF7\x20\x2C\x84\xD8\xE0\xF7\x80", _fs_patches_800_exfat } // FS 8.0.0 exfat
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{ "FS", "\xde\x9f\xdd\xa4\x08\x5d\xd5\xfe", _fs_patches_100 }, // FS 1.0.0
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{ "FS", "\xfc\x3e\x80\x99\x1d\xca\x17\x96", _fs_patches_100 }, // FS 1.0.0 exfat
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{ "FS", "\xcd\x7b\xbe\x18\xd6\x13\x0b\x28", _fs_patches_200 }, // FS 2.0.0
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{ "FS", "\xe7\x66\x92\xdf\xaa\x04\x20\xe9", _fs_patches_200 }, // FS 2.0.0 exfat
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{ "FS", "\x0d\x70\x05\x62\x7b\x07\x76\x7c", _fs_patches_210 }, // FS 2.1.0
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{ "FS", "\xdb\xd8\x5f\xca\xcc\x19\x3d\xa8", _fs_patches_210 }, // FS 2.1.0 exfat
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{ "FS", "\xa8\x6d\xa5\xe8\x7e\xf1\x09\x7b", _fs_patches_300 }, // FS 3.0.0
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{ "FS", "\x98\x1c\x57\xe7\xf0\x2f\x70\xf7", _fs_patches_300 }, // FS 3.0.0 exfat
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{ "FS", "\x57\x39\x7c\x06\x3f\x10\xb6\x31", _fs_patches_30x }, // FS 3.0.1
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{ "FS", "\x07\x30\x99\xd7\xc6\xad\x7d\x89", _fs_patches_30x }, // FS 3.0.1 exfat
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{ "FS", "\x06\xe9\x07\x19\x59\x5a\x01\x0c", _fs_patches_40x }, // FS 4.0.1
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{ "FS", "\x54\x9b\x0f\x8d\x6f\x72\xc4\xe9", _fs_patches_40x }, // FS 4.0.1 exfat
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{ "FS", "\x80\x96\xaf\x7c\x6a\x35\xaa\x82", _fs_patches_410 }, // FS 4.1.0
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{ "FS", "\x02\xd5\xab\xaa\xfd\x20\xc8\xb0", _fs_patches_410 }, // FS 4.1.0 exfat
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{ "FS", "\xa6\xf2\x7a\xd9\xac\x7c\x73\xad", _fs_patches_50x }, // FS 5.0.0
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{ "FS", "\xce\x3e\xcb\xa2\xf2\xf0\x62\xf5", _fs_patches_50x }, // FS 5.0.0 exfat
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{ "FS", "\x76\xf8\x74\x02\xc9\x38\x7c\x0f", _fs_patches_510 }, // FS 5.1.0
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{ "FS", "\x10\xb2\xd8\x16\x05\x48\x85\x99", _fs_patches_510 }, // FS 5.1.0 exfat
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{ "FS", "\x1b\x82\xcb\x22\x18\x67\xcb\x52", _fs_patches_600 }, // FS 6.0.0-4.0
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{ "FS", "\x96\x6a\xdd\x3d\x20\xb6\x27\x13", _fs_patches_600_exfat }, // FS 6.0.0-4.0 exfat
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{ "FS", "\x3a\x57\x4d\x43\x61\x86\x19\x1d", _fs_patches_600 }, // FS 6.0.0-5.0
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{ "FS", "\x33\x05\x53\xf6\xb5\xfb\x55\xc4", _fs_patches_600_exfat }, // FS 6.0.0-5.0 exfat
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{ "FS", "\x2A\xDB\xE9\x7E\x9B\x5F\x41\x77", _fs_patches_700 }, // FS 7.0.0
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{ "FS", "\x2C\xCE\x65\x9C\xEC\x53\x6A\x8E", _fs_patches_700_exfat }, // FS 7.0.0 exfat
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{ "FS", "\xB2\xF5\x17\x6B\x35\x48\x36\x4D", _fs_patches_800 }, // FS 8.0.0
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{ "FS", "\xDB\xD9\x41\xC0\xC5\x3C\x52\xCC", _fs_patches_800_exfat } // FS 8.0.0 exfat
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};
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const pkg2_kernel_id_t *pkg2_identify(u32 id)
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const pkg2_kernel_id_t *pkg2_identify(u8 *hash)
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{
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for (u32 i = 0; _pkg2_kernel_ids[i].crc32c_id; i++)
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if (id == _pkg2_kernel_ids[i].crc32c_id)
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for (u32 i = 0; sizeof(_pkg2_kernel_ids) / sizeof(pkg2_kernel_id_t); i++)
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if (!memcmp(hash, _pkg2_kernel_ids[i].hash, sizeof(_pkg2_kernel_ids[0].hash)))
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return &_pkg2_kernel_ids[i];
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return NULL;
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}
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@@ -639,14 +639,15 @@ static u32 _pkg2_calc_kip1_size(pkg2_kip1_t *kip1)
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return size;
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}
|
||||
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void pkg2_parse_kips(link_t *info, pkg2_hdr_t *pkg2)
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void pkg2_parse_kips(link_t *info, pkg2_hdr_t *pkg2, bool *new_pkg2)
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{
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u8 *ptr;
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||||
// Check for new pkg2
|
||||
// Check for new pkg2 type.
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||||
if (!pkg2->sec_size[PKG2_SEC_INI1])
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||||
{
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||||
u32 kernel_ini1_off = *(u32 *)(pkg2->data + PKG2_NEWKERN_INI1_START);
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||||
ptr = pkg2->data + kernel_ini1_off;
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*new_pkg2 = true;
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}
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else
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ptr = pkg2->data + pkg2->sec_size[PKG2_SEC_KERNEL];
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@@ -777,7 +778,7 @@ const char* pkg2_patch_kips(link_t *info, char* patchNames)
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if (patchNames == NULL || patchNames[0] == 0)
|
||||
return NULL;
|
||||
|
||||
static const u32 MAX_NUM_PATCHES_REQUESTED = sizeof(u32)*8;
|
||||
static const u32 MAX_NUM_PATCHES_REQUESTED = sizeof(u32) * 8;
|
||||
char* patches[MAX_NUM_PATCHES_REQUESTED];
|
||||
|
||||
u32 numPatches = 1;
|
||||
|
||||
@@ -114,7 +114,7 @@ typedef struct _pkg2_kip1_info_t
|
||||
|
||||
typedef struct _pkg2_kernel_id_t
|
||||
{
|
||||
u32 crc32c_id;
|
||||
u8 hash[8];
|
||||
kernel_patch_t *kernel_patchset;
|
||||
} pkg2_kernel_id_t;
|
||||
|
||||
@@ -135,18 +135,18 @@ typedef struct _kip1_patchset_t
|
||||
typedef struct _kip1_id_t
|
||||
{
|
||||
const char* name;
|
||||
u8 hash[16];
|
||||
u8 hash[8];
|
||||
kip1_patchset_t* patchset;
|
||||
} kip1_id_t;
|
||||
|
||||
void pkg2_parse_kips(link_t *info, pkg2_hdr_t *pkg2);
|
||||
void pkg2_parse_kips(link_t *info, pkg2_hdr_t *pkg2, bool *new_pkg2);
|
||||
int pkg2_has_kip(link_t *info, u64 tid);
|
||||
void pkg2_replace_kip(link_t *info, u64 tid, pkg2_kip1_t *kip1);
|
||||
void pkg2_add_kip(link_t *info, pkg2_kip1_t *kip1);
|
||||
void pkg2_merge_kip(link_t *info, pkg2_kip1_t *kip1);
|
||||
const char* pkg2_patch_kips(link_t *info, char* patchNames);
|
||||
|
||||
const pkg2_kernel_id_t *pkg2_identify(u32 id);
|
||||
const pkg2_kernel_id_t *pkg2_identify(u8 *hash);
|
||||
pkg2_hdr_t *pkg2_decrypt(void *data);
|
||||
void pkg2_build_encrypt(void *dst, void *kernel, u32 kernel_size, link_t *kips_info, bool new_pkg2);
|
||||
|
||||
|
||||
@@ -1157,7 +1157,7 @@ ment_t ment_top[] = {
|
||||
};
|
||||
menu_t menu_top = {
|
||||
ment_top,
|
||||
"hekate - CTCaer mod v4.10.0", 0, 0
|
||||
"hekate - CTCaer mod v4.10.1", 0, 0
|
||||
};
|
||||
|
||||
#define IPL_STACK_TOP 0x90010000
|
||||
|
||||
@@ -364,10 +364,12 @@ static void _clock_sdmmc_clear_enable(u32 id)
|
||||
|
||||
static u32 _clock_sdmmc_table[8] = { 0 };
|
||||
|
||||
#define PLLP_OUT0 0x0
|
||||
|
||||
static int _clock_sdmmc_config_clock_source_inner(u32 *pout, u32 id, u32 val)
|
||||
{
|
||||
u32 divisor = 0;
|
||||
u32 source = 0;
|
||||
u32 source = PLLP_OUT0;
|
||||
|
||||
switch (val)
|
||||
{
|
||||
@@ -414,16 +416,16 @@ static int _clock_sdmmc_config_clock_source_inner(u32 *pout, u32 id, u32 val)
|
||||
switch (id)
|
||||
{
|
||||
case SDMMC_1:
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC1) = source | divisor;
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC1) = (source << 29) | divisor;
|
||||
break;
|
||||
case SDMMC_2:
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC2) = source | divisor;
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC2) = (source << 29) | divisor;
|
||||
break;
|
||||
case SDMMC_3:
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC3) = source | divisor;
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC3) = (source << 29) | divisor;
|
||||
break;
|
||||
case SDMMC_4:
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4) = source | divisor;
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4) = (source << 29) | divisor;
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -467,7 +469,7 @@ void clock_sdmmc_get_params(u32 *pout, u16 *pdivisor, u32 type)
|
||||
case 3:
|
||||
case 4:
|
||||
case 11:
|
||||
*pout = 208000;
|
||||
*pout = 200000;
|
||||
*pdivisor = 1;
|
||||
break;
|
||||
case 5:
|
||||
|
||||
@@ -96,7 +96,7 @@ static u32 _parity32_even(u32 *words, u32 count)
|
||||
lo = ((x & 0xf) ^ (x >> 4)) & 3;
|
||||
hi = ((x & 0xf) ^ (x >> 4)) >> 2;
|
||||
x = hi ^ lo;
|
||||
|
||||
|
||||
return (x & 1) ^ (x >> 1);
|
||||
}
|
||||
|
||||
|
||||
@@ -19,6 +19,7 @@
|
||||
#include "sdmmc.h"
|
||||
#include "mmc.h"
|
||||
#include "sd.h"
|
||||
#include "../config/config.h"
|
||||
#include "../gfx/gfx.h"
|
||||
#include "../mem/heap.h"
|
||||
#include "../utils/util.h"
|
||||
@@ -26,6 +27,8 @@
|
||||
//#define DPRINTF(...) gfx_printf(__VA_ARGS__)
|
||||
#define DPRINTF(...)
|
||||
|
||||
extern hekate_config h_cfg;
|
||||
|
||||
static inline u32 unstuff_bits(u32 *resp, u32 start, u32 size)
|
||||
{
|
||||
const u32 mask = (size < 32 ? 1 << size : 0) - 1;
|
||||
@@ -833,6 +836,7 @@ int _sd_storage_enable_highspeed_low_volt(sdmmc_storage_t *storage, u32 type, u8
|
||||
switch (type)
|
||||
{
|
||||
case 11:
|
||||
// Fall through if not supported.
|
||||
if (buf[13] & SD_MODE_UHS_SDR104)
|
||||
{
|
||||
type = 11;
|
||||
@@ -841,7 +845,6 @@ int _sd_storage_enable_highspeed_low_volt(sdmmc_storage_t *storage, u32 type, u8
|
||||
storage->csd.busspeed = 104;
|
||||
break;
|
||||
}
|
||||
//Fall through.
|
||||
case 10:
|
||||
if (buf[13] & SD_MODE_UHS_SDR50)
|
||||
{
|
||||
@@ -878,7 +881,7 @@ int _sd_storage_enable_highspeed_high_volt(sdmmc_storage_t *storage, u8 *buf)
|
||||
if (!_sd_storage_switch_get(storage, buf))
|
||||
return 0;
|
||||
//gfx_hexdump(0, (u8 *)buf, 64);
|
||||
if (!(buf[13] & 2))
|
||||
if (!(buf[13] & SD_MODE_HIGH_SPEED))
|
||||
return 1;
|
||||
|
||||
if (!_sd_storage_enable_highspeed(storage, 1, buf))
|
||||
@@ -1012,6 +1015,11 @@ static void _sd_storage_parse_csd(sdmmc_storage_t *storage)
|
||||
int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32 bus_width, u32 type)
|
||||
{
|
||||
int is_version_1 = 0;
|
||||
|
||||
// Some cards (Sandisk U1), do not like a fast power cycle. Wait min 100ms.
|
||||
u32 sd_poweroff_time = (u32)get_tmr_ms() - h_cfg.sd_timeoff;
|
||||
if (id == SDMMC_1 && (sd_poweroff_time < 100))
|
||||
msleep(100 - sd_poweroff_time);
|
||||
|
||||
memset(storage, 0, sizeof(sdmmc_storage_t));
|
||||
storage->sdmmc = sdmmc;
|
||||
|
||||
@@ -19,6 +19,7 @@
|
||||
|
||||
#include "mmc.h"
|
||||
#include "sdmmc.h"
|
||||
#include "../config/config.h"
|
||||
#include "../gfx/gfx.h"
|
||||
#include "../power/max7762x.h"
|
||||
#include "../soc/clock.h"
|
||||
@@ -31,6 +32,8 @@
|
||||
//#define DPRINTF(...) gfx_printf(__VA_ARGS__)
|
||||
#define DPRINTF(...)
|
||||
|
||||
extern hekate_config h_cfg;
|
||||
|
||||
/*! SCMMC controller base addresses. */
|
||||
static const u32 _sdmmc_bases[4] = {
|
||||
0x700B0000,
|
||||
@@ -116,7 +119,7 @@ static int _sdmmc_config_ven_ceata_clk(sdmmc_t *sdmmc, u32 id)
|
||||
|
||||
if (id == 4)
|
||||
sdmmc->regs->venceatactl = (sdmmc->regs->venceatactl & 0xFFFFC0FF) | 0x2800;
|
||||
sdmmc->regs->field_1C0 &= 0xFFFDFFFF;
|
||||
sdmmc->regs->ventunctl0 &= 0xFFFDFFFF;
|
||||
if (id == 4)
|
||||
{
|
||||
if (!sdmmc->venclkctl_set)
|
||||
@@ -168,11 +171,11 @@ static int _sdmmc_wait_type4(sdmmc_t *sdmmc)
|
||||
sdmmc->regs->clkcon |= TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE;
|
||||
}
|
||||
|
||||
sdmmc->regs->field_1B0 |= 0x80000000;
|
||||
sdmmc->regs->vendllcal |= 0x80000000;
|
||||
_sdmmc_get_clkcon(sdmmc);
|
||||
|
||||
u32 timeout = get_tmr_ms() + 5;
|
||||
while (sdmmc->regs->field_1B0 & 0x80000000)
|
||||
while (sdmmc->regs->vendllcal & 0x80000000)
|
||||
{
|
||||
if (get_tmr_ms() > timeout)
|
||||
{
|
||||
@@ -182,7 +185,7 @@ static int _sdmmc_wait_type4(sdmmc_t *sdmmc)
|
||||
}
|
||||
|
||||
timeout = get_tmr_ms() + 10;
|
||||
while (sdmmc->regs->field_1BC & 0x80000000)
|
||||
while (sdmmc->regs->dllcfgstatus & 0x80000000)
|
||||
{
|
||||
if (get_tmr_ms() > timeout)
|
||||
{
|
||||
@@ -561,9 +564,9 @@ int sdmmc_config_tuning(sdmmc_t *sdmmc, u32 type, u32 cmd)
|
||||
return 0;
|
||||
}
|
||||
|
||||
sdmmc->regs->field_1C0 = (sdmmc->regs->field_1C0 & 0xFFFF1FFF) | flag;
|
||||
sdmmc->regs->field_1C0 = (sdmmc->regs->field_1C0 & 0xFFFFE03F) | 0x40;
|
||||
sdmmc->regs->field_1C0 |= 0x20000;
|
||||
sdmmc->regs->ventunctl0 = (sdmmc->regs->ventunctl0 & 0xFFFF1FFF) | flag;
|
||||
sdmmc->regs->ventunctl0 = (sdmmc->regs->ventunctl0 & 0xFFFFE03F) | 0x40;
|
||||
sdmmc->regs->ventunctl0 |= 0x20000;
|
||||
sdmmc->regs->hostctl2 |= SDHCI_CTRL_EXEC_TUNING;
|
||||
|
||||
for (u32 i = 0; i < max; i++)
|
||||
@@ -1000,8 +1003,8 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type, int n
|
||||
sdmmc->clock_stopped = 0;
|
||||
|
||||
//TODO: make this skip-able.
|
||||
sdmmc->regs->field_1F0 |= 0x80000;
|
||||
sdmmc->regs->field_1AC &= 0xFFFFFFFB;
|
||||
sdmmc->regs->iospare |= 0x80000;
|
||||
sdmmc->regs->veniotrimctl &= 0xFFFFFFFB;
|
||||
static const u32 trim_values[] = { 2, 8, 3, 8 };
|
||||
sdmmc->regs->venclkctl = (sdmmc->regs->venclkctl & 0xE0FFFFFF) | (trim_values[sdmmc->id] << 24);
|
||||
sdmmc->regs->sdmemcmppadctl = (sdmmc->regs->sdmemcmppadctl & 0xF) | 7;
|
||||
@@ -1037,7 +1040,8 @@ void sdmmc_end(sdmmc_t *sdmmc)
|
||||
{
|
||||
gpio_output_enable(GPIO_PORT_E, GPIO_PIN_4, GPIO_OUTPUT_DISABLE);
|
||||
max77620_regulator_enable(REGULATOR_LDO2, 0);
|
||||
msleep(1); // To power cycle min 1ms without power is needed.
|
||||
h_cfg.sd_timeoff = get_tmr_ms(); // Some sandisc U1 cards need 100ms for a power cycle.
|
||||
msleep(1); // To power cycle, min 1ms without power is needed.
|
||||
}
|
||||
|
||||
_sdmmc_get_clkcon(sdmmc);
|
||||
|
||||
@@ -115,18 +115,18 @@ typedef struct _t210_sdmmc_t
|
||||
vu32 vendebouncecnt;
|
||||
vu32 venmiscctl;
|
||||
vu32 res6[34];
|
||||
vu32 field_1AC;
|
||||
vu32 field_1B0;
|
||||
vu32 veniotrimctl;
|
||||
vu32 vendllcal;
|
||||
vu8 res7[8];
|
||||
vu32 field_1BC;
|
||||
vu32 field_1C0;
|
||||
vu32 dllcfgstatus;
|
||||
vu32 ventunctl0;
|
||||
vu32 field_1C4;
|
||||
vu8 field_1C8[24];
|
||||
vu32 sdmemcmppadctl;
|
||||
vu32 autocalcfg;
|
||||
vu32 autocalintval;
|
||||
vu32 autocalsts;
|
||||
vu32 field_1F0;
|
||||
vu32 iospare;
|
||||
} t210_sdmmc_t;
|
||||
|
||||
#endif
|
||||
|
||||
@@ -106,17 +106,3 @@ void power_off()
|
||||
//TODO: we should probably make sure all regulators are powered off properly.
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_PWR_OFF);
|
||||
}
|
||||
|
||||
#define CRC32C_POLY 0x82F63B78
|
||||
u32 crc32c(const void *buf, u32 len)
|
||||
{
|
||||
const u8 *cbuf = (const u8 *)buf;
|
||||
u32 crc = 0xFFFFFFFF;
|
||||
while (len--)
|
||||
{
|
||||
crc ^= *cbuf++;
|
||||
for (int i = 0; i < 8; i++)
|
||||
crc = crc & 1 ? (crc >> 1) ^ CRC32C_POLY : crc >> 1;
|
||||
}
|
||||
return ~crc;
|
||||
}
|
||||
|
||||
@@ -39,6 +39,5 @@ void reboot_normal();
|
||||
void reboot_rcm();
|
||||
void power_off();
|
||||
void exec_cfg(u32 *base, const cfg_op_t *ops, u32 num_ops);
|
||||
u32 crc32c(const void *buf, u32 len);
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user