Bump version to v4.1

-.-
Nintendo, I Am Disappoint
2018-09-19 17:58:26 +03:00 · 2018-09-19 17:57:02 +03:00 · 2018-09-19 00:57:19 +03:00 · 2018-09-19 00:55:26 +03:00 · 2018-09-19 00:50:23 +03:00 · 2018-09-19 00:46:32 +03:00
34 changed files with 1712 additions and 285 deletions
--- a/5
+++ b/5
@@ -5,6 +5,8 @@ endif
 include $(DEVKITARM)/base_rules

 TARGET := hekate
+BLVERSION_MAJOR := 4
+BLVERSION_MINOR := 1
 BUILD := build
 OUTPUT := output
 SOURCEDIR = bootloader
@@ -53,7 +55,8 @@ OBJS += $(addprefix $(BUILD)/$(TARGET)/, \
 )

 ARCH := -march=armv4t -mtune=arm7tdmi -mthumb -mthumb-interwork
-CUSTOMDEFINES := -DMENU_LOGO_ENABLE #-DDEBUG
+CUSTOMDEFINES := -DBLVERSIONMJ=$(BLVERSION_MAJOR) -DBLVERSIONMN=$(BLVERSION_MINOR)
+CUSTOMDEFINES += -DMENU_LOGO_ENABLE #-DDEBUG
 CFLAGS = $(ARCH) -O2 -nostdlib -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-inline -std=gnu11 -Wall $(CUSTOMDEFINES)
 LDFLAGS = $(ARCH) -nostartfiles -lgcc -Wl,--nmagic,--gc-sections

--- a/README.md
+++ b/README.md
@@ -34,9 +34,10 @@ There are four possible type of entries. "**[ ]**": Boot entry, "**{ }**": Capti
 | Config option      | Description                                                |
 | ------------------ | ---------------------------------------------------------- |
 | autoboot=0         | 0: Disable, #: Boot entry number to auto boot.             |
-| bootwait=3         | 0: Disable (Having VOL- pressed since injection goes to menu. It also disables bootlogo.), #: Time to wait for **VOL-** to enter menu. |
+| bootwait=3         | 0: Disable (It also disables bootlogo. Having **VOL-** pressed since injection goes to menu.), #: Time to wait for **VOL-** to enter menu. |
 | customlogo=0       | 0: Use default hekate bootlogo, 1: Use bootlogo.bmp.       |
 | verification=2     | 0: Disable Backup/Restore verification, 1: Sparse (block based, fast and not 100% reliable), 2: Full (sha256 based, slow and 100% reliable). |
+| backlight=100      | Screen backlight level. 0-255.                             |


 ### Possible boot entry key/value combinations:
@@ -49,7 +50,7 @@ There are four possible type of entries. "**[ ]**": Boot entry, "**{ }**": Capti
 | kernel={SD path}   | Replaces the kernel binary                                 |
 | kip1={SD path}     | Replaces/Adds kernel initial process. Multiple can be set. |
 | kip1patch=patchname| Enables a kip1 patch. Specify with multiple lines and/or as CSV. Implemented patches right now are nosigchk,nogc |
-| fullsvcperm=1      | Disables SVC verification                                  |
+| fullsvcperm=1      | Disables SVC verification (full services permission)       |
 | debugmode=1        | Enables Debug mode                                         |
 | atmosphere=1       | Enables Atmosphère patching                                |
 | payload={SD path}  | Payload launching. Tools, Linux, CFW bootloaders, etc.     |
@@ -57,6 +58,8 @@ There are four possible type of entries. "**[ ]**": Boot entry, "**{ }**": Capti

 You can find a template [Here](./res/hekate_ipl_template.ini)

+If the main .ini is not found, it is created on the first hekate boot.
+

 ```
 hekate     (C) 2018 naehrwert, st4rk
--- a/bootloader/config/config.c
+++ b/bootloader/config/config.c
@@ -45,6 +45,8 @@ void set_default_configuration()
 	h_cfg.verification = 2;
 	h_cfg.se_keygen_done = 0;
 	h_cfg.sbar_time_keeping = 0;
+	h_cfg.backlight = 100;
+	h_cfg.errors = 0;
 }

 int create_config_entry()
@@ -54,31 +56,55 @@ int create_config_entry()

 	char lbuf[16];
 	FIL fp;
+	bool mainIniFound = false;

 	LIST_INIT(ini_sections);

 	if (ini_parse(&ini_sections, "bootloader/hekate_ipl.ini", false))
+		mainIniFound = true;
+	else
 	{
-		if (f_open(&fp, "bootloader/hekate_ipl.ini", FA_WRITE | FA_CREATE_ALWAYS) != FR_OK)
-			return 0;
-		// Add config entry.
-		f_puts("[config]\nautoboot=", &fp);
-		itoa(h_cfg.autoboot, lbuf, 10);
-		f_puts(lbuf, &fp);
-		f_puts("\nautoboot_list=", &fp);
-		itoa(h_cfg.autoboot_list, lbuf, 10);
-		f_puts(lbuf, &fp);
-		f_puts("\nbootwait=", &fp);
-		itoa(h_cfg.bootwait, lbuf, 10);
-		f_puts(lbuf, &fp);
-		f_puts("\ncustomlogo=", &fp);
-		itoa(h_cfg.customlogo, lbuf, 10);
-		f_puts(lbuf, &fp);
-		f_puts("\nverification=", &fp);
-		itoa(h_cfg.verification, lbuf, 10);
-		f_puts(lbuf, &fp);
-		f_puts("\n", &fp);
+		u8 res = f_open(&fp, "bootloader/hekate_ipl.ini", FA_READ);
+		if (res == FR_NO_FILE || res == FR_NO_PATH)
+		{
+			f_mkdir("bootloader");
+			f_mkdir("bootloader/ini");
+			f_mkdir("bootloader/payloads");
+			f_mkdir("bootloader/sys");
+		}
+		else
+		{
+			if (!res)
+				f_close(&fp);
+			return 1;
+		}
+	}

+	if (f_open(&fp, "bootloader/hekate_ipl.ini", FA_WRITE | FA_CREATE_ALWAYS) != FR_OK)
+		return 1;
+	// Add config entry.
+	f_puts("[config]\nautoboot=", &fp);
+	itoa(h_cfg.autoboot, lbuf, 10);
+	f_puts(lbuf, &fp);
+	f_puts("\nautoboot_list=", &fp);
+	itoa(h_cfg.autoboot_list, lbuf, 10);
+	f_puts(lbuf, &fp);
+	f_puts("\nbootwait=", &fp);
+	itoa(h_cfg.bootwait, lbuf, 10);
+	f_puts(lbuf, &fp);
+	f_puts("\ncustomlogo=", &fp);
+	itoa(h_cfg.customlogo, lbuf, 10);
+	f_puts(lbuf, &fp);
+	f_puts("\nverification=", &fp);
+	itoa(h_cfg.verification, lbuf, 10);
+	f_puts(lbuf, &fp);
+	f_puts("\nbacklight=", &fp);
+	itoa(h_cfg.backlight, lbuf, 10);
+	f_puts(lbuf, &fp);
+	f_puts("\n", &fp);
+
+	if (mainIniFound)
+	{
 		// Re-construct existing entries.
 		LIST_FOREACH_ENTRY(ini_sec_t, ini_sec, &ini_sections, link)
 		{
@@ -115,14 +141,13 @@ int create_config_entry()
 				break;
 			}
 		}
-
-		f_close(&fp);
-		sd_unmount();
 	}
-	else
-		return 1;

-	ini_free(&ini_sections);
+	f_close(&fp);
+	sd_unmount();
+
+	if (mainIniFound)
+		ini_free(&ini_sections);

 	return 0;
 }
@@ -173,7 +198,7 @@ void _config_autoboot_list()

 						else
 							boot_text[(i - 1) * 512] = '*';
-						memcpy(boot_text + (i - 1) * 512 + 1, ini_sec->name, strlen(ini_sec->name));
+						memcpy(boot_text + (i - 1) * 512 + 1, ini_sec->name, strlen(ini_sec->name) + 1);
 						boot_text[strlen(ini_sec->name) + (i - 1) * 512 + 1] = 0;
 						ments[i].caption = &boot_text[(i - 1) * 512];
 					}
@@ -185,11 +210,6 @@ void _config_autoboot_list()
 						break;
 				}
 			}
-			if (i < 3)
-			{
-				EPRINTF("No launch configurations found.");
-				goto out;
-			}

 			memset(&ments[i], 0, sizeof(ment_t));
 			menu_t menu = {ments, "Select a list entry to auto boot", 0, 0};
@@ -295,7 +315,7 @@ void config_autoboot()

 						else
 							boot_text[(i - 4) * 512] = '*';
-						memcpy(boot_text + (i - 4) * 512 + 1, ini_sec->name, strlen(ini_sec->name));
+						memcpy(boot_text + (i - 4) * 512 + 1, ini_sec->name, strlen(ini_sec->name) + 1);
 						boot_text[strlen(ini_sec->name) + (i - 4) * 512 + 1] = 0;
 						ments[i].caption = &boot_text[(i - 4) * 512];
 					}
@@ -309,8 +329,10 @@ void config_autoboot()
 			}
 			if (i < 6 && !h_cfg.autoboot_list)
 			{
-				EPRINTF("No launch configurations found.");
-				goto out;
+				ments[i].type = MENT_CAPTION;
+				ments[i].caption = "No main configurations found...";
+				ments[i].color = 0xFFFFDD00;
+				i++;
 			}

 			memset(&ments[i], 0, sizeof(ment_t));
@@ -501,9 +523,9 @@ void config_verification()

 	ments[1].type = MENT_CHGLINE;

-	memcpy(vr_text,       " Disable", 9);
-	memcpy(vr_text + 64,  " Sparse (Fast - Not  reliable)", 31);
-	memcpy(vr_text + 128, " Full   (Slow - 100% reliable)", 31);
+	memcpy(vr_text,       " Disable (Fastest)", 19);
+	memcpy(vr_text + 64,  " Sparse  (Fast - Not  reliable)", 32);
+	memcpy(vr_text + 128, " Full    (Slow - 100% reliable)", 32);

 	for (u32 i = 0; i < 3; i++)
 	{
@@ -545,3 +567,71 @@ void config_verification()
 		return;
 	btn_wait();
 }
+
+void config_backlight()
+{
+	gfx_clear_grey(&gfx_ctxt, 0x1B);
+	gfx_con_setpos(&gfx_con, 0, 0);
+
+	u32 bri_entries = 11;
+
+	ment_t *ments = (ment_t *)malloc(sizeof(ment_t) * (bri_entries + 3));
+	u32 *bri_values = (u32 *)malloc(sizeof(u32) * bri_entries);
+	char *bri_text = (char *)malloc(8 * bri_entries);
+
+	for (u32 j = 1; j < bri_entries; j++)
+		bri_values[j] = j * 10;
+
+	ments[0].type = MENT_BACK;
+	ments[0].caption = "Back";
+
+	ments[1].type = MENT_CHGLINE;
+
+	u32 i = 0;
+	for (i = 1; i < bri_entries; i++)
+	{
+		if ((h_cfg.backlight / 20) != i)
+			bri_text[i * 32] = ' ';
+		else
+			bri_text[i * 32] = '*';
+		
+		if (i < 10)
+		{
+			bri_text[i * 32 + 1] = i + '0';
+			memcpy(bri_text + i * 32 + 2, "0%", 3);
+		}
+			
+		else
+			memcpy(bri_text + i * 32 + 1, "100%", 5);
+
+		ments[i + 1].type = MENT_CHOICE;
+		ments[i + 1].caption = bri_text + i * 32;
+		ments[i + 1].data = &bri_values[i];
+	}
+
+	memset(&ments[i + 1], 0, sizeof(ment_t));
+	menu_t menu = {ments, "Backlight brightness", 0, 0};
+
+	u32 *temp_backlight = (u32 *)tui_do_menu(&gfx_con, &menu);
+	if (temp_backlight != NULL)
+	{
+		gfx_clear_grey(&gfx_ctxt, 0x1B);
+		gfx_con_setpos(&gfx_con, 0, 0);
+
+		h_cfg.backlight = (*(u32 *)temp_backlight) * 2;
+		//Save choice to ini file.
+		if (!create_config_entry())
+			gfx_puts(&gfx_con, "\nConfiguration was saved!\n");
+		else
+			EPRINTF("\nConfiguration saving failed!");
+		gfx_puts(&gfx_con, "\nPress any key...");
+	}
+
+	free(ments);
+	free(bri_values);
+	free(bri_text);
+
+	if (temp_backlight == NULL)
+		return;
+	btn_wait();
+}
--- a/bootloader/config/config.h
+++ b/bootloader/config/config.h
@@ -29,13 +29,21 @@ typedef struct _hekate_config
 	// Global temporary config.
 	int se_keygen_done;
 	u32 sbar_time_keeping;
+	u32 backlight;
+	u32 errors;
 } hekate_config;

+typedef enum
+{
+	ERR_LIBSYS_LP0 = (1 << 0),
+} hsysmodule_t;
+
 void set_default_configuration();
 int create_config_entry();
 void config_autoboot();
 void config_bootdelay();
 void config_customlogo();
 void config_verification();
+void config_backlight();

 #endif /* _CONFIG_H_ */
--- a/bootloader/config/ini.c
+++ b/bootloader/config/ini.c
@@ -192,11 +192,10 @@ void ini_free(link_t *dst)
 			{
 				free(kv->key);
 				free(kv->val);
-				free(kv);
+				//free(kv);
 			}
 		}
 		free(ini_sec->name);
-		//TODO: Free section structs.
 		//free(ini_sec);
 	}

@@ -255,15 +254,7 @@ char *ini_check_payload_section(ini_sec_t *cfg)
 	}

 	if (path)
-	{
-		if (strlen(path) > 1)
-			return path;
-		else
-		{
-			free(path);
-			return NULL;
-		}
-	}
+		return path;
 	else
 		return NULL;
 }
--- a/bootloader/gfx/di.c
+++ b/bootloader/gfx/di.c
@@ -42,8 +42,8 @@ static void _display_dsi_wait(u32 timeout, u32 off, u32 mask)
 void display_init()
 {
 	// Power on.
-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_LDO0_CFG, 0xD0); // Configure to 1.2V.
-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_GPIO7, 0x09);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_LDO0_CFG, 0xD0); // Configure to 1.2V.
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_GPIO7, 0x09);

 	// Enable MIPI CAL, DSI, DISP1, HOST1X, UART_FST_MIPI_CAL, DSIA LP clocks.
 	CLOCK(CLK_RST_CONTROLLER_RST_DEV_H_CLR) = 0x1010000;
@@ -85,7 +85,7 @@ void display_init()

 	exec_cfg((u32 *)CLOCK_BASE, _display_config_1, 4);
 	exec_cfg((u32 *)DISPLAY_A_BASE, _display_config_2, 94);
-	exec_cfg((u32 *)DSI_BASE, _display_config_3, 60);
+	exec_cfg((u32 *)DSI_BASE, _display_config_3, 61);

 	usleep(10000);

@@ -121,8 +121,8 @@ void display_init()

 	usleep(20000);

-	exec_cfg((u32 *)DSI_BASE, _display_config_5, 21);
 	exec_cfg((u32 *)CLOCK_BASE, _display_config_6, 3);
+	exec_cfg((u32 *)DSI_BASE, _display_config_5, 21);
 	DISPLAY_A(_DIREG(DC_DISP_DISP_CLOCK_CONTROL)) = 4;
 	exec_cfg((u32 *)DSI_BASE, _display_config_7, 10);

@@ -137,14 +137,54 @@ void display_init()
 	exec_cfg((u32 *)DISPLAY_A_BASE, _display_config_11, 113);
 }

+void display_backlight_pwm_init()
+{
+	clock_enable_pwm();
+
+	PWM(PWM_CONTROLLER_PWM_CSR) = (1 << 31); // Enable PWM
+
+	PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) = (PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) >> 2) << 2 | 1; // PWM clock source.
+	gpio_config(GPIO_PORT_V, GPIO_PIN_0, GPIO_MODE_SPIO); // Backlight power mode.
+	
+}
+
 void display_backlight(bool enable)
 {
-	gpio_write(GPIO_PORT_V, GPIO_PIN_0, enable ? GPIO_HIGH : GPIO_LOW); // Backlight PWM.
+	gpio_write(GPIO_PORT_V, GPIO_PIN_0, enable ? GPIO_HIGH : GPIO_LOW); // Backlight PWM GPIO.
+}
+
+void display_backlight_brightness(u32 brightness, u32 step_delay)
+{
+	u32 old_value = (PWM(PWM_CONTROLLER_PWM_CSR) >> 16) & 0xFF;
+	if (brightness == old_value)
+		return;
+
+	if (brightness > 255)
+		brightness = 255;
+
+	if (old_value < brightness)
+	{
+		for (u32 i = old_value; i < brightness + 1; i++)
+		{
+			PWM(PWM_CONTROLLER_PWM_CSR) = (1 << 31) | (i << 16); // Enable PWM
+			usleep(step_delay);
+		}
+	}
+	else
+	{
+		for (u32 i = old_value; i > brightness; i--)
+		{
+			PWM(PWM_CONTROLLER_PWM_CSR) = (1 << 31) | (i << 16); // Enable PWM
+			usleep(step_delay);
+		}
+	}
+	if (!brightness)
+	    PWM(PWM_CONTROLLER_PWM_CSR) = 0;
 }

 void display_end()
 {
-	display_backlight(false);
+	display_backlight_brightness(0, 1000);

 	DSI(_DSIREG(DSI_VIDEO_MODE_CONTROL)) = 1;
 	DSI(_DSIREG(DSI_WR_DATA)) = 0x2805;
--- a/bootloader/gfx/di.h
+++ b/bootloader/gfx/di.h
@@ -161,6 +161,8 @@
 #define  DE_CONTROL_ACTIVE_BLANK (4 << 2)

 #define DC_DISP_DC_MCCIF_FIFOCTRL 0x480
+#define DC_DISP_SD_BL_PARAMETERS 0x4D7
+#define DC_DISP_SD_BL_CONTROL 0x4DC
 #define DC_DISP_BLEND_BACKGROUND_COLOR 0x4E4

 #define DC_WIN_CSC_YOF 0x611
@@ -179,6 +181,7 @@
 #define DC_WIN_WIN_OPTIONS 0x700
 #define  H_DIRECTION  (1 <<  0)
 #define  V_DIRECTION  (1 <<  2)
+#define  SCAN_COLUMN  (1 <<  4)
 #define  COLOR_EXPAND (1 <<  6)
 #define  CSC_ENABLE   (1 << 18)
 #define  WIN_ENABLE   (1 << 30)
@@ -226,6 +229,8 @@
 #define  V_DDA_INC(x) (((x) & 0xffff) << 16)

 #define DC_WIN_LINE_STRIDE 0x70A
+#define  LINE_STRIDE(x)	   (x)
+#define  UV_LINE_STRIDE(x) (((x) & 0xffff) << 16)
 #define DC_WIN_DV_CONTROL 0x70E

 // The following registers are A/B/C shadows of the 0xBC0/0xDC0/0xFC0 registers (see DISPLAY_WINDOW_HEADER).
@@ -338,7 +343,13 @@

 #define DSI_PAD_CONTROL_4 0x52

+#define DSI_INIT_SEQ_DATA_15 0x5F
+
+/*! Display backlight related PWM registers. */
+#define PWM_CONTROLLER_PWM_CSR 0x00
+
 void display_init();
+void display_backlight_pwm_init();
 void display_end();

 /*! Show one single color on the display. */
@@ -346,6 +357,7 @@ void display_color_screen(u32 color);

 /*! Switches screen backlight ON/OFF. */
 void display_backlight(bool enable);
+void display_backlight_brightness(u32 brightness, u32 step_delay);

 /*! Init display in full 1280x720 resolution (B8G8R8A8, line stride 768, framebuffer size = 1280*768*4 bytes). */
 u32 *display_init_framebuffer();
--- a/bootloader/gfx/di.inl
+++ b/bootloader/gfx/di.inl
@@ -128,7 +128,7 @@ static const cfg_op_t _display_config_2[94] = {
 };

 //DSI Init config.
-static const cfg_op_t _display_config_3[60] = { 
+static const cfg_op_t _display_config_3[61] = { 
 	{DSI_WR_DATA, 0},
 	{DSI_INT_ENABLE, 0},
 	{DSI_INT_STATUS, 0},
@@ -137,6 +137,7 @@ static const cfg_op_t _display_config_3[60] = {
 	{DSI_INIT_SEQ_DATA_1, 0},
 	{DSI_INIT_SEQ_DATA_2, 0},
 	{DSI_INIT_SEQ_DATA_3, 0},
+	{DSI_INIT_SEQ_DATA_15, 0},
 	{DSI_DCS_CMDS, 0},
 	{DSI_PKT_SEQ_0_LO, 0},
 	{DSI_PKT_SEQ_1_LO, 0},
@@ -288,7 +289,7 @@ static const cfg_op_t _display_config_7[10] = {
 static const cfg_op_t _display_config_8[6] = {
 	{0x18, 0},
 	{2, 0xF3F10000},
-	{0x16, 1},
+	{0x16, 0},
 	{0x18, 0},
 	{0x18, 0x10010},
 	{0x17, 0x300}
@@ -474,10 +475,10 @@ static const cfg_op_t _display_config_13[16] = {
 	{DSI_PAD_CONTROL_1, 0},
 	{DSI_PHY_TIMING_0, 0x6070601},
 	{DSI_PHY_TIMING_1, 0x40A0E05},
-	{DSI_PHY_TIMING_2, 0x30109},
+	{DSI_PHY_TIMING_2, 0x30118},
 	{DSI_BTA_TIMING, 0x190A14},
 	{DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF) },
-	{DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x765) | DSI_TIMEOUT_TA(0x2000)},
+	{DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x1343) | DSI_TIMEOUT_TA(0x2000)},
 	{DSI_TO_TALLY, 0},
 	{DSI_HOST_CONTROL, DSI_HOST_CONTROL_CRC_RESET | DSI_HOST_CONTROL_TX_TRIG_HOST | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC},
 	{DSI_CONTROL, DSI_CONTROL_LANES(3) | DSI_CONTROL_HOST_ENABLE},
@@ -544,7 +545,7 @@ static const cfg_op_t cfg_display_framebuffer[32] = {
 	{DC_WIN_PRESCALED_SIZE, V_PRESCALED_SIZE(1280) | H_PRESCALED_SIZE(2880)}, //Pre-scaled size: 1280x2880 bytes.
 	{DC_WIN_DDA_INC, V_DDA_INC(0x1000) | H_DDA_INC(0x1000)},
 	{DC_WIN_SIZE, V_SIZE(1280) | H_SIZE(720)}, //Window size: 1280 vertical lines x 720 horizontal pixels.
-	{DC_WIN_LINE_STRIDE, 0x6000C00}, //768*2x768*4 (= 0x600 x 0xC00) bytes, see TRM for alignment requirements.
+	{DC_WIN_LINE_STRIDE, UV_LINE_STRIDE(720 * 2) | LINE_STRIDE(720 * 4)}, //768*2x768*4 (= 0x600 x 0xC00) bytes, see TRM for alignment requirements.
 	{DC_WIN_BUFFER_CONTROL, 0},
 	{DC_WINBUF_SURFACE_KIND, 0}, //Regular surface.
 	{DC_WINBUF_START_ADDR, 0xC0000000}, //Framebuffer address.
--- a/bootloader/gfx/gfx.c
+++ b/bootloader/gfx/gfx.c
@@ -508,15 +508,10 @@ void gfx_set_rect_rgb(gfx_ctxt_t *ctxt, const u8 *buf, u32 size_x, u32 size_y, u

 void gfx_set_rect_argb(gfx_ctxt_t *ctxt, const u32 *buf, u32 size_x, u32 size_y, u32 pos_x, u32 pos_y)
 {
-	u32 pos = 0;
+	u32 *ptr = (u32 *)buf;
 	for (u32 y = pos_y; y < (pos_y + size_y); y++)
-	{
 		for (u32 x = pos_x; x < (pos_x + size_x); x++)
-		{
-			ctxt->fb[x + y*ctxt->stride] = buf[pos];
-			pos+=1;
-		}
-	}
+			ctxt->fb[x + y * ctxt->stride] = *ptr++;
 }

 void gfx_render_bmp_argb(gfx_ctxt_t *ctxt, const u32 *buf, u32 size_x, u32 size_y, u32 pos_x, u32 pos_y)
@@ -524,6 +519,6 @@ void gfx_render_bmp_argb(gfx_ctxt_t *ctxt, const u32 *buf, u32 size_x, u32 size_
 	for (u32 y = pos_y; y < (pos_y + size_y); y++)
 	{
 		for (u32 x = pos_x; x < (pos_x + size_x); x++)
-			ctxt->fb[x + y*ctxt->stride]  = buf[(size_y + pos_y - 1 - y ) * size_x + x - pos_x];
+			ctxt->fb[x + y * ctxt->stride] = buf[(size_y + pos_y - 1 - y ) * size_x + x - pos_x];
 	}
 }
--- a/bootloader/gfx/tui.c
+++ b/bootloader/gfx/tui.c
@@ -20,6 +20,8 @@
 #include "../config/config.h"
 #include "../power/max17050.h"
 #include "../utils/util.h"
+#include "../config/config.h"
+#include "di.h"

 #ifdef MENU_LOGO_ENABLE
 extern u8 *Kc_MENU_LOGO;
@@ -60,10 +62,10 @@ void tui_sbar(gfx_con_t *con, bool force_update)
 	max17050_get_property(MAX17050_AvgCurrent, &battVoltCurr);

 	if (battVoltCurr >= 0)
-		gfx_printf(con, " %k+%d mA     %k%K\n",
+		gfx_printf(con, " %k+%d mA%k%K\n",
 			0xFF008800, battVoltCurr / 1000, 0xFFCCCCCC, 0xFF1B1B1B);
 	else
-		gfx_printf(con, " %k-%d mA     %k%K\n",
+		gfx_printf(con, " %k-%d mA%k%K\n",
 			0xFF880000, (~battVoltCurr) / 1000, 0xFFCCCCCC, 0xFF1B1B1B);
 	con->fntsz = prevFontSize;
 	gfx_con_setpos(con, cx, cy);
@@ -107,7 +109,7 @@ void *tui_do_menu(gfx_con_t *con, menu_t *menu)
 		X_MENU_LOGO, Y_MENU_LOGO, X_POS_MENU_LOGO, Y_POS_MENU_LOGO);
 #endif //MENU_LOGO_ENABLE

-	while (1)
+	while (true)
 	{
 		gfx_con_setcol(con, 0xFFCCCCCC, 1, 0xFF1B1B1B);
 		gfx_con_setpos(con, menu->x, menu->y);
@@ -157,10 +159,18 @@ void *tui_do_menu(gfx_con_t *con, menu_t *menu)
 		gfx_putc(con, '\n');

 		// Print help and battery status.
-		gfx_con_getpos(con, &con->savedx,  &con->savedy);
+		gfx_con_setpos(con, 0,  1127);
+		if (h_cfg.errors)
+		{
+			gfx_printf(con, "%k Warning: %k", 0xFF800000, 0xFF555555);
+			if (h_cfg.errors & ERR_LIBSYS_LP0)
+				gfx_printf(con, "Sleep mode library is missing!\n");
+		}
 		gfx_con_setpos(con, 0,  1191);
 		gfx_printf(con, "%k VOL: Move up/down\n PWR: Select option%k", 0xFF555555, 0xFFCCCCCC);

+		display_backlight_brightness(h_cfg.backlight, 1000);
+
 		// Wait for user command.
 		u32 btn = btn_wait();

--- a/bootloader/hos/hos.c
+++ b/bootloader/hos/hos.c
@@ -3,6 +3,7 @@
 * Copyright (c) 2018 st4rk
 * Copyright (c) 2018 Ced2911
 * Copyright (C) 2018 CTCaer
+ * Copyright (c) 2018 balika011
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
@@ -36,6 +37,7 @@
 #include "../gfx/di.h"
 #include "../config/config.h"
 #include "../mem/mc.h"
+#include "../soc/fuse.h"

 #include "../gfx/gfx.h"
 extern gfx_ctxt_t gfx_ctxt;
@@ -84,7 +86,8 @@ typedef struct _merge_kip_t
 #define KB_FIRMWARE_VERSION_301 2
 #define KB_FIRMWARE_VERSION_400 3
 #define KB_FIRMWARE_VERSION_500 4
-#define KB_FIRMWARE_VERSION_MAX KB_FIRMWARE_VERSION_500
+#define KB_FIRMWARE_VERSION_600 5
+#define KB_FIRMWARE_VERSION_MAX KB_FIRMWARE_VERSION_600

 // Exosphère magic "XBC0".
 #define MAGIC_EXOSPHERE 0x30434258
@@ -94,7 +97,8 @@ static const u8 keyblob_keyseeds[][0x10] = {
 	{ 0x0C, 0x25, 0x61, 0x5D, 0x68, 0x4C, 0xEB, 0x42, 0x1C, 0x23, 0x79, 0xEA, 0x82, 0x25, 0x12, 0xAC }, //3.0.0
 	{ 0x33, 0x76, 0x85, 0xEE, 0x88, 0x4A, 0xAE, 0x0A, 0xC2, 0x8A, 0xFD, 0x7D, 0x63, 0xC0, 0x43, 0x3B }, //3.0.1
 	{ 0x2D, 0x1F, 0x48, 0x80, 0xED, 0xEC, 0xED, 0x3E, 0x3C, 0xF2, 0x48, 0xB5, 0x65, 0x7D, 0xF7, 0xBE }, //4.0.0
-	{ 0xBB, 0x5A, 0x01, 0xF9, 0x88, 0xAF, 0xF5, 0xFC, 0x6C, 0xFF, 0x07, 0x9E, 0x13, 0x3C, 0x39, 0x80 }  //5.0.0
+	{ 0xBB, 0x5A, 0x01, 0xF9, 0x88, 0xAF, 0xF5, 0xFC, 0x6C, 0xFF, 0x07, 0x9E, 0x13, 0x3C, 0x39, 0x80 }, //5.0.0
+	{ 0xD8, 0xCC, 0xE1, 0x26, 0x6A, 0x35, 0x3F, 0xCC, 0x20, 0xF3, 0x2D, 0x3B, 0x51, 0x7D, 0xE9, 0xC0 }  //6.0.0
 };

 static const u8 cmac_keyseed[0x10] =
@@ -128,6 +132,8 @@ static void _se_lock()
 	SE(SE_KEY_TABLE_ACCESS_LOCK_OFFSET) = 0; // Make all key access regs secure only.
 	SE(SE_RSA_KEYTABLE_ACCESS_LOCK_OFFSET) = 0; // Make all RSA access regs secure only.
 	SE(SE_SECURITY_0) &= 0xFFFFFFFB; // Make access lock regs secure only.
+	memset((void *)IPATCH_BASE, 0, 13);
+	SB(SB_CSR) = 0x10; // Protected IROM enable.

 	// This is useful for documenting the bits in the SE config registers, so we can keep it around.
 	/*gfx_printf(&gfx_con, "SE(SE_SECURITY_0) = %08X\n", SE(SE_SECURITY_0));
@@ -200,6 +206,8 @@ int keygen(u8 *keyblob, u32 kb, void *tsec_fw)
 		se_aes_unwrap_key(12, 12, master_keyseed_retail);
 		break;
 	case KB_FIRMWARE_VERSION_500:
+	case KB_FIRMWARE_VERSION_600:
+	default:
 		se_aes_unwrap_key(10, 15, console_keyseed_4xx_5xx);
 		se_aes_unwrap_key(15, 15, console_keyseed);
 		se_aes_unwrap_key(14, 12, master_keyseed_4xx_5xx);
@@ -214,23 +222,6 @@ int keygen(u8 *keyblob, u32 kb, void *tsec_fw)
 	return 1;
 }

-static void _copy_bootconfig()
-{
-	sdmmc_storage_t storage;
-	sdmmc_t sdmmc;
-
-	sdmmc_storage_init_mmc(&storage, &sdmmc, SDMMC_4, SDMMC_BUS_WIDTH_8, 4);
-
-	// Read BCT.
-	u8 *buf = (u8 *)0x4003D000;
-	sdmmc_storage_set_mmc_partition(&storage, 1);
-	sdmmc_storage_read(&storage, 0, 0x3000 / NX_EMMC_BLOCKSIZE, buf);
-
-	gfx_printf(&gfx_con, "Copied BCT to 0x4003D000\n");
-
-	sdmmc_storage_end(&storage);
-}
-
 static int _read_emmc_pkg1(launch_ctxt_t *ctxt)
 {
 	int res = 0;
@@ -262,13 +253,14 @@ out:;
 	return res;
 }

-static int _read_emmc_pkg2(launch_ctxt_t *ctxt)
+static u8 *_read_emmc_pkg2(launch_ctxt_t *ctxt)
 {
-	int res = 0;
+	u8 *bctBuf = NULL;
 	sdmmc_storage_t storage;
 	sdmmc_t sdmmc;

-	sdmmc_storage_init_mmc(&storage, &sdmmc, SDMMC_4, SDMMC_BUS_WIDTH_8, 4);
+	if (!sdmmc_storage_init_mmc(&storage, &sdmmc, SDMMC_4, SDMMC_BUS_WIDTH_8, 4))
+		return NULL;
 	sdmmc_storage_set_mmc_partition(&storage, 0);

 	// Parse eMMC GPT.
@@ -282,26 +274,28 @@ static int _read_emmc_pkg2(launch_ctxt_t *ctxt)

 	// Read in package2 header and get package2 real size.
 	//TODO: implement memalign for DMA buffers.
-	u8 *tmp = (u8 *)malloc(NX_EMMC_BLOCKSIZE);
-	nx_emmc_part_read(&storage, pkg2_part, 0x4000 / NX_EMMC_BLOCKSIZE, 1, tmp);
-	u32 *hdr = (u32 *)(tmp + 0x100);
+	static const u32 BCT_SIZE = 0x4000;
+	bctBuf = (u8 *)malloc(BCT_SIZE);
+	nx_emmc_part_read(&storage, pkg2_part, BCT_SIZE / NX_EMMC_BLOCKSIZE, 1, bctBuf);
+	u32 *hdr = (u32 *)(bctBuf + 0x100);
 	u32 pkg2_size = hdr[0] ^ hdr[2] ^ hdr[3];
-	free(tmp);
 	DPRINTF("pkg2 size on emmc is %08X\n", pkg2_size);
+
+	// Read in Boot Config.
+	memset(bctBuf, 0, BCT_SIZE);
+	nx_emmc_part_read(&storage, pkg2_part, 0, BCT_SIZE / NX_EMMC_BLOCKSIZE, bctBuf);
+
 	// Read in package2.
 	u32 pkg2_size_aligned = ALIGN(pkg2_size, NX_EMMC_BLOCKSIZE);
 	DPRINTF("pkg2 size aligned is %08X\n", pkg2_size_aligned);
 	ctxt->pkg2 = malloc(pkg2_size_aligned);
 	ctxt->pkg2_size = pkg2_size;
-	nx_emmc_part_read(&storage, pkg2_part, 0x4000 / NX_EMMC_BLOCKSIZE, 
+	nx_emmc_part_read(&storage, pkg2_part, BCT_SIZE / NX_EMMC_BLOCKSIZE, 
 		pkg2_size_aligned / NX_EMMC_BLOCKSIZE, ctxt->pkg2);
-
-	res = 1;
-
 out:;
 	nx_emmc_gpt_free(&gpt);
 	sdmmc_storage_end(&storage);
-	return res;
+	return bctBuf;
 }

 static int _config_warmboot(launch_ctxt_t *ctxt, const char *value)
@@ -522,7 +516,8 @@ int hos_launch(ini_sec_t *cfg)
 	gfx_printf(&gfx_con, "Loaded warmboot.bin and secmon\n");

 	// Read package2.
-	if (!_read_emmc_pkg2(&ctxt))
+	u8 *bootConfigBuf = _read_emmc_pkg2(&ctxt);
+	if (!bootConfigBuf)
 		return 0;

 	gfx_printf(&gfx_con, "Read package2\n");
@@ -623,13 +618,16 @@ int hos_launch(ini_sec_t *cfg)
 		if (!exoFwNumber)
 			exoFwNumber = 4;
 	case KB_FIRMWARE_VERSION_500:
+		if (!exoFwNumber)
+			exoFwNumber = 5;
+	case KB_FIRMWARE_VERSION_600:
 	default:
 		se_key_acc_ctrl(12, 0xFF);
 		se_key_acc_ctrl(15, 0xFF);
 		bootStateDramPkg2 = 2;
 		bootStatePkg2Continue = 4;
 		if (!exoFwNumber)
-			exoFwNumber = 5;
+			exoFwNumber = 6;
 		break;
 	}

@@ -637,10 +635,20 @@ int hos_launch(ini_sec_t *cfg)
 	ini_free_section(cfg);
 	_free_launch_components(&ctxt);

-	// Copy BCT if debug mode is enabled.
-	memset((void *)0x4003D000, 0, 0x3000);
-	if (ctxt.debugmode)
-		_copy_bootconfig(&ctxt);
+	// Clear BCT area for retail units and copy it over if dev unit.
+	if (ctxt.pkg1_id->kb < KB_FIRMWARE_VERSION_600)
+	{
+		memset((void *)0x4003D000, 0, 0x3000);
+		if ((fuse_read_odm(4) & 3) == 3)
+			memcpy((void *)0x4003D000, bootConfigBuf, 0x1000);
+	}
+	else
+	{
+		memset((void *)0x4003F000, 0, 0x1000);
+		if ((fuse_read_odm(4) & 3) == 3)
+			memcpy((void *)0x4003F800, bootConfigBuf, 0x800);
+	}
+	free(bootConfigBuf);

 	// Config Exosphère if booting Atmosphère.
 	if (ctxt.atmosphere)
@@ -672,7 +680,7 @@ int hos_launch(ini_sec_t *cfg)
 	// Wait for secmon to get ready.
 	cluster_boot_cpu0(ctxt.pkg1_id->secmon_base);
 	while (!*mb_out)
-		usleep(1); // This only works when in IRAM or with a trained DRAM. 
+		usleep(1); // This only works when in IRAM or with a trained DRAM.

 	//TODO: pkg1.1 locks PMC scratches, we can do that too at some point.
 	/*PMC(0x4) = 0x7FFFF3;
--- a/bootloader/hos/pkg1.c
+++ b/bootloader/hos/pkg1.c
@@ -63,6 +63,14 @@ PATCHSET_DEF(_secmon_5_patchset,
 	{ 0xDA8 + 0x1038 , _NOP() } //Sections SHA2.
 );

+PATCHSET_DEF(_secmon_6_patchset,
+	// Patch package2 decryption and signature/hash checks.
+	{ 0xDC8 + 0x820 , _NOP() }, //package2 structure.
+	{ 0xDC8 + 0x82C , _NOP() }, //Version.
+	{ 0xDC8 + 0xE90 , _NOP() }, //Header signature.
+	{ 0xDC8 + 0x112C , _NOP() } //Sections SHA2.
+);
+
 /*
 * package1.1 header: <wb, ldr, sm>
 * package1.1 layout:
@@ -72,6 +80,7 @@ PATCHSET_DEF(_secmon_5_patchset,
 * 3.1: {wb, ldr, sm} { 0, 1, 2 }
 * 4.0: {ldr, sm, wb} { 1, 2, 0 }
 * 5.0: {ldr, sm, wb} { 1, 2, 0 }
+ * 6.0: {ldr, sm, wb} { 1, 2, 0 }
 */

 static const pkg1_id_t _pkg1_ids[] = {
@@ -81,6 +90,7 @@ static const pkg1_id_t _pkg1_ids[] = {
 	{ "20170710161758", 2, 0x1A00, 0x3FE0, { 0, 1, 2 }, 0x4002D000, 0x8000D000, true, _secmon_3_patchset }, //3.0.1 - 3.0.2
 	{ "20170921172629", 3, 0x1800, 0x3FE0, { 1, 2, 0 }, 0x4002B000, 0x4003B000, false, _secmon_4_patchset }, //4.0.0 - 4.1.0
 	{ "20180220163747", 4, 0x1900, 0x3FE0, { 1, 2, 0 }, 0x4002B000, 0x4003B000, false, _secmon_5_patchset }, //5.0.0 - 5.1.0
+	{ "20180802162753", 5, 0x1900, 0x3FE0, { 1, 2, 0 }, 0x4002B000, 0x4003D800, false, _secmon_6_patchset }, //6.0.0 - 6.0.0
 	{ NULL } //End.
 };

--- a/bootloader/hos/pkg2.c
+++ b/bootloader/hos/pkg2.c
@@ -43,6 +43,7 @@ extern gfx_con_t gfx_con;
 #define FREE_CODE_OFF_1ST_302 0x494BC
 #define FREE_CODE_OFF_1ST_400 0x52890
 #define FREE_CODE_OFF_1ST_500 0x5C020
+#define FREE_CODE_OFF_1ST_600 0x5EE00

 #define ID_SND_OFF_100 0x23CC0
 #define ID_SND_OFF_200 0x3F134
@@ -50,6 +51,7 @@ extern gfx_con_t gfx_con;
 #define ID_SND_OFF_302 0x26080
 #define ID_SND_OFF_400 0x2AF64
 #define ID_SND_OFF_500 0x2AD34
+#define ID_SND_OFF_600 0x2BB8C

 #define ID_RCV_OFF_100 0x219F0
 #define ID_RCV_OFF_200 0x3D1A8
@@ -57,6 +59,7 @@ extern gfx_con_t gfx_con;
 #define ID_RCV_OFF_302 0x240F0
 #define ID_RCV_OFF_400 0x28F6C
 #define ID_RCV_OFF_500 0x28DAC
+#define ID_RCV_OFF_600 0x29B6C

 static u32 PRC_ID_SND_100[] =
 {
@@ -130,6 +133,20 @@ static u32 PRC_ID_RCV_500[] =
 	0xD2FFFFC9, 0xEB09015F, 0x54000040, 0xF9415B08, 0xF9406FEA
 };

+static u32 PRC_ID_SND_600[] =
+{
+	0xA9BF2FEA, 0xF94037EB, 0x2A1503EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9,
+	0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400308, 0xF9401D08, 0xAA1803E0,
+	0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0
+};
+#define FREE_CODE_OFF_2ND_600 (FREE_CODE_OFF_1ST_600 + sizeof(PRC_ID_SND_600) + 4)
+static u32 PRC_ID_RCV_600[] =
+{
+	0xA9BF2FEA, 0xF94043EB, 0x2A1503EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9,
+	0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400308, 0xF9401D08, 0xAA1803E0,
+	0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0
+};
+
 // Include kernel patches here, so we can utilize pkg1 id
 KERNEL_PATCHSET_DEF(_kernel_1_patchset,
 	{ SVC_VERIFY_DS, 0x3764C, _NOP(), NULL },          // Disable SVC verifications
@@ -215,6 +232,20 @@ KERNEL_PATCHSET_DEF(_kernel_5_patchset,
 		_B(FREE_CODE_OFF_2ND_500 + sizeof(PRC_ID_RCV_500), ID_RCV_OFF_500 + 8), NULL}
 );

+KERNEL_PATCHSET_DEF(_kernel_6_patchset,
+	{ SVC_VERIFY_DS, 0x47EA0, _NOP(), NULL },          // Disable SVC verifications
+	{ DEBUG_MODE_EN, 0x57548, _MOVZX(8, 1, 0), NULL }, // Enable Debug Patch
+	// Atmosphère kernel patches.
+	{ ATM_GEN_PATCH, ID_SND_OFF_600, _B(ID_SND_OFF_600, FREE_CODE_OFF_1ST_600), NULL},    // Send process id branch.
+	{ ATM_ARR_PATCH, FREE_CODE_OFF_1ST_600, sizeof(PRC_ID_SND_600) >> 2, PRC_ID_SND_600}, // Send process id code.
+	{ ATM_GEN_PATCH, FREE_CODE_OFF_1ST_600 + sizeof(PRC_ID_SND_600),                      // Branch back and skip 4 instructions.
+		_B(FREE_CODE_OFF_1ST_600 + sizeof(PRC_ID_SND_600), ID_SND_OFF_600 + 0x10), NULL},
+	{ ATM_GEN_PATCH, ID_RCV_OFF_600, _B(ID_RCV_OFF_600, FREE_CODE_OFF_2ND_600), NULL},    // Receive process id branch.
+	{ ATM_ARR_PATCH, FREE_CODE_OFF_2ND_600, sizeof(PRC_ID_RCV_600) >> 2, PRC_ID_RCV_600}, // Receive process id code.
+	{ ATM_GEN_PATCH, FREE_CODE_OFF_2ND_600 + sizeof(PRC_ID_RCV_600),                      // Branch back and skip 4 instructions.
+		_B(FREE_CODE_OFF_2ND_600 + sizeof(PRC_ID_RCV_600), ID_RCV_OFF_600 + 0x10), NULL}
+);
+
 static const pkg2_kernel_id_t _pkg2_kernel_ids[] =
 {
 	{ 0x427f2647, _kernel_1_patchset },   //1.0.0
@@ -223,6 +254,7 @@ static const pkg2_kernel_id_t _pkg2_kernel_ids[] =
 	{ 0xe0e8cdc4, _kernel_302_patchset }, //3.0.2
 	{ 0x485d0157, _kernel_4_patchset },   //4.0.0 - 4.1.0
 	{ 0xf3c363f2, _kernel_5_patchset },   //5.0.0 - 5.1.0
+	{ 0x64ce1a44, _kernel_6_patchset },   //6.0.0
 	{ 0, 0 }                              //End.
 };

@@ -390,26 +422,72 @@ static kip1_patchset_t _fs_patches_510[] =
 	{ NULL, NULL }
 };

+static kip1_patch_t _fs_nosigchk_600[] = 
+{
+	{ KPS(KIP_TEXT) | 0x712A8, 4, "\x8E\x3E\x00\x94", "\xE0\x03\x1F\x2A" },
+	{ KPS(KIP_TEXT) | 0xEB08C, 4, "\xC0\x03\x00\x36", "\x1F\x20\x03\xD5" },
+	{ 0, 0, NULL, NULL }
+};
+
+static kip1_patch_t _fs_nosigchk_600_exfat[] = 
+{
+	{ KPS(KIP_TEXT) | 0x7C9A8, 4, "\x8E\x3E\x00\x94", "\xE0\x03\x1F\x2A" },
+	{ KPS(KIP_TEXT) | 0xF678C, 4, "\xC0\x03\x00\x36", "\x1F\x20\x03\xD5" },
+	{ 0, 0, NULL, NULL }
+};
+
+static kip1_patch_t _fs_nogc_600[] = 
+{
+	{ KPS(KIP_TEXT) | 0x12CC20, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" },
+	{ KPS(KIP_TEXT) | 0x1538F4, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" },
+	{ 0, 0, NULL, NULL }
+};
+
+static kip1_patch_t _fs_nogc_600_exfat[] = 
+{
+	{ KPS(KIP_TEXT) | 0x138320, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" },
+	{ KPS(KIP_TEXT) | 0x15EFF4, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" },
+	{ 0, 0, NULL, NULL }
+};
+
+static kip1_patchset_t _fs_patches_600[] = 
+{
+	{ "nosigchk", _fs_nosigchk_600 },
+	{ "nogc",     _fs_nogc_600 },
+	{ NULL, NULL }
+};
+
+static kip1_patchset_t _fs_patches_600_exfat[] = 
+{
+	{ "nosigchk", _fs_nosigchk_600_exfat },
+	{ "nogc",     _fs_nogc_600_exfat },
+	{ NULL, NULL }
+};
+
 static kip1_id_t _kip_ids[] = 
 {
-	{ "FS", "\xde\x9f\xdd\xa4\x08\x5d\xd5\xfe\x68\xdc\xb2\x0b\x41\x09\x5b\xb4", _fs_patches_100 }, // FS 1.0.0
-	{ "FS", "\xfc\x3e\x80\x99\x1d\xca\x17\x96\x4a\x12\x1f\x04\xb6\x1b\x17\x5e", _fs_patches_100 }, // FS 1.0.0 "exfat"
-	{ "FS", "\xcd\x7b\xbe\x18\xd6\x13\x0b\x28\xf6\x2f\x19\xfa\x79\x45\x53\x5b", _fs_patches_200 }, // FS 2.0.0
-	{ "FS", "\xe7\x66\x92\xdf\xaa\x04\x20\xe9\xfd\xd6\x8e\x43\x63\x16\x18\x18", _fs_patches_200 }, // FS 2.0.0 exfat
-	{ "FS", "\x0d\x70\x05\x62\x7b\x07\x76\x7c\x0b\x96\x3f\x9a\xff\xdd\xe5\x66", _fs_patches_210 }, // FS 2.1.0
-	{ "FS", "\xdb\xd8\x5f\xca\xcc\x19\x3d\xa8\x30\x51\xc6\x64\xe6\x45\x2d\x32", _fs_patches_210 }, // FS 2.1.0 exfat
-	{ "FS", "\xa8\x6d\xa5\xe8\x7e\xf1\x09\x7b\x23\xda\xb5\xb4\xdb\xba\xef\xe7", _fs_patches_300 }, // FS 3.0.0
-	{ "FS", "\x98\x1c\x57\xe7\xf0\x2f\x70\xf7\xbc\xde\x75\x31\x81\xd9\x01\xa6", _fs_patches_300 }, // FS 3.0.0 exfat
-	{ "FS", "\x57\x39\x7c\x06\x3f\x10\xb6\x31\x3f\x4d\x83\x76\x53\xcc\xc3\x71", _fs_patches_30x }, // FS 3.0.1
-	{ "FS", "\x07\x30\x99\xd7\xc6\xad\x7d\x89\x83\xbc\x7a\xdd\x93\x2b\xe3\xd1", _fs_patches_30x }, // FS 3.0.1 exfat
-	{ "FS", "\x06\xe9\x07\x19\x59\x5a\x01\x0c\x62\x46\xff\x70\x94\x6f\x10\xfb", _fs_patches_40x }, // FS 4.0.1
-	{ "FS", "\x54\x9b\x0f\x8d\x6f\x72\xc4\xe9\xf3\xfd\x1f\x19\xea\xce\x4a\x5a", _fs_patches_40x }, // FS 4.0.1 exfat
-	{ "FS", "\x80\x96\xaf\x7c\x6a\x35\xaa\x82\x71\xf3\x91\x69\x95\x41\x3b\x0b", _fs_patches_410 }, // FS 4.1.0
-	{ "FS", "\x02\xd5\xab\xaa\xfd\x20\xc8\xb0\x63\x3a\xa0\xdb\xae\xe0\x37\x7e", _fs_patches_410 }, // FS 4.1.0 exfat
-	{ "FS", "\xa6\xf2\x7a\xd9\xac\x7c\x73\xad\x41\x9b\x63\xb2\x3e\x78\x5a\x0c", _fs_patches_50x }, // FS 5.0.0
-	{ "FS", "\xce\x3e\xcb\xa2\xf2\xf0\x62\xf5\x75\xf8\xf3\x60\x84\x2b\x32\xb4", _fs_patches_50x }, // FS 5.0.0 exfat
-	{ "FS", "\x76\xf8\x74\x02\xc9\x38\x7c\x0f\x0a\x2f\xab\x1b\x45\xce\xbb\x93", _fs_patches_510 }, // FS 5.1.0
-	{ "FS", "\x10\xb2\xd8\x16\x05\x48\x85\x99\xdf\x22\x42\xcb\x6b\xac\x2d\xf1", _fs_patches_510 }, // FS 5.1.0 exfat
+	{ "FS", "\xde\x9f\xdd\xa4\x08\x5d\xd5\xfe\x68\xdc\xb2\x0b\x41\x09\x5b\xb4", _fs_patches_100 },       // FS 1.0.0
+	{ "FS", "\xfc\x3e\x80\x99\x1d\xca\x17\x96\x4a\x12\x1f\x04\xb6\x1b\x17\x5e", _fs_patches_100 },       // FS 1.0.0 exfat
+	{ "FS", "\xcd\x7b\xbe\x18\xd6\x13\x0b\x28\xf6\x2f\x19\xfa\x79\x45\x53\x5b", _fs_patches_200 },       // FS 2.0.0
+	{ "FS", "\xe7\x66\x92\xdf\xaa\x04\x20\xe9\xfd\xd6\x8e\x43\x63\x16\x18\x18", _fs_patches_200 },       // FS 2.0.0 exfat
+	{ "FS", "\x0d\x70\x05\x62\x7b\x07\x76\x7c\x0b\x96\x3f\x9a\xff\xdd\xe5\x66", _fs_patches_210 },       // FS 2.1.0
+	{ "FS", "\xdb\xd8\x5f\xca\xcc\x19\x3d\xa8\x30\x51\xc6\x64\xe6\x45\x2d\x32", _fs_patches_210 },       // FS 2.1.0 exfat
+	{ "FS", "\xa8\x6d\xa5\xe8\x7e\xf1\x09\x7b\x23\xda\xb5\xb4\xdb\xba\xef\xe7", _fs_patches_300 },       // FS 3.0.0
+	{ "FS", "\x98\x1c\x57\xe7\xf0\x2f\x70\xf7\xbc\xde\x75\x31\x81\xd9\x01\xa6", _fs_patches_300 },       // FS 3.0.0 exfat
+	{ "FS", "\x57\x39\x7c\x06\x3f\x10\xb6\x31\x3f\x4d\x83\x76\x53\xcc\xc3\x71", _fs_patches_30x },       // FS 3.0.1
+	{ "FS", "\x07\x30\x99\xd7\xc6\xad\x7d\x89\x83\xbc\x7a\xdd\x93\x2b\xe3\xd1", _fs_patches_30x },       // FS 3.0.1 exfat
+	{ "FS", "\x06\xe9\x07\x19\x59\x5a\x01\x0c\x62\x46\xff\x70\x94\x6f\x10\xfb", _fs_patches_40x },       // FS 4.0.1
+	{ "FS", "\x54\x9b\x0f\x8d\x6f\x72\xc4\xe9\xf3\xfd\x1f\x19\xea\xce\x4a\x5a", _fs_patches_40x },       // FS 4.0.1 exfat
+	{ "FS", "\x80\x96\xaf\x7c\x6a\x35\xaa\x82\x71\xf3\x91\x69\x95\x41\x3b\x0b", _fs_patches_410 },       // FS 4.1.0
+	{ "FS", "\x02\xd5\xab\xaa\xfd\x20\xc8\xb0\x63\x3a\xa0\xdb\xae\xe0\x37\x7e", _fs_patches_410 },       // FS 4.1.0 exfat
+	{ "FS", "\xa6\xf2\x7a\xd9\xac\x7c\x73\xad\x41\x9b\x63\xb2\x3e\x78\x5a\x0c", _fs_patches_50x },       // FS 5.0.0
+	{ "FS", "\xce\x3e\xcb\xa2\xf2\xf0\x62\xf5\x75\xf8\xf3\x60\x84\x2b\x32\xb4", _fs_patches_50x },       // FS 5.0.0 exfat
+	{ "FS", "\x76\xf8\x74\x02\xc9\x38\x7c\x0f\x0a\x2f\xab\x1b\x45\xce\xbb\x93", _fs_patches_510 },       // FS 5.1.0
+	{ "FS", "\x10\xb2\xd8\x16\x05\x48\x85\x99\xdf\x22\x42\xcb\x6b\xac\x2d\xf1", _fs_patches_510 },       // FS 5.1.0 exfat
+	{ "FS", "\x1b\x82\xcb\x22\x18\x67\xcb\x52\xc4\x4a\x86\x9e\xa9\x1a\x1a\xdd", _fs_patches_600 }, 		 // FS 6.0.0-4.0
+	{ "FS", "\x96\x6a\xdd\x3d\x20\xb6\x27\x13\x2c\x5a\x8d\xa4\x9a\xc9\xd8\xdd", _fs_patches_600_exfat }, // FS 6.0.0-4.0 exfat
+	{ "FS", "\x3a\x57\x4d\x43\x61\x86\x19\x1d\x17\x88\xeb\x2c\x0f\x07\x6b\x11", _fs_patches_600 }, 		 // FS 6.0.0-5.0
+	{ "FS", "\x33\x05\x53\xf6\xb5\xfb\x55\xc4\xc2\xd7\xb7\x36\x24\x02\x76\xb3", _fs_patches_600_exfat }  // FS 6.0.0-5.0 exfat
 };

 const pkg2_kernel_id_t *pkg2_identify(u32 id)
--- a/bootloader/ianos/ianos.c
+++ b/bootloader/ianos/ianos.c
@@ -95,8 +95,13 @@ int ianos_loader(bool sdmount, char *path, elfType_t type, void *moduleConfig)
 	int res = 0;

 	if (sdmount)
+	{
 		if (!sd_mount())
-			goto elfLoadFinalOut;	
+		{
+			res = 0xFFFF;
+			goto elfLoadFinalOut;
+		}
+	}

 	fileBuf = sd_file_read(path);

--- a/bootloader/main.c
+++ b/bootloader/main.c
@@ -4,6 +4,7 @@
 * Copyright (c) 2018 Rajko Stojadinovic
 * Copyright (c) 2018 CTCaer
 * Copyright (c) 2018 Reisyukaku
+ * Copyright (c) 2018 balika011
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
@@ -59,9 +60,6 @@
 #include "ianos/ianos.h"
 #include "utils/dirlist.h"

-#define BLVERSIONMJ 4
-#define BLVERSIONMN 0
-
 #define BOOTLOADER_UPDATED_MAGIC_ADDR 0x4003E000
 #define BOOTLOADER_UPDATED_MAGIC 0x424f4f54

@@ -79,7 +77,7 @@ gfx_con_t gfx_con;
 sdmmc_t sd_sdmmc;
 sdmmc_storage_t sd_storage;
 FATFS sd_fs;
-bool sd_mounted;
+static bool sd_mounted;

 #ifdef MENU_LOGO_ENABLE
 u8 *Kc_MENU_LOGO;
@@ -94,7 +92,7 @@ bool sd_mount()

 	if (!sdmmc_storage_init_sd(&sd_storage, &sd_sdmmc, SDMMC_1, SDMMC_BUS_WIDTH_4, 11))
 	{
-		EPRINTF("Failed to init SD card.\nMake sure that it is inserted.");
+		EPRINTF("Failed to init SD card.\nMake sure that it is inserted.\nOr that SD reader is properly seated!");
 	}
 	else
 	{
@@ -222,6 +220,58 @@ void panic(u32 val)
 		;
 }

+void reboot_normal()
+{
+	sd_unmount();
+#ifdef MENU_LOGO_ENABLE
+	free(Kc_MENU_LOGO);
+#endif //MENU_LOGO_ENABLE
+	display_end();
+	panic(0x21); // Bypass fuse programming in package1.
+}
+
+void reboot_rcm()
+{
+	sd_unmount();
+#ifdef MENU_LOGO_ENABLE
+	free(Kc_MENU_LOGO);
+#endif //MENU_LOGO_ENABLE
+	display_end();
+	PMC(APBDEV_PMC_SCRATCH0) = 2; // Reboot into rcm.
+	PMC(0) |= 0x10;
+	while (true)
+		usleep(1);
+}
+
+void power_off()
+{
+	sd_unmount();
+#ifdef MENU_LOGO_ENABLE
+	free(Kc_MENU_LOGO);
+#endif //MENU_LOGO_ENABLE
+	//TODO: we should probably make sure all regulators are powered off properly.
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_PWR_OFF);
+}
+
+void check_power_off_from_hos()
+{
+	// Power off on AutoRCM wakeup from HOS shutdown. For modchips/dongles.
+	u8 hosWakeup = i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_IRQTOP);
+	if (hosWakeup & MAX77620_IRQ_TOP_RTC_MASK)
+	{
+		gfx_clear_grey(&gfx_ctxt, 0x1B);
+		u8 *BOOTLOGO = (void *)malloc(0x4000);
+		blz_uncompress_srcdest(BOOTLOGO_BLZ, SZ_BOOTLOGO_BLZ, BOOTLOGO, SZ_BOOTLOGO);
+		gfx_set_rect_grey(&gfx_ctxt, BOOTLOGO, X_BOOTLOGO, Y_BOOTLOGO, 326, 544);
+		usleep(2000000);
+		display_backlight_brightness(10, 5000);
+		display_backlight_brightness(100, 25000);
+		usleep(600000);
+		display_backlight_brightness(0, 20000);
+		power_off();
+	}
+}
+
 void config_oscillators()
 {
 	CLOCK(CLK_RST_CONTROLLER_SPARE_REG0) = (CLOCK(CLK_RST_CONTROLLER_SPARE_REG0) & 0xFFFFFFF3) | 4;
@@ -336,6 +386,7 @@ void config_se_brom()
 	// Clear the boot reason to avoid problems later
 	PMC(APBDEV_PMC_SCRATCH200) = 0x0;
 	PMC(APBDEV_PMC_RST_STATUS) = 0x0;
+	APB_MISC(APB_MISC_PP_STRAPPING_OPT_A) = 0x1C00;
 }

 void config_hw()
@@ -350,7 +401,7 @@ void config_hw()
 	clock_enable_se();

 	// Enable fuse clock.
-	clock_enable_fuse(1);
+	clock_enable_fuse(true);
 	// Disable fuse programming.
 	fuse_disable_program();

@@ -368,38 +419,37 @@ void config_hw()
 	clock_enable_i2c(I2C_1);
 	clock_enable_i2c(I2C_5);

-	static const clock_t clock_unk1 = { CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, 0x42C, 0x1F, 0, 0 };
-	static const clock_t clock_unk2 = { CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, 0, 0x1E, 0, 0 };
-	clock_enable(&clock_unk1);
-	clock_enable(&clock_unk2);
+	clock_enable_unk2();

 	i2c_init(I2C_1);
 	i2c_init(I2C_5);

-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_CNFGBBC, 0x40);
-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_ONOFFCNFG1, 0x78);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CNFGBBC, 0x40);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, 0x78);

-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_FPS_CFG0, 0x38);
-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_FPS_CFG1, 0x3A);
-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_FPS_CFG2, 0x38);
-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_FPS_LDO4, 0xF);
-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_FPS_LDO8, 0xC7);
-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_FPS_SD0, 0x4F);
-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_FPS_SD1, 0x29);
-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_FPS_SD3, 0x1B);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG0, 0x38);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG1, 0x3A);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG2, 0x38);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_LDO4, 0xF);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_LDO8, 0xC7);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_SD0, 0x4F);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_SD1, 0x29);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_SD3, 0x1B);

-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_SD0, 42); //42 = (1125000 - 600000) / 12500 -> 1.125V
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_GPIO3, 0x22); // 3.x+

-	config_pmc_scratch();
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_SD0, 42); //42 = (1125000 - 600000) / 12500 -> 1.125V
+
+	config_pmc_scratch(); // Missing from 4.x+

 	CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = (CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) & 0xFFFF8888) | 0x3333;

-	mc_config_carveout();
+	mc_config_carveout(); // Missing from 4.x+

 	sdram_init();
 }

-void reconfig_hw_workaround(bool extra_reconfig)
+void reconfig_hw_workaround(bool extra_reconfig, u32 magic)
 {
 	// Re-enable clocks to Audio Processing Engine as a workaround to hanging.
 	CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_V) |= 0x400; // Enable AHUB clock.
@@ -420,6 +470,15 @@ void reconfig_hw_workaround(bool extra_reconfig)

 	// Power off display.
 	display_end();
+
+	// Enable clock to USBD and init SDMMC1 to avoid hangs with bad hw inits.
+	if (magic == 0xBAADF00D)
+	{
+		CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_L) |= (1 << 22);
+		sdmmc_init(&sd_sdmmc, SDMMC_1, SDMMC_POWER_3_3, SDMMC_BUS_WIDTH_1, 5, 0);
+
+		msleep(500);
+	}
 }

 void print_fuseinfo()
@@ -773,37 +832,6 @@ out:
 	free(pkg1);
 }

-void reboot_normal()
-{
-	sd_unmount();
-#ifdef MENU_LOGO_ENABLE
-	free(Kc_MENU_LOGO);
-#endif //MENU_LOGO_ENABLE
-	panic(0x21); // Bypass fuse programming in package1.
-}
-
-void reboot_rcm()
-{
-	sd_unmount();
-#ifdef MENU_LOGO_ENABLE
-	free(Kc_MENU_LOGO);
-#endif //MENU_LOGO_ENABLE
-	PMC(APBDEV_PMC_SCRATCH0) = 2; // Reboot into rcm.
-	PMC(0) |= 0x10;
-	while (true)
-		usleep(1);
-}
-
-void power_off()
-{
-	sd_unmount();
-#ifdef MENU_LOGO_ENABLE
-	free(Kc_MENU_LOGO);
-#endif //MENU_LOGO_ENABLE
-	//TODO: we should probably make sure all regulators are powered off properly.
-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_PWR_OFF);
-}
-
 int dump_emmc_verify(sdmmc_storage_t *storage, u32 lba_curr, char *outFilename, emmc_part_t *part)
 {
 	FIL fp;
@@ -915,6 +943,7 @@ int dump_emmc_part(char *sd_path, sdmmc_storage_t *storage, emmc_part_t *part)
 	u32 currPartIdx = 0;
 	u32 numSplitParts = 0;
 	u32 maxSplitParts = 0;
+	u32 btn = 0;
 	bool isSmallSdCard = false;
 	bool partialDumpInProgress = false;
 	int res = 0;
@@ -1011,6 +1040,24 @@ int dump_emmc_part(char *sd_path, sdmmc_storage_t *storage, emmc_part_t *part)

 	FIL fp;
 	gfx_con_getpos(&gfx_con, &gfx_con.savedx, &gfx_con.savedy);
+	if (!f_open(&fp, outFilename, FA_READ))
+	{
+		f_close(&fp);
+		gfx_con.fntsz = 16;
+		
+		WPRINTF("An existing backup has been detected!");
+		WPRINTF("Press POWER to Continue.\nPress VOL to go to the menu.\n");
+		msleep(500);
+
+		u32 btn = btn_wait();
+		if (btn & BTN_POWER)
+			btn = 0;
+		else
+			return 0;
+		gfx_con.fntsz = 8;
+		gfx_clear_partial_grey(&gfx_ctxt, 0x1B, gfx_con.savedy, 48);
+	}
+	gfx_con_setpos(&gfx_con, gfx_con.savedx, gfx_con.savedy);
 	gfx_printf(&gfx_con, "Filename: %s\n\n", outFilename);
 	res = f_open(&fp, outFilename, FA_CREATE_ALWAYS | FA_WRITE);
 	if (res)
@@ -1020,12 +1067,6 @@ int dump_emmc_part(char *sd_path, sdmmc_storage_t *storage, emmc_part_t *part)

 		return 0;
 	}
-	u64 totalSize = (u64)((u64)totalSectors << 9);
-	if (!isSmallSdCard && sd_fs.fs_type == FS_EXFAT)
-		f_lseek(&fp, totalSize);
-	else
-		f_lseek(&fp, MIN(totalSize, multipartSplitSize));
-	f_lseek(&fp, 0);

 	u32 numSectorsPerIter = 0;
 	if (totalSectors > 0x200000)
@@ -1047,6 +1088,12 @@ int dump_emmc_part(char *sd_path, sdmmc_storage_t *storage, emmc_part_t *part)
 		totalSectors -= currPartIdx * (multipartSplitSize / NX_EMMC_BLOCKSIZE);
 		lbaStartPart = lba_curr; // Update the start LBA for verification.
 	}
+	u64 totalSize = (u64)((u64)totalSectors << 9);
+	if (!isSmallSdCard && sd_fs.fs_type == FS_EXFAT)
+		f_lseek(&fp, totalSize);
+	else
+		f_lseek(&fp, MIN(totalSize, multipartSplitSize));
+	f_lseek(&fp, 0);

 	u32 num = 0;
 	u32 pct = 0;
@@ -1183,6 +1230,21 @@ int dump_emmc_part(char *sd_path, sdmmc_storage_t *storage, emmc_part_t *part)
 			f_sync(&fp);
 			bytesWritten = 0;
 		}
+
+		btn = btn_wait_timeout(0, BTN_VOL_DOWN | BTN_VOL_UP);
+		if ((btn & BTN_VOL_DOWN) && (btn & BTN_VOL_UP))
+		{
+			gfx_con.fntsz = 16;
+			WPRINTF("\n\nThe backup was cancelled!");
+			EPRINTF("\nPress any key and try again...\n");
+			msleep(1500);
+
+			free(buf);
+			f_close(&fp);
+			f_unlink(outFilename);
+
+			return 0;
+		}
 	}
 	tui_pbar(&gfx_con, 0, gfx_con.y, 100, 0xFFCCCCCC, 0xFF555555);

@@ -1753,9 +1815,9 @@ void (*ext_payload_ptr)() = (void *)EXT_PAYLOAD_ADDR;

 void reloc_patcher(u32 payload_size)
 {
-	const u32 START_OFF = 0x7C;
-	const u32 PAYLOAD_END_OFF = 0x84;
-	const u32 IPL_START_OFF = 0x88;
+	static const u32 START_OFF = 0x7C;
+	static const u32 PAYLOAD_END_OFF = 0x84;
+	static const u32 IPL_START_OFF = 0x88;

 	memcpy((u8 *)EXT_PAYLOAD_ADDR, (u8 *)IPL_START, PATCHED_RELOC_SZ);

@@ -1806,7 +1868,12 @@ int launch_payload(char *path, bool update)
 		}

 		f_close(&fp);
-		free(path);
+		if (!update)
+		{
+			free(path);
+			path = NULL;
+		}
+			

 		if (update)
 		{
@@ -1833,14 +1900,14 @@ int launch_payload(char *path, bool update)
 		{
 			if (!update)
 				reloc_patcher(ALIGN(size, 0x10));
-			reconfig_hw_workaround(0);
+			reconfig_hw_workaround(false, byte_swap_32(*(u32 *)(buf + size - sizeof(u32))));
 		}
 		else
 		{
 			reloc_patcher(0x7000);
 			if (*(vu32 *)CBFS_SDRAM_EN_ADDR != 0x4452414D)
 				return 1;
-			reconfig_hw_workaround(1);
+			reconfig_hw_workaround(true, 0);
 		}

 		// Launch our payload.
@@ -1957,7 +2024,10 @@ void launch_tools(u8 type)
 		if (!type)
 		{
 			if (launch_payload(dir, false))
+			{
 				EPRINTF("Failed to launch payload.");
+				free(dir);
+			}
 		}
 		else
 			ianos_loader(true, dir, DRAM_LIB, NULL);
@@ -2118,23 +2188,26 @@ void launch_firmware()
 				if ((i - 4) > max_entries)
 					break;
 			}
-			if (i > 5)
+			if (i < 6)
 			{
-				memset(&ments[i], 0, sizeof(ment_t));
-				menu_t menu = {
-					ments, "Launch configurations", 0, 0
-				};
-				cfg_sec = ini_clone_section((ini_sec_t *)tui_do_menu(&gfx_con, &menu));
-				if (!cfg_sec)
-				{
-					free(ments);
-					ini_free(&ini_sections);
-					sd_unmount();
-					return;
-				}
+				ments[i].type = MENT_CAPTION;
+				ments[i].caption = "No main configurations found...";
+				ments[i].color = 0xFFFFDD00;
+				i++;
 			}
-			else
-				EPRINTF("No launch configurations found.");
+			memset(&ments[i], 0, sizeof(ment_t));
+			menu_t menu = {
+				ments, "Launch configurations", 0, 0
+			};
+			cfg_sec = ini_clone_section((ini_sec_t *)tui_do_menu(&gfx_con, &menu));
+			if (!cfg_sec)
+			{
+				free(ments);
+				ini_free(&ini_sections);
+				sd_unmount();
+				return;
+			}
+
 			free(ments);
 			ini_free(&ini_sections);
 		}
@@ -2144,8 +2217,8 @@ void launch_firmware()

 	if (!cfg_sec)
 	{
-		gfx_printf(&gfx_con, "\nUsing default launch configuration...\n\n");
-		gfx_puts(&gfx_con, "Press POWER to Continue.\nPress VOL to go to the menu.\n\n\n");
+		gfx_puts(&gfx_con, "\nPress POWER to Continue.\nPress VOL to go to the menu.\n\n");
+		gfx_printf(&gfx_con, "\nUsing default launch configuration...\n\n\n");

 		u32 btn = btn_wait();
 		if (!(btn & BTN_POWER))
@@ -2187,6 +2260,7 @@ void auto_launch_firmware()

 	u8 *BOOTLOGO = NULL;
 	char *payload_path = NULL;
+	FIL fp;

 	struct _bmp_data
 	{
@@ -2199,7 +2273,6 @@ void auto_launch_firmware()
 	};

 	struct _bmp_data bmpData;
-	bool backlightEnabled = false;
 	bool bootlogoFound = false;
 	char *bootlogoCustomEntry = NULL;

@@ -2211,6 +2284,11 @@ void auto_launch_firmware()

 	if (sd_mount())
 	{
+		if (f_open(&fp, "bootloader/hekate_ipl.ini", FA_READ))
+			create_config_entry();
+		else
+			f_close(&fp);
+
 		if (ini_parse(&ini_sections, "bootloader/hekate_ipl.ini", false))
 		{
 			u32 configEntry = 0;
@@ -2237,6 +2315,8 @@ void auto_launch_firmware()
 								h_cfg.customlogo = atoi(kv->val);
 							else if (!strcmp("verification", kv->key))
 								h_cfg.verification = atoi(kv->val);
+							else if (!strcmp("backlight", kv->key))
+								h_cfg.backlight = atoi(kv->val);
 						}
 						boot_entry_id++;
 						continue;
@@ -2260,7 +2340,6 @@ void auto_launch_firmware()
 			if (h_cfg.autoboot_list)
 			{
 				ini_free(&ini_sections);
-				list_init(&ini_sections);
 				ini_free_section(cfg_sec);
 				boot_entry_id = 1;
 				bootlogoCustomEntry = NULL;
@@ -2376,8 +2455,7 @@ void auto_launch_firmware()
 	}
 	free(BOOTLOGO);

-	display_backlight(true);
-	backlightEnabled = 1;
+	display_backlight_brightness(h_cfg.backlight, 1000);

 	// Wait before booting. If VOL- is pressed go into bootloader menu.
 	u32 btn = btn_wait_timeout(h_cfg.bootwait * 1000, BTN_VOL_DOWN);
@@ -2418,9 +2496,6 @@ out:

 	sd_unmount();
 	gfx_con.mute = false;
-
-	if (!backlightEnabled)
-		display_backlight(true);
 }

 void toggle_autorcm(bool enable)
@@ -2908,6 +2983,78 @@ void fix_battery_desync()
 	btn_wait();
 }

+void ipatch_process(u32 offset, u32 value)
+{
+	gfx_printf(&gfx_con, "%8x %8x", BOOTROM_BASE + offset, value);
+	u8 lo = value & 0xff;
+	switch (value >> 8)
+	{
+	case 0xdf:
+		gfx_printf(&gfx_con, "    svc #0x%02x", lo);
+		break;
+	case 0x20:
+		gfx_printf(&gfx_con, "    movs r0, #0x%02x", lo);
+		break;
+	}
+	gfx_puts(&gfx_con, "\n");
+}
+
+void bootrom_ipatches_info()
+{
+	gfx_clear_partial_grey(&gfx_ctxt, 0x1B, 0, 1256);
+	gfx_con_setpos(&gfx_con, 0, 0);
+	
+	u32 res = fuse_read_ipatch(ipatch_process);
+	if (res != 0)
+		EPRINTFARGS("Failed to read ipatches. Error: %d", res);
+	
+	gfx_puts(&gfx_con, "\nPress POWER to dump them to SD Card.\nPress VOL to go to the menu.\n");
+	
+	u32 btn = btn_wait();
+	if (btn & BTN_POWER)
+	{
+		if (sd_mount())
+		{
+			char path[64];
+			u32 iram_evp_thunks[0x200];
+			u32 iram_evp_thunks_len = sizeof(iram_evp_thunks);
+			res = fuse_read_evp_thunk(iram_evp_thunks, &iram_evp_thunks_len);
+			if (res == 0)
+			{
+				emmcsn_path_impl(path, "/dumps", "evp_thunks.bin", NULL);
+				if (!sd_save_to_file((u8 *)iram_evp_thunks, iram_evp_thunks_len, path))
+					gfx_puts(&gfx_con, "\nevp_thunks.bin saved!\n");
+			}
+			else
+				EPRINTFARGS("Failed to read evp_thunks. Error: %d", res);
+			
+			u32 words[0x100];
+			read_raw_ipatch_fuses(words);
+			emmcsn_path_impl(path, "/dumps", "ipatches.bin", NULL);
+			if (!sd_save_to_file((u8 *)words, sizeof(words), path))
+				gfx_puts(&gfx_con, "\nipatches.bin saved!\n");
+			
+			emmcsn_path_impl(path, "/dumps", "bootrom_patched.bin", NULL);
+			if (!sd_save_to_file((u8 *)BOOTROM_BASE, BOOTROM_SIZE, path))
+				gfx_puts(&gfx_con, "\nbootrom_patched.bin saved!\n");
+			
+			u8 ipatch_backup[13];
+			memcpy(ipatch_backup, (void *) IPATCH_BASE, 13);
+			memset((void*)IPATCH_BASE, 0, 13);
+			
+			emmcsn_path_impl(path, "/dumps", "bootrom_unpatched.bin", NULL);
+			if (!sd_save_to_file((u8 *)BOOTROM_BASE, BOOTROM_SIZE, path))
+				gfx_puts(&gfx_con, "\nbootrom_unpatched.bin saved!\n");
+			
+			memcpy((void*)IPATCH_BASE, ipatch_backup, 13);
+			
+			sd_unmount();
+		}
+
+		btn_wait();
+	}
+}
+
 void about()
 {
 	static const char credits[] =
@@ -2967,6 +3114,7 @@ ment_t ment_options[] = {
 	MDEF_HANDLER("Auto boot", config_autoboot),
 	MDEF_HANDLER("Boot time delay", config_bootdelay),
 	MDEF_HANDLER("Custom boot logo", config_customlogo),
+	MDEF_HANDLER("Backlight", config_backlight),
 	MDEF_END()
 };

@@ -2979,6 +3127,7 @@ ment_t ment_cinfo[] = {
 	MDEF_BACK(),
 	MDEF_CHGLINE(),
 	MDEF_CAPTION("---- SoC Info ----", 0xFF0AB9E6),
+	MDEF_HANDLER("Ipatches & bootrom info", bootrom_ipatches_info),
 	MDEF_HANDLER("Print fuse info", print_fuseinfo),
 	MDEF_HANDLER("Print kfuse info", print_kfuseinfo),
 	MDEF_HANDLER("Print TSEC keys", print_tsec_key),
@@ -3059,7 +3208,7 @@ menu_t menu_tools = {

 ment_t ment_top[] = {
 	MDEF_HANDLER("Launch", launch_firmware),
-	MDEF_MENU("Launch options", &menu_options),
+	MDEF_MENU("Options", &menu_options),
 	MDEF_CAPTION("---------------", 0xFF444444),
 	MDEF_MENU("Tools", &menu_tools),
 	MDEF_MENU("Console info", &menu_cinfo),
@@ -3073,7 +3222,7 @@ ment_t ment_top[] = {
 };
 menu_t menu_top = {
 	ment_top,
-	"hekate - CTCaer mod v4.0", 0, 0
+	"hekate - CTCaer mod v4.1", 0, 0
 };

 extern void pivot_stack(u32 stack_top);
@@ -3081,7 +3230,7 @@ extern void pivot_stack(u32 stack_top);
 void ipl_main()
 {
 	// Skip config if we just updated the bootloader.
-	if (*(u32 *)BOOTLOADER_UPDATED_MAGIC_ADDR != BOOTLOADER_UPDATED_MAGIC)
+	if (*(vu32 *)BOOTLOADER_UPDATED_MAGIC_ADDR != BOOTLOADER_UPDATED_MAGIC)
 		config_hw();

 	//Pivot the stack so we have enough space.
@@ -3093,13 +3242,17 @@ void ipl_main()
 	//uart_send(UART_C, (u8 *)0x40000000, 0x10000);
 	//uart_wait_idle(UART_C, UART_TX_IDLE);

+	// Set bootloader's default configuration.
+	set_default_configuration();
+
 	// Save sdram lp0 config.
-	ianos_loader(true, "bootloader/sys/libsys_lp0.bso", DRAM_LIB, (void *)sdram_get_params());
+	if (ianos_loader(true, "bootloader/sys/libsys_lp0.bso", DRAM_LIB, (void *)sdram_get_params()))
+		h_cfg.errors |= ERR_LIBSYS_LP0;

 	display_init();

 	u32 *fb = display_init_framebuffer();
-	gfx_init_ctxt(&gfx_ctxt, fb, 720, 1280, 768);
+	gfx_init_ctxt(&gfx_ctxt, fb, 720, 1280, 720);

 #ifdef MENU_LOGO_ENABLE
 	Kc_MENU_LOGO = (u8 *)malloc(0x6000);
@@ -3108,16 +3261,17 @@ void ipl_main()

 	gfx_con_init(&gfx_con, &gfx_ctxt);

-	// Enable backlight after initializing gfx
-	//display_backlight(true);
+	display_backlight_pwm_init();
+	//display_backlight_brightness(h_cfg.backlight, 1000);
+
+	check_power_off_from_hos();

-	set_default_configuration();
 	// Load saved configuration and auto boot if enabled.
 	auto_launch_firmware();

-	while (1)
+	while (true)
 		tui_do_menu(&gfx_con, &menu_top);

-	while (1)
+	while (true)
 		;
 }
--- a/bootloader/mem/heap.c
+++ b/bootloader/mem/heap.c
@@ -124,6 +124,6 @@ void *calloc(u32 num, u32 size)

 void free(void *buf)
 {
-	if (buf != NULL)
+	if ((buf != NULL) || ((u32)buf > (_heap.start - 1)))
 		_heap_free(&_heap, (u32)buf);
 }
--- a/bootloader/mem/sdram.c
+++ b/bootloader/mem/sdram.c
@@ -507,8 +507,8 @@ void sdram_init()
 	//TODO: sdram_id should be in [0,4].
 	const sdram_params_t *params = (const sdram_params_t *)sdram_get_params();

-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_SD_CFG2, 0x05);
-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_SD1, 40); //40 = (1000 * 1100 - 600000) / 12500 -> 1.1V
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_SD_CFG2, 0x05);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_SD1, 40); //40 = (1000 * 1100 - 600000) / 12500 -> 1.1V

 	PMC(APBDEV_PMC_VDDP_SEL) = params->pmc_vddp_sel;
 	usleep(params->pmc_vddp_sel_wait);
--- a/bootloader/power/max77620.h
+++ b/bootloader/power/max77620.h
@@ -11,6 +11,8 @@
 #ifndef _MFD_MAX77620_H_
 #define _MFD_MAX77620_H_

+#define MAX77620_I2C_ADDR 0x3C
+
 /* GLOBAL, PMIC, GPIO, FPS, ONOFFC, CID Registers */
 #define MAX77620_REG_CNFGGLBL1			0x00
 #define MAX77620_REG_CNFGGLBL2			0x01
--- a/bootloader/power/max7762x.c
+++ b/bootloader/power/max7762x.c
@@ -68,8 +68,8 @@ int max77620_regulator_get_status(u32 id)
 	const max77620_regulator_t *reg = &_pmic_regulators[id];

 	if (reg->type == REGULATOR_SD)
-		return (i2c_recv_byte(I2C_5, 0x3C, MAX77620_REG_STATSD) & reg->status_mask) ? 0 : 1;
-	return (i2c_recv_byte(I2C_5, 0x3C, reg->cfg_addr) & 8) ? 1 : 0;
+		return (i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_STATSD) & reg->status_mask) ? 0 : 1;
+	return (i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, reg->cfg_addr) & 8) ? 1 : 0;
 }

 int max77620_regulator_config_fps(u32 id)
@@ -79,7 +79,7 @@ int max77620_regulator_config_fps(u32 id)

 	const max77620_regulator_t *reg = &_pmic_regulators[id];

-	i2c_send_byte(I2C_5, 0x3C, reg->fps_addr, (reg->fps_src << 6) | (reg->pu_period << 3) | (reg->pd_period));
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, reg->fps_addr, (reg->fps_src << 6) | (reg->pu_period << 3) | (reg->pd_period));

 	return 1;
 }
@@ -95,9 +95,9 @@ int max77620_regulator_set_voltage(u32 id, u32 mv)
 		return 0;

 	u32 mult = (mv + reg->mv_step - 1 - reg->mv_min) / reg->mv_step;
-	u8 val = i2c_recv_byte(I2C_5, 0x3C, reg->volt_addr);
+	u8 val = i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, reg->volt_addr);
 	val = (val & ~reg->volt_mask) | (mult & reg->volt_mask);
-	i2c_send_byte(I2C_5, 0x3C, reg->volt_addr, val);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, reg->volt_addr, val);
 	usleep(1000);

 	return 1;
@@ -111,12 +111,12 @@ int max77620_regulator_enable(u32 id, int enable)
 	const max77620_regulator_t *reg = &_pmic_regulators[id];

 	u32 addr = reg->type == REGULATOR_SD ? reg->cfg_addr : reg->volt_addr;
-	u8 val = i2c_recv_byte(I2C_5, 0x3C, addr);
+	u8 val = i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, addr);
 	if (enable)
 		val = (val & ~reg->enable_mask) | ((3 << reg->enable_shift) & reg->enable_mask);
 	else
 		val &= ~reg->enable_mask;
-	i2c_send_byte(I2C_5, 0x3C, addr, val);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, addr, val);
 	usleep(1000);

 	return 1;
@@ -126,16 +126,17 @@ void max77620_config_default()
 {
 	for (u32 i = 1; i <= REGULATOR_MAX; i++)
 	{
-		i2c_recv_byte(I2C_5, 0x3C, MAX77620_REG_CID4);
+		i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CID4);
 		max77620_regulator_config_fps(i);
 		max77620_regulator_set_voltage(i, _pmic_regulators[i].mv_default);
 		if (_pmic_regulators[i].fps_src != MAX77620_FPS_SRC_NONE)
 			max77620_regulator_enable(i, 1);
 	}
-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_SD_CFG2, 4);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_SD_CFG2, 4);
 }

 void max77620_low_battery_monitor_config()
 {
-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_CNFGGLBL1, MAX77620_CNFGGLBL1_LBDAC_EN | MAX77620_CNFGGLBL1_LBHYST_N | MAX77620_CNFGGLBL1_LBDAC_N);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CNFGGLBL1,
+		MAX77620_CNFGGLBL1_LBDAC_EN | MAX77620_CNFGGLBL1_LBHYST_N | MAX77620_CNFGGLBL1_LBDAC_N);
 }
--- a/bootloader/power/max7762x.h
+++ b/bootloader/power/max7762x.h
@@ -59,6 +59,51 @@
 #define REGULATOR_LDO8 12
 #define REGULATOR_MAX 12

+#define MAX77621_CPU_I2C_ADDR 0x1B
+#define MAX77621_GPU_I2C_ADDR 0x1C
+
+#define MAX77621_VOUT_REG 0
+#define MAX77621_VOUT_DVC_REG 1
+#define MAX77621_CONTROL1_REG 2
+#define MAX77621_CONTROL2_REG 3
+
+/* MAX77621_VOUT */
+#define MAX77621_VOUT_ENABLE  (1 << 7)
+#define MAX77621_VOUT_MASK    0x7F
+
+/* MAX77621_VOUT_DVC_DVS */
+#define MAX77621_DVS_VOUT_MASK 0x7F
+
+/* MAX77621_CONTROL1 */
+#define MAX77621_SNS_ENABLE        (1 << 7)
+#define MAX77621_FPWM_EN_M         (1 << 6)
+#define MAX77621_NFSR_ENABLE       (1 << 5)
+#define MAX77621_AD_ENABLE         (1 << 4)
+#define MAX77621_BIAS_ENABLE       (1 << 3)
+#define MAX77621_FREQSHIFT_9PER    (1 << 2)
+
+#define MAX77621_RAMP_12mV_PER_US  0x0
+#define MAX77621_RAMP_25mV_PER_US  0x1
+#define MAX77621_RAMP_50mV_PER_US  0x2
+#define MAX77621_RAMP_200mV_PER_US 0x3
+#define MAX77621_RAMP_MASK         0x3
+
+/* MAX77621_CONTROL2 */
+#define MAX77621_WDTMR_ENABLE    (1 << 6)
+#define MAX77621_DISCH_ENBABLE   (1 << 5)
+#define MAX77621_FT_ENABLE		 (1 << 4)
+#define MAX77621_T_JUNCTION_120	 (1 << 7)
+
+#define MAX77621_CKKADV_TRIP_DISABLE              0xC
+#define MAX77621_CKKADV_TRIP_75mV_PER_US          0x0
+#define MAX77621_CKKADV_TRIP_150mV_PER_US         0x4
+#define MAX77621_CKKADV_TRIP_75mV_PER_US_HIST_DIS 0x8
+
+#define MAX77621_INDUCTOR_MIN_30_PER  0x0
+#define MAX77621_INDUCTOR_NOMINAL     0x1
+#define MAX77621_INDUCTOR_PLUS_30_PER 0x2
+#define MAX77621_INDUCTOR_PLUS_60_PER 0x3
+
 int max77620_regulator_get_status(u32 id);
 int max77620_regulator_config_fps(u32 id);
 int max77620_regulator_set_voltage(u32 id, u32 mv);
--- a/bootloader/sec/se.c
+++ b/bootloader/sec/se.c
@@ -167,7 +167,9 @@ int se_aes_unwrap_key(u32 ks_dst, u32 ks_src, const void *input)
 {
 	SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_DEC_ALG(ALG_AES_DEC) | SE_CONFIG_DST(DST_KEYTAB);
 	SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_KEY_INDEX(ks_src) | SE_CRYPTO_CORE_SEL(CORE_DECRYPT);
+	SE(SE_BLOCK_COUNT_REG_OFFSET) = 0;
 	SE(SE_CRYPTO_KEYTABLE_DST_REG_OFFSET) = SE_CRYPTO_KEYTABLE_DST_KEY_INDEX(ks_dst);
+
 	return _se_execute(OP_START, NULL, 0, input, 0x10);
 }

--- a/bootloader/soc/clock.c
+++ b/bootloader/soc/clock.c
@@ -36,7 +36,8 @@ static const clock_t _clock_i2c[] = {
 	/* I2C6 */ { 0 }
 };

-static clock_t _clock_se = { CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, 0x42C, 0x1F, 0, 0 };
+static clock_t _clock_se = { CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_RST_CONTROLLER_CLK_SOURCE_SE, 0x1F, 0, 0 };
+static clock_t _clock_unk2 = { CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_RST_CONTROLLER_RST_SOURCE, 0x1E, 0, 0 };

 static clock_t _clock_host1x = { CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_HOST1X, 0x1C, 4, 3 };
 static clock_t _clock_tsec = { CLK_RST_CONTROLLER_RST_DEVICES_U, CLK_RST_CONTROLLER_CLK_OUT_ENB_U, CLK_RST_CONTROLLER_CLK_SOURCE_TSEC, 0x13, 0, 2 };
@@ -48,6 +49,8 @@ static clock_t _clock_kfuse = { CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTRO
 static clock_t _clock_cl_dvfs = { CLK_RST_CONTROLLER_RST_DEVICES_W, CLK_RST_CONTROLLER_CLK_OUT_ENB_W, CLK_RST_CONTROLLER_RST_SOURCE, 0x1B, 0, 0 };
 static clock_t _clock_coresight = { CLK_RST_CONTROLLER_RST_DEVICES_U, CLK_RST_CONTROLLER_CLK_OUT_ENB_U, CLK_RST_CONTROLLER_CLK_SOURCE_CSITE, 9, 0, 4};

+static clock_t _clock_pwm = { CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_PWM, 0x11, 6, 4};
+
 void clock_enable(const clock_t *clk)
 {
 	// Put clock into reset.
@@ -71,7 +74,7 @@ void clock_disable(const clock_t *clk)
 	CLOCK(clk->enable) &= ~(1 << clk->index);
 }

-void clock_enable_fuse(u32 enable)
+void clock_enable_fuse(bool enable)
 {
 	CLOCK(CLK_RST_CONTROLLER_MISC_CLK_ENB) = (CLOCK(CLK_RST_CONTROLLER_MISC_CLK_ENB) & 0xEFFFFFFF) | ((enable & 1) << 28);
 }
@@ -86,11 +89,21 @@ void clock_enable_i2c(u32 idx)
 	clock_enable(&_clock_i2c[idx]);
 }

+void clock_disable_i2c(u32 idx)
+{
+	clock_disable(&_clock_i2c[idx]);
+}
+
 void clock_enable_se()
 {
 	clock_enable(&_clock_se);
 }

+void clock_enable_unk2()
+{
+	clock_enable(&_clock_unk2);
+}
+
 void clock_enable_host1x()
 {
 	clock_enable(&_clock_host1x);
@@ -172,6 +185,21 @@ void clock_enable_coresight()
 	clock_enable(&_clock_coresight);
 }

+void clock_disable_coresight()
+{
+	clock_disable(&_clock_coresight);
+}
+
+void clock_enable_pwm()
+{
+	clock_enable(&_clock_pwm);
+}
+
+void clock_disable_pwm()
+{
+	clock_disable(&_clock_pwm);
+}
+
 #define L_SWR_SDMMC1_RST (1 << 14)
 #define L_SWR_SDMMC2_RST (1 << 9)
 #define L_SWR_SDMMC4_RST (1 << 15)
--- a/bootloader/soc/clock.h
+++ b/bootloader/soc/clock.h
@@ -47,6 +47,7 @@
 #define CLK_RST_CONTROLLER_PLLE_MISC 0xEC
 #define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRA 0xF8
 #define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRB 0xFC
+#define CLK_RST_CONTROLLER_CLK_SOURCE_PWM 0x110
 #define CLK_RST_CONTROLLER_CLK_SOURCE_I2C1 0x124
 #define CLK_RST_CONTROLLER_CLK_SOURCE_I2C5 0x128
 #define CLK_RST_CONTROLLER_CLK_SOURCE_VI 0x148
@@ -57,6 +58,7 @@
 #define CLK_RST_CONTROLLER_CLK_SOURCE_UARTB 0x17C
 #define CLK_RST_CONTROLLER_CLK_SOURCE_HOST1X 0x180
 #define CLK_RST_CONTROLLER_CLK_SOURCE_UARTC 0x1A0
+#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C3 0x1B8
 #define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC3 0x1BC
 #define CLK_RST_CONTROLLER_CLK_SOURCE_CSITE 0x1D4
 #define CLK_RST_CONTROLLER_CLK_SOURCE_EMC 0x19C
@@ -94,9 +96,11 @@
 #define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD 0x3A4
 #define CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT 0x3B4
 #define CLK_RST_CONTROLLER_CLK_SOURCE_SOR1 0x410
+#define CLK_RST_CONTROLLER_CLK_SOURCE_SE 0x42C
 #define CLK_RST_CONTROLLER_CLK_ENB_V_SET 0x440
 #define CLK_RST_CONTROLLER_CLK_ENB_W_SET 0x448
 #define CLK_RST_CONTROLLER_CLK_ENB_W_CLR 0x44C
+#define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_SET 0x450
 #define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR 0x454
 #define CLK_RST_CONTROLLER_UTMIP_PLL_CFG2 0x488
 #define CLK_RST_CONTROLLER_PLLE_AUX 0x48C
@@ -128,10 +132,12 @@ void clock_enable(const clock_t *clk);
 void clock_disable(const clock_t *clk);

 /*! Clock control for specific hardware portions. */
-void clock_enable_fuse(u32 enable);
+void clock_enable_fuse(bool enable);
 void clock_enable_uart(u32 idx);
 void clock_enable_i2c(u32 idx);
+void clock_disable_i2c(u32 idx);
 void clock_enable_se();
+void clock_enable_unk2();
 void clock_enable_host1x();
 void clock_disable_host1x();
 void clock_enable_tsec();
@@ -147,6 +153,9 @@ void clock_disable_kfuse();
 void clock_enable_cl_dvfs();
 void clock_disable_cl_dvfs();
 void clock_enable_coresight();
+void clock_disable_coresight();
+void clock_enable_pwm();
+void clock_disable_pwm();
 void clock_sdmmc_config_clock_source(u32 *pout, u32 id, u32 val);
 void clock_sdmmc_get_params(u32 *pout, u16 *pdivisor, u32 type);
 int clock_sdmmc_is_not_reset_and_enabled(u32 id);
--- a/bootloader/soc/cluster.c
+++ b/bootloader/soc/cluster.c
@@ -21,24 +21,27 @@
 #include "../soc/pmc.h"
 #include "../soc/t210.h"
 #include "../power/max77620.h"
+#include "../power/max7762x.h"

 void _cluster_enable_power()
 {
-	u8 tmp = i2c_recv_byte(I2C_5, 0x3C, MAX77620_REG_AME_GPIO);
-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_AME_GPIO, tmp & 0xDF);
-	i2c_send_byte(I2C_5, 0x3C, MAX77620_REG_GPIO5, 0x09);
+	u8 tmp = i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_AME_GPIO);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_AME_GPIO, tmp & 0xDF);
+	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_GPIO5, MAX77620_CNFG_GPIO_DRV_PUSHPULL | MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH);

 	// Enable cores power.
-	i2c_send_byte(I2C_5, 0x1B, 0x2, 0x20);
-	i2c_send_byte(I2C_5, 0x1B, 0x3, 0x8D);
-	i2c_send_byte(I2C_5, 0x1B, 0x0, 0xB7);
-	i2c_send_byte(I2C_5, 0x1B, 0x1, 0xB7);
+	i2c_send_byte(I2C_5, MAX77621_CPU_I2C_ADDR, MAX77621_CONTROL1_REG,
+		MAX77621_AD_ENABLE | MAX77621_NFSR_ENABLE | MAX77621_SNS_ENABLE); // 1-3.x: MAX77621_NFSR_ENABLE
+	i2c_send_byte(I2C_5, MAX77621_CPU_I2C_ADDR, MAX77621_CONTROL2_REG,
+		MAX77621_T_JUNCTION_120 | MAX77621_WDTMR_ENABLE | MAX77621_CKKADV_TRIP_75mV_PER_US| MAX77621_INDUCTOR_NOMINAL); // 1-3.x: MAX77621_T_JUNCTION_120 | MAX77621_CKKADV_TRIP_DISABLE | MAX77621_INDUCTOR_NOMINAL
+	i2c_send_byte(I2C_5, MAX77621_CPU_I2C_ADDR, MAX77621_VOUT_REG, MAX77621_VOUT_ENABLE | 0x37);
+	i2c_send_byte(I2C_5, MAX77621_CPU_I2C_ADDR, MAX77621_VOUT_DVC_REG, MAX77621_VOUT_ENABLE | 0x37);
 }

-int _cluster_pmc_enable_partition(u32 part, u32 toggle)
+int _cluster_pmc_enable_partition(u32 part, u32 toggle, bool enable)
 {
 	// Check if the partition has already been turned on.
-	if (PMC(APBDEV_PMC_PWRGATE_STATUS) & part)
+	if (enable && PMC(APBDEV_PMC_PWRGATE_STATUS) & part)
 		return 1;

 	u32 i = 5001;
@@ -50,7 +53,7 @@ int _cluster_pmc_enable_partition(u32 part, u32 toggle)
 			return 0;
 	}

-	PMC(APBDEV_PMC_PWRGATE_TOGGLE) = toggle | 0x100;
+	PMC(APBDEV_PMC_PWRGATE_TOGGLE) = toggle | (enable ? 0x100 : 0);

 	i = 5001;
 	while (i > 0)
@@ -98,11 +101,11 @@ void cluster_boot_cpu0(u32 entry)
 	CLOCK(CLK_RST_CONTROLLER_CPU_SOFTRST_CTRL2) &= 0xFFFFF000;

 	// Enable CPU rail.
-	_cluster_pmc_enable_partition(1, 0);
-	//Enable cluster 0 non-CPU.
-	_cluster_pmc_enable_partition(0x8000, 15);
+	_cluster_pmc_enable_partition(1, 0, true);
+	// Enable cluster 0 non-CPU.
+	_cluster_pmc_enable_partition(0x8000, 15, true);
 	// Enable CE0.
-	_cluster_pmc_enable_partition(0x4000, 14);
+	_cluster_pmc_enable_partition(0x4000, 14, true);

 	// Request and wait for RAM repair.
 	FLOW_CTLR(FLOW_CTLR_RAM_REPAIR) = 1;
--- a/bootloader/soc/cluster.h
+++ b/bootloader/soc/cluster.h
@@ -20,7 +20,15 @@
 #include "../utils/types.h"

 /*! Flow controller registers. */
+#define LOW_CTLR_HALT_CPU0_EVENTS 0x0
+#define LOW_CTLR_HALT_CPU1_EVENTS 0x14
+#define LOW_CTLR_HALT_CPU2_EVENTS 0x1C
+#define LOW_CTLR_HALT_CPU3_EVENTS 0x24
 #define FLOW_CTLR_HALT_COP_EVENTS 0x4
+#define FLOW_CTLR_CPU0_CSR 0x8
+#define FLOW_CTLR_CPU1_CSR 0x18
+#define FLOW_CTLR_CPU2_CSR 0x20
+#define FLOW_CTLR_CPU3_CSR 0x28
 #define FLOW_CTLR_RAM_REPAIR 0x40
 #define FLOW_CTLR_BPMP_CLUSTER_CONTROL 0x98

--- a/bootloader/soc/fuse.c
+++ b/bootloader/soc/fuse.c
@@ -1,5 +1,7 @@
 /*
 * Copyright (c) 2018 naehrwert
+ * Copyright (c) 2018 shuffle2
+ * Copyright (c) 2018 balika011
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
@@ -14,9 +16,39 @@
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

+#include <string.h>
+
 #include "../soc/fuse.h"
 #include "../soc/t210.h"

+#define ARRAYSIZE(x) (sizeof(x) / sizeof(*x))
+
+static const u32 evp_thunk_template[] = {
+	0xe92d0007, //   STMFD   SP!, {R0-R2}
+	0xe1a0200e, //   MOV     R2, LR
+	0xe2422002, //   SUB     R2, R2, #2
+	0xe5922000, //   LDR     R2, [R2]
+	0xe20220ff, //   AND     R2, R2, #0xFF
+	0xe1a02082, //   MOV     R2, R2,LSL#1
+	0xe59f001c, //   LDR     R0, =evp_thunk_template
+	0xe59f101c, //   LDR     R1, =thunk_end
+	0xe0411000, //   SUB     R1, R1, R0
+	0xe59f0018, //   LDR     R0, =iram_evp_thunks
+	0xe0800001, //   ADD     R0, R0, R1
+	0xe0822000, //   ADD     R2, R2, R0
+	0xe3822001, //   ORR     R2, R2, #1
+	0xe8bd0003, //   LDMFD   SP!, {R0,R1}
+	0xe12fff12, //   BX      R2
+	0x001007b0, // off_1007EC DCD evp_thunk_template
+	0x001007f8, // off_1007F0 DCD thunk_end
+	0x40004c30, // off_1007F4 DCD iram_evp_thunks
+	// thunk_end is here
+};
+static const u32 evp_thunk_template_len = sizeof(evp_thunk_template);
+
+// treated as 12bit values
+static const u32 hash_vals[] = {1, 2, 4, 8, 0, 3, 5, 6, 7, 9, 10, 11};
+
 void fuse_disable_program()
 {
 	FUSE(FUSE_DISABLEREGPROGRAM) = 1;
@@ -26,3 +58,268 @@ u32 fuse_read_odm(u32 idx)
 {
 	return FUSE(FUSE_RESERVED_ODMX(idx));
 }
+
+void fuse_wait_idle()
+{
+    u32 ctrl;
+    do
+    {
+        ctrl = FUSE(FUSE_CTRL);
+    } while (((ctrl >> 16) & 0x1f) != 4);
+}
+
+u32 parity32_even(u32 *words, u32 count)
+{
+	u32 acc = words[0];
+	for (u32 i = 1; i < count; i++)
+	{
+		acc ^= words[i];
+	}
+	u32 lo = ((acc & 0xffff) ^ (acc >> 16)) & 0xff;
+	u32 hi = ((acc & 0xffff) ^ (acc >> 16)) >> 8;
+	u32 x = hi ^ lo;
+	lo = ((x & 0xf) ^ (x >> 4)) & 3;
+	hi = ((x & 0xf) ^ (x >> 4)) >> 2;
+	x = hi ^ lo;
+ 
+	return (x & 1) ^ (x >> 1);
+}
+
+int patch_hash_one(u32 *word)
+{
+	u32 bits20_31 = *word & 0xfff00000;
+	u32 parity_bit = parity32_even(&bits20_31, 1);
+	u32 hash = 0;
+	for (u32 i = 0; i < 12; i++)
+	{
+		if (*word & (1 << (20 + i)))
+		{
+			hash ^= hash_vals[i];
+		}
+	}
+	if (hash == 0)
+	{
+		if (parity_bit == 0)
+		{
+			return 0;
+		}
+		*word ^= 1 << 24;
+		return 1;
+	}
+	if (parity_bit == 0)
+	{
+		return 3;
+	}
+	for (u32 i = 0; i < ARRAYSIZE(hash_vals); i++)
+	{
+		if (hash_vals[i] == hash)
+		{
+			*word ^= 1 << (20 + i);
+			return 1;
+		}
+	}
+	return 2;
+}
+
+int patch_hash_multi(u32 *words, u32 count)
+{
+	u32 parity_bit = parity32_even(words, count);
+	u32 bits0_14 = words[0] & 0x7fff;
+	u32 bit15 = words[0] & 0x8000;
+	u32 bits16_19 = words[0] & 0xf0000;
+
+	u32 hash = 0;
+	words[0] = bits16_19;
+	for (u32 i = 0; i < count; i++)
+	{
+		u32 w = words[i];
+		if (w)
+		{
+			for (u32 bitpos = 0; bitpos < 32; bitpos++)
+			{
+				if ((w >> bitpos) & 1)
+				{
+					hash ^= 0x4000 + i * 32 + bitpos;
+				}
+			}
+		}
+	}
+	hash ^= bits0_14;
+	// stupid but this is what original code does.
+	// equivalent to original words[0] &= 0xfff00000
+	words[0] = bits16_19 ^ bit15 ^ bits0_14;
+
+	if (hash == 0)
+	{
+		if (parity_bit == 0)
+		{
+			return 0;
+		}
+		words[0] ^= 0x8000;
+		return 1;
+	}
+	if (parity_bit == 0)
+	{
+		return 3;
+	}
+	u32 bitcount = hash - 0x4000;
+	if (bitcount < 16 || bitcount >= count * 32)
+	{
+		u32 num_set = 0;
+		for (u32 bitpos = 0; bitpos < 15; bitpos++)
+		{
+			if ((hash >> bitpos) & 1)
+			{
+				num_set++;
+			}
+		}
+		if (num_set != 1)
+		{
+			return 2;
+		}
+		words[0] ^= hash;
+		return 1;
+	}
+	words[bitcount / 32] ^= 1 << (hash & 0x1f);
+	return 1;
+}
+
+int fuse_read_ipatch(void (*ipatch)(u32 offset, u32 value))
+{
+	u32 words[80];
+	u32 word_count;
+	u32 word_addr;
+	u32 word0 = 0;
+	u32 total_read = 0;
+
+	word_count = FUSE(FUSE_FIRST_BOOTROM_PATCH_SIZE);
+	word_count &= 0x7f;
+	word_addr = 191;
+
+	while (word_count)
+	{
+		total_read += word_count;
+		if (total_read >= ARRAYSIZE(words))
+		{
+			break;
+		}
+		
+		for (u32 i = 0; i < word_count; i++)
+		{
+			FUSE(FUSE_ADDR) = word_addr--;
+			FUSE(FUSE_CTRL) = (FUSE(FUSE_ADDR) & ~FUSE_CMD_MASK) | FUSE_READ;
+			fuse_wait_idle();
+			words[i] = FUSE(FUSE_RDATA);
+		}
+		
+		word0 = words[0];
+		if (patch_hash_multi(words, word_count) >= 2)
+		{
+			return 1;
+		}
+		u32 ipatch_count = (words[0] >> 16) & 0xf;
+		if (ipatch_count)
+		{
+			for (u32 i = 0; i < ipatch_count; i++)
+			{
+				u32 word = words[i];
+				u32 addr = (word >> 16) * 2;
+				u32 data = word & 0xffff;
+		
+				ipatch(addr, data);
+			}
+		}
+		words[0] = word0;
+		if ((word0 >> 25) == 0)
+			break;
+		if (patch_hash_one(&word0) >= 2)
+		{
+			return 3;
+		}
+		word_count = word0 >> 25;
+	}
+	
+	return 0;
+}
+
+int fuse_read_evp_thunk(u32 *iram_evp_thunks, u32 *iram_evp_thunks_len)
+{
+	u32 words[80];
+	u32 word_count;
+	u32 word_addr;
+	u32 word0 = 0;
+	u32 total_read = 0;
+	int evp_thunk_written = 0;
+	void *evp_thunk_dst_addr = 0;
+
+	memset(iram_evp_thunks, 0, *iram_evp_thunks_len);
+
+	word_count = FUSE(FUSE_FIRST_BOOTROM_PATCH_SIZE);
+	word_count &= 0x7f;
+	word_addr = 191;
+
+	while (word_count)
+	{
+		total_read += word_count;
+		if (total_read >= ARRAYSIZE(words))
+		{
+			break;
+		}
+		
+		for (u32 i = 0; i < word_count; i++)
+		{
+			FUSE(FUSE_ADDR) = word_addr--;
+			FUSE(FUSE_CTRL) = (FUSE(FUSE_ADDR) & ~FUSE_CMD_MASK) | FUSE_READ;
+			fuse_wait_idle();
+			words[i] = FUSE(FUSE_RDATA);
+		}
+		
+		word0 = words[0];
+		if (patch_hash_multi(words, word_count) >= 2)
+		{
+			return 1;
+		}
+		u32 ipatch_count = (words[0] >> 16) & 0xf;
+		u32 insn_count = word_count - ipatch_count - 1;
+		if (insn_count)
+		{
+			if (!evp_thunk_written)
+			{
+				evp_thunk_dst_addr = (void *)iram_evp_thunks;
+
+				memcpy(evp_thunk_dst_addr, (void *)evp_thunk_template, evp_thunk_template_len);
+				evp_thunk_dst_addr += evp_thunk_template_len;
+				evp_thunk_written = 1;
+				*iram_evp_thunks_len = evp_thunk_template_len;
+
+				//write32(TEGRA_EXCEPTION_VECTORS_BASE + 0x208, iram_evp_thunks);
+			}
+
+			u32 thunk_patch_len = insn_count * sizeof(u32);
+			memcpy(evp_thunk_dst_addr, &words[ipatch_count + 1], thunk_patch_len);
+			evp_thunk_dst_addr += thunk_patch_len;
+			*iram_evp_thunks_len += thunk_patch_len;
+		}
+		words[0] = word0;
+		if ((word0 >> 25) == 0)
+			break;
+		if (patch_hash_one(&word0) >= 2)
+		{
+			return 3;
+		}
+		word_count = word0 >> 25;
+	}
+	
+	return 0;
+}
+
+void read_raw_ipatch_fuses(u32 *words)
+{
+	for (u32 i = 0; i < 0x100; i++)
+	{
+		FUSE(FUSE_ADDR) = i;
+		FUSE(FUSE_CTRL) = (FUSE(FUSE_ADDR) & ~FUSE_CMD_MASK) | FUSE_READ;
+		fuse_wait_idle();
+		words[i] = FUSE(FUSE_RDATA);
+	}
+}
--- a/bootloader/soc/fuse.h
+++ b/bootloader/soc/fuse.h
@@ -1,5 +1,7 @@
 /*
 * Copyright (c) 2018 naehrwert
+ * Copyright (c) 2018 shuffle2
+ * Copyright (c) 2018 balika011
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
@@ -34,11 +36,22 @@
 #define FUSE_DISABLEREGPROGRAM 0x2C
 #define FUSE_WRITE_ACCESS_SW 0x30
 #define FUSE_PWR_GOOD_SW 0x34
+#define FUSE_FIRST_BOOTROM_PATCH_SIZE 0x19c
+
+/*! Fuse commands. */
+#define FUSE_READ 0x1
+#define FUSE_WRITE 0x2
+#define FUSE_SENSE 0x3
+#define FUSE_CMD_MASK 0x3

 /*! Fuse cache registers. */
 #define FUSE_RESERVED_ODMX(x) (0x1C8 + 4 * (x))

 void fuse_disable_program();
 u32 fuse_read_odm(u32 idx);
+void fuse_wait_idle();
+int fuse_read_ipatch(void (*ipatch)(u32 offset, u32 value));
+int fuse_read_evp_thunk(u32 *iram_evp_thunks, u32 *iram_evp_thunks_len);
+void read_raw_ipatch_fuses(u32 *words);

 #endif
--- a/bootloader/soc/i2c.c
+++ b/bootloader/soc/i2c.c
@@ -26,11 +26,11 @@ static u32 i2c_addrs[] = {

 static void _i2c_wait(vu32 *base)
 {
-	base[0x23] = 0x25;
+	base[I2C_CONFIG_LOAD] = 0x25;
 	for (u32 i = 0; i < 20; i++)
 	{
 		usleep(1);
-		if (!(base[0x23] & 1))
+		if (!(base[I2C_CONFIG_LOAD] & 1))
 			break;
 	}
 }
@@ -44,16 +44,16 @@ static int _i2c_send_pkt(u32 idx, u32 x, u8 *buf, u32 size)
 	memcpy(&tmp, buf, size);

 	vu32 *base = (vu32 *)i2c_addrs[idx];
-	base[1] = x << 1; //Set x (send mode).
-	base[3] = tmp;    //Set value.
-	base[0] = (2 * size - 2) | 0x2800; //Set size and send mode.
+	base[I2C_CMD_ADDR0] = x << 1; //Set x (send mode).
+	base[I2C_CMD_DATA1] = tmp;    //Set value.
+	base[I2C_CNFG] = (2 * size - 2) | 0x2800; //Set size and send mode.
 	_i2c_wait(base);  //Kick transaction.

-	base[0] = (base[0] & 0xFFFFFDFF) | 0x200;
-	while (base[7] & 0x100)
+	base[I2C_CNFG] = (base[I2C_CNFG] & 0xFFFFFDFF) | 0x200;
+	while (base[I2C_STATUS] & 0x100)
 		;

-	if (base[7] << 28)
+	if (base[I2C_STATUS] << 28)
 		return 0;

 	return 1;
@@ -61,23 +61,30 @@ static int _i2c_send_pkt(u32 idx, u32 x, u8 *buf, u32 size)

 static int _i2c_recv_pkt(u32 idx, u8 *buf, u32 size, u32 x)
 {
-	if (size > 4)
+	if (size > 8)
 		return 0;

 	vu32 *base = (vu32 *)i2c_addrs[idx];
-	base[1] = (x << 1) | 1; // Set x (recv mode).
-	base[0] = (2 * size - 2) | 0x2840; // Set size and recv mode.
+	base[I2C_CMD_ADDR0] = (x << 1) | 1; // Set x (recv mode).
+	base[I2C_CNFG] = (size - 1) << 1 | 0x2840; // Set size and recv mode.
 	_i2c_wait(base);        // Kick transaction.

-	base[0] = (base[0] & 0xFFFFFDFF) | 0x200;
-	while (base[7] & 0x100)
+	base[I2C_CNFG] = (base[I2C_CNFG] & 0xFFFFFDFF) | 0x200;
+	while (base[I2C_STATUS] & 0x100)
 		;

-	if (base[7] << 28)
+	if (base[I2C_STATUS] << 28)
 		return 0;

-	u32 tmp = base[3]; // Get value.
-	memcpy(buf, &tmp, size);
+	u32 tmp = base[I2C_CMD_DATA1]; // Get LS value.
+	if (size > 4)
+	{
+		memcpy(buf, &tmp, 4);
+		tmp = base[I2C_CMD_DATA2]; // Get MS value.
+		memcpy(buf + 4, &tmp, size - 4);
+	}
+	else
+		memcpy(buf, &tmp, size);

 	return 1;
 }
@@ -86,19 +93,19 @@ void i2c_init(u32 idx)
 {
 	vu32 *base = (vu32 *)i2c_addrs[idx];

-	base[0x1B] = 0x50001;
-	base[0x21] = 0x90003;
+	base[I2C_CLK_DIVISOR_REGISTER] = 0x50001;
+	base[I2C_BUS_CLEAR_CONFIG] = 0x90003;
 	_i2c_wait(base);

 	for (u32 i = 0; i < 10; i++)
 	{
 		usleep(20000);
-		if (base[0x1A] & 0x800)
+		if (base[INTERRUPT_STATUS_REGISTER] & 0x800)
 			break;
 	}

-	(vu32)base[0x22];
-	base[0x1A] = base[0x1A];
+	(vu32)base[I2C_BUS_CLEAR_STATUS];
+	base[INTERRUPT_STATUS_REGISTER] = base[INTERRUPT_STATUS_REGISTER];
 }

 int i2c_send_buf_small(u32 idx, u32 x, u32 y, u8 *buf, u32 size)
--- a/bootloader/soc/i2c.h
+++ b/bootloader/soc/i2c.h
@@ -26,6 +26,17 @@
 #define I2C_5 4
 #define I2C_6 5

+#define I2C_CNFG        0x00
+#define I2C_CMD_ADDR0   0x01
+#define I2C_CMD_DATA1   0x03
+#define I2C_CMD_DATA2   0x04
+#define I2C_STATUS 0x07
+#define INTERRUPT_STATUS_REGISTER 0x1A
+#define I2C_CLK_DIVISOR_REGISTER 0x1B
+#define I2C_BUS_CLEAR_CONFIG 0x21
+#define I2C_BUS_CLEAR_STATUS 0x22
+#define I2C_CONFIG_LOAD 0x23
+
 void i2c_init(u32 idx);
 int i2c_send_buf_small(u32 idx, u32 x, u32 y, u8 *buf, u32 size);
 int i2c_recv_buf_small(u8 *buf, u32 size, u32 idx, u32 x, u32 y);
--- a/bootloader/soc/t210.h
+++ b/bootloader/soc/t210.h
@@ -19,6 +19,8 @@

 #include "../utils/types.h"

+#define BOOTROM_SIZE 0x18000
+#define BOOTROM_BASE 0x100000
 #define HOST1X_BASE 0x50000000
 #define BPMP_CACHE_BASE 0x50040000
 #define DISPLAY_A_BASE 0x54200000
@@ -41,12 +43,14 @@
 #define GPIO_7_BASE (GPIO_BASE + 0x600)
 #define GPIO_8_BASE (GPIO_BASE + 0x700)
 #define EXCP_VEC_BASE 0x6000F000
+#define IPATCH_BASE 0x6001DC00
 #define APB_MISC_BASE 0x70000000
 #define PINMUX_AUX_BASE 0x70003000
 #define UART_BASE 0x70006000
+#define PWM_BASE 0x7000A000
 #define RTC_BASE 0x7000E000
 #define PMC_BASE 0x7000E400
-#define SYSCTR0_BASE 0x7000F000
+#define SYSCTR0_BASE 0x700F0000
 #define FUSE_BASE 0x7000F800
 #define KFUSE_BASE 0x7000FC00
 #define SE_BASE 0x70012000
@@ -54,6 +58,7 @@
 #define EMC_BASE 0x7001B000
 #define MIPI_CAL_BASE 0x700E3000
 #define I2S_BASE 0x702D1000
+#define CL_DVFS_BASE 0x70110000

 #define _REG(base, off) *(vu32 *)((base) + (off))

@@ -81,6 +86,7 @@
 #define EXCP_VEC(off) _REG(EXCP_VEC_BASE, off)
 #define APB_MISC(off) _REG(APB_MISC_BASE, off)
 #define PINMUX_AUX(off) _REG(PINMUX_AUX_BASE, off)
+#define PWM(off) _REG(PWM_BASE, off)
 #define RTC(off) _REG(RTC_BASE, off)
 #define PMC(off) _REG(PMC_BASE, off)
 #define SYSCTR0(off) _REG(SYSCTR0_BASE, off)
@@ -91,9 +97,13 @@
 #define EMC(off) _REG(EMC_BASE, off)
 #define MIPI_CAL(off) _REG(MIPI_CAL_BASE, off)
 #define I2S(off) _REG(I2S_BASE, off)
+#define CL_DVFS(off) _REG(CL_DVFS_BASE, off)
+#define TEST_REG(off) _REG(0x0, off)

 /*! Misc registers. */
+#define APB_MISC_PP_STRAPPING_OPT_A 0x08
 #define APB_MISC_PP_PINMUX_GLOBAL 0x40
+#define APB_MISC_GP_LCD_BL_PWM_CFGPADCTRL 0xA34
 #define APB_MISC_GP_WIFI_EN_CFGPADCTRL 0xB64
 #define APB_MISC_GP_WIFI_RST_CFGPADCTRL 0xB68

--- a/bootloader/utils/btn.c
+++ b/bootloader/utils/btn.c
@@ -20,6 +20,7 @@
 #include "../soc/gpio.h"
 #include "../soc/t210.h"
 #include "util.h"
+#include "../power/max77620.h"

 u32 btn_read()
 {
@@ -28,7 +29,7 @@ u32 btn_read()
 		res |= BTN_VOL_DOWN;
 	if (!gpio_read(GPIO_PORT_X, GPIO_PIN_6))
 		res |= BTN_VOL_UP;
-	if (i2c_recv_byte(4, 0x3C, 0x15) & 0x4)
+	if (i2c_recv_byte(4, MAX77620_I2C_ADDR, 0x15) & 0x4)
 		res |= BTN_POWER;
 	return res;
 }
--- a/bootloader/utils/dirlist.c
+++ b/bootloader/utils/dirlist.c
@@ -51,6 +51,13 @@ char *dirlist(char *directory)
 				continue;
 		}
 		f_closedir(&dir);
+
+		if (!k)
+		{
+			free(temp);
+			free(dir_entries);
+			return NULL;
+		}
 	}
 	else
 	{
--- a/modules/simple_sample/gfx/gfx.c
+++ b/modules/simple_sample/gfx/gfx.c
@@ -0,0 +1,529 @@
+/*
+ * Copyright (c) 2018 naehrwert
+ * Copyright (C) 2018 CTCaer
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <stdarg.h>
+#include <string.h>
+#include "gfx.h"
+
+static const u8 _gfx_font[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // Char 032 ( )
+	0x00, 0x30, 0x30, 0x18, 0x18, 0x00, 0x0C, 0x00, // Char 033 (!)
+	0x00, 0x22, 0x22, 0x22, 0x00, 0x00, 0x00, 0x00, // Char 034 (")
+	0x00, 0x66, 0x66, 0xFF, 0x66, 0xFF, 0x66, 0x66, // Char 035 (#)
+	0x00, 0x18, 0x7C, 0x06, 0x3C, 0x60, 0x3E, 0x18, // Char 036 ($)
+	0x00, 0x46, 0x66, 0x30, 0x18, 0x0C, 0x66, 0x62, // Char 037 (%)
+	0x00, 0x3C, 0x66, 0x3C, 0x1C, 0xE6, 0x66, 0xFC, // Char 038 (&)
+	0x00, 0x18, 0x0C, 0x06, 0x00, 0x00, 0x00, 0x00, // Char 039 (')
+	0x00, 0x30, 0x18, 0x0C, 0x0C, 0x18, 0x30, 0x00, // Char 040 (()
+	0x00, 0x0C, 0x18, 0x30, 0x30, 0x18, 0x0C, 0x00, // Char 041 ())
+	0x00, 0x66, 0x3C, 0xFF, 0x3C, 0x66, 0x00, 0x00, // Char 042 (*)
+	0x00, 0x18, 0x18, 0x7E, 0x18, 0x18, 0x00, 0x00, // Char 043 (+)
+	0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x0C, 0x00, // Char 044 (,)
+	0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x00, // Char 045 (-)
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, // Char 046 (.)
+	0x00, 0x40, 0x60, 0x30, 0x18, 0x0C, 0x06, 0x00, // Char 047 (/)
+	0x00, 0x3C, 0x66, 0x76, 0x6E, 0x66, 0x3C, 0x00, // Char 048 (0)
+	0x00, 0x18, 0x1C, 0x18, 0x18, 0x18, 0x7E, 0x00, // Char 049 (1)
+	0x00, 0x3C, 0x62, 0x30, 0x0C, 0x06, 0x7E, 0x00, // Char 050 (2)
+	0x00, 0x3C, 0x62, 0x38, 0x60, 0x66, 0x3C, 0x00, // Char 051 (3)
+	0x00, 0x6C, 0x6C, 0x66, 0xFE, 0x60, 0x60, 0x00, // Char 052 (4)
+	0x00, 0x7E, 0x06, 0x7E, 0x60, 0x66, 0x3C, 0x00, // Char 053 (5)
+	0x00, 0x3C, 0x06, 0x3E, 0x66, 0x66, 0x3C, 0x00, // Char 054 (6)
+	0x00, 0x7E, 0x30, 0x30, 0x18, 0x18, 0x18, 0x00, // Char 055 (7)
+	0x00, 0x3C, 0x66, 0x3C, 0x66, 0x66, 0x3C, 0x00, // Char 056 (8)
+	0x00, 0x3C, 0x66, 0x7C, 0x60, 0x66, 0x3C, 0x00, // Char 057 (9)
+	0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x18, 0x00, // Char 058 (:)
+	0x00, 0x00, 0x18, 0x00, 0x18, 0x18, 0x0C, 0x00, // Char 059 (;)
+	0x00, 0x70, 0x1C, 0x06, 0x06, 0x1C, 0x70, 0x00, // Char 060 (<)
+	0x00, 0x00, 0x3E, 0x00, 0x3E, 0x00, 0x00, 0x00, // Char 061 (=)
+	0x00, 0x0E, 0x38, 0x60, 0x60, 0x38, 0x0E, 0x00, // Char 062 (>)
+	0x00, 0x3C, 0x66, 0x30, 0x18, 0x00, 0x18, 0x00, // Char 063 (?)
+	0x00, 0x3C, 0x66, 0x76, 0x76, 0x06, 0x46, 0x3C, // Char 064 (@)
+	0x00, 0x3C, 0x66, 0x7E, 0x66, 0x66, 0x66, 0x00, // Char 065 (A)
+	0x00, 0x3E, 0x66, 0x3E, 0x66, 0x66, 0x3E, 0x00, // Char 066 (B)
+	0x00, 0x3C, 0x66, 0x06, 0x06, 0x66, 0x3C, 0x00, // Char 067 (C)
+	0x00, 0x1E, 0x36, 0x66, 0x66, 0x36, 0x1E, 0x00, // Char 068 (D)
+	0x00, 0x7E, 0x06, 0x1E, 0x06, 0x06, 0x7E, 0x00, // Char 069 (E)
+	0x00, 0x3E, 0x06, 0x1E, 0x06, 0x06, 0x06, 0x00, // Char 070 (F)
+	0x00, 0x3C, 0x66, 0x06, 0x76, 0x66, 0x3C, 0x00, // Char 071 (G)
+	0x00, 0x66, 0x66, 0x7E, 0x66, 0x66, 0x66, 0x00, // Char 072 (H)
+	0x00, 0x3C, 0x18, 0x18, 0x18, 0x18, 0x3C, 0x00, // Char 073 (I)
+	0x00, 0x78, 0x30, 0x30, 0x30, 0x36, 0x1C, 0x00, // Char 074 (J)
+	0x00, 0x66, 0x36, 0x1E, 0x1E, 0x36, 0x66, 0x00, // Char 075 (K)
+	0x00, 0x06, 0x06, 0x06, 0x06, 0x06, 0x7E, 0x00, // Char 076 (L)
+	0x00, 0x46, 0x6E, 0x7E, 0x56, 0x46, 0x46, 0x00, // Char 077 (M)
+	0x00, 0x66, 0x6E, 0x7E, 0x76, 0x66, 0x66, 0x00, // Char 078 (N)
+	0x00, 0x3C, 0x66, 0x66, 0x66, 0x66, 0x3C, 0x00, // Char 079 (O)
+	0x00, 0x3E, 0x66, 0x3E, 0x06, 0x06, 0x06, 0x00, // Char 080 (P)
+	0x00, 0x3C, 0x66, 0x66, 0x66, 0x3C, 0x70, 0x00, // Char 081 (Q)
+	0x00, 0x3E, 0x66, 0x3E, 0x1E, 0x36, 0x66, 0x00, // Char 082 (R)
+	0x00, 0x3C, 0x66, 0x0C, 0x30, 0x66, 0x3C, 0x00, // Char 083 (S)
+	0x00, 0x7E, 0x18, 0x18, 0x18, 0x18, 0x18, 0x00, // Char 084 (T)
+	0x00, 0x66, 0x66, 0x66, 0x66, 0x66, 0x3C, 0x00, // Char 085 (U)
+	0x00, 0x66, 0x66, 0x66, 0x66, 0x3C, 0x18, 0x00, // Char 086 (V)
+	0x00, 0x46, 0x46, 0x56, 0x7E, 0x6E, 0x46, 0x00, // Char 087 (W)
+	0x00, 0x66, 0x3C, 0x18, 0x3C, 0x66, 0x66, 0x00, // Char 088 (X)
+	0x00, 0x66, 0x66, 0x3C, 0x18, 0x18, 0x18, 0x00, // Char 089 (Y)
+	0x00, 0x7E, 0x30, 0x18, 0x0C, 0x06, 0x7E, 0x00, // Char 090 (Z)
+	0x00, 0x3C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x3C, // Char 091 ([)
+	0x00, 0x06, 0x0C, 0x18, 0x30, 0x60, 0x40, 0x00, // Char 092 (\)
+	0x00, 0x3C, 0x30, 0x30, 0x30, 0x30, 0x30, 0x3C, // Char 093 (])
+	0x00, 0x18, 0x3C, 0x66, 0x00, 0x00, 0x00, 0x00, // Char 094 (^)
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, // Char 095 (_)
+	0x00, 0x0C, 0x18, 0x30, 0x00, 0x00, 0x00, 0x00, // Char 096 (`)
+	0x00, 0x00, 0x3C, 0x60, 0x7C, 0x66, 0x7C, 0x00, // Char 097 (a)
+	0x00, 0x06, 0x06, 0x3E, 0x66, 0x66, 0x3E, 0x00, // Char 098 (b)
+	0x00, 0x00, 0x3C, 0x06, 0x06, 0x06, 0x3C, 0x00, // Char 099 (c)
+	0x00, 0x60, 0x60, 0x7C, 0x66, 0x66, 0x7C, 0x00, // Char 100 (d)
+	0x00, 0x00, 0x3C, 0x66, 0x7E, 0x06, 0x3C, 0x00, // Char 101 (e)
+	0x00, 0x38, 0x0C, 0x3E, 0x0C, 0x0C, 0x0C, 0x00, // Char 102 (f)
+	0x00, 0x00, 0x7C, 0x66, 0x7C, 0x40, 0x3C, 0x00, // Char 103 (g)
+	0x00, 0x06, 0x06, 0x3E, 0x66, 0x66, 0x66, 0x00, // Char 104 (h)
+	0x00, 0x18, 0x00, 0x1C, 0x18, 0x18, 0x3C, 0x00, // Char 105 (i)
+	0x00, 0x30, 0x00, 0x30, 0x30, 0x30, 0x1E, 0x00, // Char 106 (j)
+	0x00, 0x06, 0x06, 0x36, 0x1E, 0x36, 0x66, 0x00, // Char 107 (k)
+	0x00, 0x1C, 0x18, 0x18, 0x18, 0x18, 0x3C, 0x00, // Char 108 (l)
+	0x00, 0x00, 0x66, 0xFE, 0xFE, 0xD6, 0xC6, 0x00, // Char 109 (m)
+	0x00, 0x00, 0x3E, 0x66, 0x66, 0x66, 0x66, 0x00, // Char 110 (n)
+	0x00, 0x00, 0x3C, 0x66, 0x66, 0x66, 0x3C, 0x00, // Char 111 (o)
+	0x00, 0x00, 0x3E, 0x66, 0x66, 0x3E, 0x06, 0x00, // Char 112 (p)
+	0x00, 0x00, 0x7C, 0x66, 0x66, 0x7C, 0x60, 0x00, // Char 113 (q)
+	0x00, 0x00, 0x3E, 0x66, 0x06, 0x06, 0x06, 0x00, // Char 114 (r)
+	0x00, 0x00, 0x7C, 0x06, 0x3C, 0x60, 0x3E, 0x00, // Char 115 (s)
+	0x00, 0x18, 0x7E, 0x18, 0x18, 0x18, 0x70, 0x00, // Char 116 (t)
+	0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x7C, 0x00, // Char 117 (u)
+	0x00, 0x00, 0x66, 0x66, 0x66, 0x3C, 0x18, 0x00, // Char 118 (v)
+	0x00, 0x00, 0xC6, 0xD6, 0xFE, 0x7C, 0x6C, 0x00, // Char 119 (w)
+	0x00, 0x00, 0x66, 0x3C, 0x18, 0x3C, 0x66, 0x00, // Char 120 (x)
+	0x00, 0x00, 0x66, 0x66, 0x7C, 0x60, 0x3C, 0x00, // Char 121 (y)
+	0x00, 0x00, 0x7E, 0x30, 0x18, 0x0C, 0x7E, 0x00, // Char 122 (z)
+	0x00, 0x18, 0x08, 0x08, 0x04, 0x08, 0x08, 0x18, // Char 123 ({)
+	0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, // Char 124 (|)
+	0x00, 0x0C, 0x08, 0x08, 0x10, 0x08, 0x08, 0x0C, // Char 125 (})
+	0x00, 0x00, 0x00, 0x4C, 0x32, 0x00, 0x00, 0x00  // Char 126 (~)
+};
+
+void gfx_init_ctxt(gfx_ctxt_t *ctxt, u32 *fb, u32 width, u32 height, u32 stride)
+{
+	ctxt->fb = fb;
+	ctxt->width = width;
+	ctxt->height = height;
+	ctxt->stride = stride;
+}
+
+void gfx_clear_grey(gfx_ctxt_t *ctxt, u8 color)
+{
+	memset(ctxt->fb, color, 0x3C0000);
+}
+
+void gfx_clear_color(gfx_ctxt_t *ctxt, u32 color)
+{
+	for (u32 i = 0; i < ctxt->height * ctxt->stride; i++)
+		ctxt->fb[i] = color;
+}
+
+void gfx_clear_partial_grey(gfx_ctxt_t *ctxt, u8 color, u32 pos_x, u32 height)
+{
+	memset(ctxt->fb + pos_x * ctxt->stride, color, height * 4 * ctxt->stride);
+}
+
+void gfx_con_init(gfx_con_t *con, gfx_ctxt_t *ctxt)
+{
+	con->gfx_ctxt = ctxt;
+	con->fntsz = 16;
+	con->x = 0;
+	con->y = 0;
+	con->savedx = 0;
+	con->savedy = 0;
+	con->fgcol = 0xFFCCCCCC;
+	con->fillbg = 0;
+	con->bgcol = 0xFF1B1B1B;
+	con->mute = 0;
+}
+
+void gfx_con_setcol(gfx_con_t *con, u32 fgcol, int fillbg, u32 bgcol)
+{
+	con->fgcol = fgcol;
+	con->fillbg = fillbg;
+	con->bgcol = bgcol;
+}
+
+void gfx_con_getpos(gfx_con_t *con, u32 *x, u32 *y)
+{
+	*x = con->x;
+	*y = con->y;
+}
+
+void gfx_con_setpos(gfx_con_t *con, u32 x, u32 y)
+{
+	con->x = x;
+	con->y = y;
+}
+
+void gfx_putc(gfx_con_t *con, char c)
+{
+	// Duplicate code for performance reasons.
+	switch (con->fntsz)
+	{
+	case 16:
+		if (c >= 32 && c <= 126)
+		{
+			u8 *cbuf = (u8 *)&_gfx_font[8 * (c - 32)];
+			u32 *fb = con->gfx_ctxt->fb + con->x + con->y * con->gfx_ctxt->stride;
+
+			for (u32 i = 0; i < 16; i+=2)
+			{
+				u8 v = *cbuf++;
+				for (u32 k = 0; k < 2; k++)
+				{
+					for (u32 j = 0; j < 8; j++)
+					{
+						if (v & 1)
+						{
+							*fb = con->fgcol;
+							fb++;
+							*fb = con->fgcol;
+						}
+						else if (con->fillbg)
+						{
+							*fb = con->bgcol;
+							fb++;
+							*fb = con->bgcol;
+						}
+						else
+							fb++;
+						v >>= 1;
+						fb++;
+					}
+					fb += con->gfx_ctxt->stride - 16;
+					v = *cbuf;
+				}
+			}
+			con->x += 16;
+		}
+		else if (c == '\n')
+		{
+			con->x = 0;
+			con->y +=16;
+			if (con->y > con->gfx_ctxt->height - 16)
+				con->y = 0;
+		}
+		break;
+	case 8:
+	default:
+		if (c >= 32 && c <= 126)
+		{
+			u8 *cbuf = (u8 *)&_gfx_font[8 * (c - 32)];
+			u32 *fb = con->gfx_ctxt->fb + con->x + con->y * con->gfx_ctxt->stride;
+			for (u32 i = 0; i < 8; i++)
+			{
+				u8 v = *cbuf++;
+				for (u32 j = 0; j < 8; j++)
+				{
+					if (v & 1)
+						*fb = con->fgcol;
+					else if (con->fillbg)
+						*fb = con->bgcol;
+					v >>= 1;
+					fb++;
+				}
+				fb += con->gfx_ctxt->stride - 8;
+			}
+			con->x += 8;
+		}
+		else if (c == '\n')
+		{
+			con->x = 0;
+			con->y += 8;
+			if (con->y > con->gfx_ctxt->height - 8)
+				con->y = 0;
+		}
+		break;
+	}
+	
+}
+
+void gfx_puts(gfx_con_t *con, const char *s)
+{
+	if (!s || con->mute)
+		return;
+
+	for (; *s; s++)
+		gfx_putc(con, *s);
+}
+
+static void _gfx_putn(gfx_con_t *con, u32 v, int base, char fill, int fcnt)
+{
+	char buf[65];
+	static const char digits[] = "0123456789ABCDEFghijklmnopqrstuvwxyz";
+	char *p;
+	int c = fcnt;
+
+	if (base > 36)
+		return;
+
+	p = buf + 64;
+	*p = 0;
+	do
+	{
+		c--;
+		*--p = digits[v % base];
+		v /= base;
+	} while (v);
+
+	if (fill != 0)
+	{
+		while (c > 0)
+		{
+			*--p = fill;
+			c--;
+		}
+	}
+
+	gfx_puts(con, p);
+}
+
+void gfx_put_small_sep(gfx_con_t *con)
+{
+	u8 prevFontSize = con->fntsz;
+	con->fntsz = 8;
+	gfx_putc(con, '\n');
+	con->fntsz = prevFontSize;
+}
+
+void gfx_put_big_sep(gfx_con_t *con)
+{
+	u8 prevFontSize = con->fntsz;
+	con->fntsz = 16;
+	gfx_putc(con, '\n');
+	con->fntsz = prevFontSize;
+}
+
+void gfx_printf(gfx_con_t *con, const char *fmt, ...)
+{
+	if (con->mute)
+		return;
+
+	va_list ap;
+	int fill, fcnt;
+
+	va_start(ap, fmt);
+	while(*fmt)
+	{
+		if(*fmt == '%')
+		{
+			fmt++;
+			fill = 0;
+			fcnt = 0;
+			if ((*fmt >= '0' && *fmt <= '9') || *fmt == ' ')
+			{
+				fcnt = *fmt;
+				fmt++;
+				if (*fmt >= '0' && *fmt <= '9')
+				{
+					fill = fcnt;
+					fcnt = *fmt - '0';
+					fmt++;
+				}
+				else
+				{
+					fill = ' ';
+					fcnt -= '0';
+				}
+			}
+			switch(*fmt)
+			{
+			case 'c':
+				gfx_putc(con, va_arg(ap, u32));
+				break;
+			case 's':
+				gfx_puts(con, va_arg(ap, char *));
+				break;
+			case 'd':
+				_gfx_putn(con, va_arg(ap, u32), 10, fill, fcnt);
+				break;
+			case 'p':
+			case 'P':
+			case 'x':
+			case 'X':
+				_gfx_putn(con, va_arg(ap, u32), 16, fill, fcnt);
+				break;
+			case 'k':
+				con->fgcol = va_arg(ap, u32);
+				break;
+			case 'K':
+				con->bgcol = va_arg(ap, u32);
+				con->fillbg = 1;
+				break;
+			case '%':
+				gfx_putc(con, '%');
+				break;
+			case '\0':
+				goto out;
+			default:
+				gfx_putc(con, '%');
+				gfx_putc(con, *fmt);
+				break;
+			}
+		}
+		else
+			gfx_putc(con, *fmt);
+		fmt++;
+	}
+
+	out:
+	va_end(ap);
+}
+
+void gfx_hexdump(gfx_con_t *con, u32 base, const u8 *buf, u32 len)
+{
+	if (con->mute)
+		return;
+
+	u8 prevFontSize = con->fntsz;
+	con->fntsz = 8;
+	for(u32 i = 0; i < len; i++)
+	{
+		if(i % 0x10 == 0)
+		{
+			if(i != 0)
+			{
+				gfx_puts(con, "| ");
+				for(u32 j = 0; j < 0x10; j++)
+				{
+					u8 c = buf[i - 0x10 + j];
+					if(c >= 32 && c <= 126)
+						gfx_putc(con, c);
+					else
+						gfx_putc(con, '.');
+				}
+				gfx_putc(con, '\n');
+			}
+			gfx_printf(con, "%08x: ", base + i);
+		}
+		gfx_printf(con, "%02x ", buf[i]);
+		if (i == len - 1)
+		{
+			int ln = len % 0x10 != 0;
+			u32 k = 0x10 - 1;
+			if (ln)
+			{
+				k = (len & 0xF) - 1;
+				for (u32 j = 0; j < 0x10 - k; j++)
+					gfx_puts(con, "   ");
+			}
+			gfx_puts(con, "| ");
+			for(u32 j = 0; j < (ln ? k : k + 1); j++)
+			{
+				u8 c = buf[i - k + j];
+				if(c >= 32 && c <= 126)
+					gfx_putc(con, c);
+				else
+					gfx_putc(con, '.');
+			}
+			gfx_putc(con, '\n');
+		}
+	}
+	gfx_putc(con, '\n');
+	con->fntsz = prevFontSize;
+}
+
+static int abs(int x)
+{
+	if (x < 0)
+		return -x;
+	return x;
+}
+
+void gfx_set_pixel(gfx_ctxt_t *ctxt, u32 x, u32 y, u32 color)
+{
+	ctxt->fb[x + y * ctxt->stride] = color;
+}
+
+void gfx_line(gfx_ctxt_t *ctxt, int x0, int y0, int x1, int y1, u32 color)
+{
+	int dx = abs(x1 - x0), sx = x0 < x1 ? 1 : -1;
+	int dy = abs(y1 - y0), sy = y0 < y1 ? 1 : -1;
+	int err = (dx > dy ? dx : -dy) / 2, e2;
+
+	while (1)
+	{
+		gfx_set_pixel(ctxt, x0, y0, color);
+		if (x0 == x1 && y0 == y1)
+			break;
+		e2 = err;
+		if (e2 >-dx)
+		{
+			err -= dy;
+			x0 += sx;
+		}
+		if (e2 < dy)
+		{
+			err += dx;
+			y0 += sy;
+		}
+	}
+}
+
+void gfx_set_rect_grey(gfx_ctxt_t *ctxt, const u8 *buf, u32 size_x, u32 size_y, u32 pos_x, u32 pos_y)
+{
+	u32 pos = 0;
+	for (u32 y = pos_y; y < (pos_y + size_y); y++)
+	{
+		for (u32 x = pos_x; x < (pos_x + size_x); x++)
+		{
+			memset(&ctxt->fb[x + y*ctxt->stride], buf[pos], 4);
+			pos++;
+		}
+	}
+}
+
+
+void gfx_set_rect_rgb(gfx_ctxt_t *ctxt, const u8 *buf, u32 size_x, u32 size_y, u32 pos_x, u32 pos_y)
+{
+	u32 pos = 0;
+	for (u32 y = pos_y; y < (pos_y + size_y); y++)
+	{
+		for (u32 x = pos_x; x < (pos_x + size_x); x++)
+		{
+			ctxt->fb[x + y*ctxt->stride] = buf[pos + 2] | (buf[pos + 1] << 8) | (buf[pos] << 16);
+			pos+=3;
+		}
+	}
+}
+
+void gfx_set_rect_argb(gfx_ctxt_t *ctxt, const u32 *buf, u32 size_x, u32 size_y, u32 pos_x, u32 pos_y)
+{
+	u32 pos = 0;
+	for (u32 y = pos_y; y < (pos_y + size_y); y++)
+	{
+		for (u32 x = pos_x; x < (pos_x + size_x); x++)
+		{
+			ctxt->fb[x + y*ctxt->stride] = buf[pos];
+			pos+=1;
+		}
+	}
+}
+
+void gfx_render_bmp_argb(gfx_ctxt_t *ctxt, const u32 *buf, u32 size_x, u32 size_y, u32 pos_x, u32 pos_y)
+{
+	for (u32 y = pos_y; y < (pos_y + size_y); y++)
+	{
+		for (u32 x = pos_x; x < (pos_x + size_x); x++)
+			ctxt->fb[x + y*ctxt->stride]  = buf[(size_y + pos_y - 1 - y ) * size_x + x - pos_x];
+	}
+}
--- a/modules/simple_sample/gfx/gfx.h
+++ b/modules/simple_sample/gfx/gfx.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2018 naehrwert
+ * Copyright (C) 2018 CTCaer
+ * Copyright (C) 2018 M4xw
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _GFX_H_
+#define _GFX_H_
+
+#include "../../../common/common_gfx.h"
+
+void gfx_init_ctxt(gfx_ctxt_t *ctxt, u32 *fb, u32 width, u32 height, u32 stride);
+void gfx_clear_grey(gfx_ctxt_t *ctxt, u8 color);
+void gfx_clear_partial_grey(gfx_ctxt_t *ctxt, u8 color, u32 pos_x, u32 height);
+void gfx_clear_color(gfx_ctxt_t *ctxt, u32 color);
+void gfx_con_init(gfx_con_t *con, gfx_ctxt_t *ctxt);
+void gfx_con_setcol(gfx_con_t *con, u32 fgcol, int fillbg, u32 bgcol);
+void gfx_con_getpos(gfx_con_t *con, u32 *x, u32 *y);
+void gfx_con_setpos(gfx_con_t *con, u32 x, u32 y);
+void gfx_putc(gfx_con_t *con, char c);
+void gfx_puts(gfx_con_t *con, const char *s);
+void gfx_printf(gfx_con_t *con, const char *fmt, ...);
+void gfx_hexdump(gfx_con_t *con, u32 base, const u8 *buf, u32 len);
+
+void gfx_set_pixel(gfx_ctxt_t *ctxt, u32 x, u32 y, u32 color);
+void gfx_line(gfx_ctxt_t *ctxt, int x0, int y0, int x1, int y1, u32 color);
+void gfx_put_small_sep(gfx_con_t *con);
+void gfx_put_big_sep(gfx_con_t *con);
+void gfx_set_rect_grey(gfx_ctxt_t *ctxt, const u8 *buf, u32 size_x, u32 size_y, u32 pos_x, u32 pos_y);
+void gfx_set_rect_rgb(gfx_ctxt_t *ctxt, const u8 *buf, u32 size_x, u32 size_y, u32 pos_x, u32 pos_y);
+void gfx_set_rect_argb(gfx_ctxt_t *ctxt, const u32 *buf, u32 size_x, u32 size_y, u32 pos_x, u32 pos_y);
+void gfx_render_bmp_argb(gfx_ctxt_t *ctxt, const u32 *buf, u32 size_x, u32 size_y, u32 pos_x, u32 pos_y);
+
+#endif
Author	SHA1	Message	Date
Kostas Missos	c99ea77daf	Bump version to v4.1	2018-09-19 17:58:26 +03:00
Kostas Missos	4ad7aedbaf	-.- Nintendo, I Am Disappoint	2018-09-19 17:57:02 +03:00
Kostas Missos	267bcd352f	[PATCH] Port FS patches to 6.0.0 Co-Authored-By: Rajko Stojadinovic <admin@rajko.info>	2018-09-19 00:57:19 +03:00
Kostas Missos	db88eb31f2	Add svc/dbg &Atmosphère fs.mitm patches for 6.0.0	2018-09-19 00:55:26 +03:00
Kostas Missos	efc3fc34de	Add cancel backup if VOL DOWN + UP are held - Long press of both buttons cancels the backup process now - Fixed an issue with partial backup when the resume was happening on the last part	2018-09-19 00:50:23 +03:00
Kostas Missos	89fb29e35e	Add support for payloads with broken hw inits	2018-09-19 00:46:32 +03:00
Kostas Missos	b54cbbfc3c	Fix version check for the update chainloader	2018-09-19 00:36:40 +03:00
Kostas Missos	fc0f75495e	Add auto full power off if woke up from HOS. Useful for modchips/dongles. It shows a brief breathing style of hekate logo before powering off completely.	2018-09-19 00:34:05 +03:00
Kostas Missos	4e9b3d8157	Add proper BCT copy for dev units Co-Authored-By: Rajko Stojadinovic <admin@rajko.info>	2018-09-19 00:28:13 +03:00
Kostas Missos	7aeac2c379	Add 4/5.X and 6.X hw config changes Thanks to @balika011 for notice on 2.x vs 5.x changes. (Some 2.x vs 5.x changes were added with the `fdd94ff` commit)	2018-09-19 00:11:18 +03:00
Kostas Missos	b9e348fc17	Add warnings on missing bootloader libraries	2018-09-19 00:04:58 +03:00
Kostas Missos	67a470921a	Add PWM backlight support + options - No eye blasting backlight - Option to choose the prefered brightness - Smooths transitions	2018-09-19 00:01:42 +03:00
Kostas Missos	780736591e	Improvements to ini/payload handling - Allow no hekate_ipl.ini and create it at 1st hekate boot - Show Payloads/More configs options when no boot entry in main .ini - Fix black screen on empty ini/payload folders - Fix some stack corruption with freeing ini lists (wip)	2018-09-18 23:47:37 +03:00
Kostas Missos	fdd94ffd2b	General bugfixes + hardcoded name replacement	2018-09-18 23:38:54 +03:00
Kostas Missos	59e711c91d	Merge remote-tracking branch 'origin/dev'	2018-09-18 03:18:26 +03:00
Pika	4e43bd9a39	Add 6.0.0 support (#95 ) Add partial 6.0.0 support	2018-09-18 03:08:05 +03:00
Kostas Missos	5aecd0d778	Merge pull request #107 from balika011/dev Add ipatch and bootrom dumping	2018-09-10 15:50:38 +03:00
balika011	532dd6ddee	Add ipatch and bootrom dumping	2018-09-10 01:12:28 +02:00
Kostas Missos	58b289bee2	Fix build pf sample module by adding missing files	2018-08-25 22:59:54 +03:00