Compare commits
7 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
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40938fdb58 | ||
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73e3cc7be6 | ||
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90f893f573 | ||
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3f44441df4 | ||
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44c3ae5ef1 | ||
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5a775ebb72 | ||
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884ad1f6e6 |
1
.gitignore
vendored
1
.gitignore
vendored
@@ -1,4 +1,3 @@
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.vs
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.vscode
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build_ipl/*
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/ipl.bin
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11
Makefile
11
Makefile
@@ -44,19 +44,19 @@ OBJS = $(addprefix $(BUILD)/, \
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OBJS += $(addprefix $(BUILD)/, diskio.o ff.o ffunicode.o)
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ARCH := -march=armv4t -mtune=arm7tdmi -mthumb -mthumb-interwork
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CFLAGS = $(ARCH) -O2 -nostdlib -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-inline -std=gnu11# -Wall
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CFLAGS = $(ARCH) -Os -nostdlib -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-inline -std=gnu11# -Wall
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LDFLAGS = $(ARCH) -nostartfiles -lgcc -Wl,--nmagic,--gc-sections
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.PHONY: all clean
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all: $(TARGET).bin
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all: $(BUILD)/$(TARGET)
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clean:
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@rm -rf $(OBJS)
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@rm -rf $(BUILD)
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@rm -rf $(TARGET).bin
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@rm -rf $(BUILD)/$(TARGET).elf
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@rm -rf $(BUILD)/$(TARGET)
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$(TARGET).bin: $(BUILD)/$(TARGET).elf
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$(BUILD)/$(TARGET): $(BUILD)/$(TARGET).elf
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$(OBJCOPY) -S -O binary $< $@
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$(BUILD)/$(TARGET).elf: $(OBJS)
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@@ -66,5 +66,4 @@ $(BUILD)/%.o: $(SOURCEDIR)/%.c
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$(CC) $(CFLAGS) -c $< -o $@
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$(BUILD)/%.o: $(SOURCEDIR)/%.S
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@mkdir -p "$(BUILD)"
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$(CC) $(CFLAGS) -c $< -o $@
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46
README.md
46
README.md
@@ -4,49 +4,13 @@
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Nintendo Switch bootloader, firmware patcher, and more.
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## ipl config
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The ipl can be configured via 'hekate_ipl.ini' (if it is present on the SD card). Each ini section represents a boot entry, except for the special section 'config' that controls the global configuration.
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### Possible key/value combinations:
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Possible key/value combinations:
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| Config option | Description |
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| ------------------ | ---------------------------------------------------------- |
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| warmboot={SD path} | Replaces the warmboot binary |
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| secmon={SD path} | Replaces the security monitor binary |
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| kernel={SD path} | Replaces the kernel binary |
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| kip1={SD path} | Replaces/Adds kernel initial process. Multiple can be set. |
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| fullsvcperm=1 | Disables SVC verification |
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| debugmode=1 | Enables Debug mode |
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```
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hekate (C) 2018 naehrwert, st4rk.
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Thanks to: derrek, nedwill, plutoo, shuffle2, smea, thexyz, yellows8.
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Greetings to: fincs, hexkyz, SciresM, Shiny Quagsire, WinterMute.
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Open source and free packages used:
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- FatFs R0.13a, Copyright (C) 2017, ChaN
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- bcl-1.2.0, Copyright (C) 2003-2006, Marcus Geelnard
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___
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.-' `'.
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/ \
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| ;
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| | ___.--,
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_.._ |0) = (0) | _.---'`__.-( (_.
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__.--'`_.. '.__.\ '--. \_.-' ,.--'` `""`
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( ,.--'` ',__ /./; ;, '.__.'` __
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_`) ) .---.__.' / | |\ \__..--"" """--.,_
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`---' .'.''-._.-'`_./ /\ '. \ _.--''````'''--._`-.__.'
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| | .' _.-' | | \ \ '. `----`
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\ \/ .' \ \ '. '-._)
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\/ / \ \ `=.__`'-.
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/ /\ `) ) / / `"".`\
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, _.-'.'\ \ / / ( ( / /
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`--'` ) ) .-'.' '.'. | (
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(/` ( (` ) ) '-; [switchbrew]
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```
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- warmboot={SD path}
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- secmon={SD path}
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- kernel={SD path}
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- kip1={SD path}
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15
ipl/btn.c
15
ipl/btn.c
@@ -34,24 +34,9 @@ u32 btn_read()
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u32 btn_wait()
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{
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u32 res = 0, btn = btn_read();
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int pwr = 0;
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// Power button down, raise a filter.
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if (btn & BTN_POWER)
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{
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pwr = 1;
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btn &= 0xFFFFFFFE;
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}
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do
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{
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res = btn_read();
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// Power button up, remove filter.
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if (!(res & BTN_POWER) && pwr)
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pwr = 0;
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// Power button still down.
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else if (pwr)
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res &= 0xFFFFFFFE;
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} while (btn == res);
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return res;
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}
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693
ipl/ctc_logo2.h
693
ipl/ctc_logo2.h
@@ -1,693 +0,0 @@
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#define SZ_HEKATE_LOGO 36024
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#define SZ_HEKATE_LOGOLZ 10993
|
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static unsigned char Kc_HEKATE_LOGOlz[SZ_HEKATE_LOGOLZ] =
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{
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||||
0xAE, 0x1B, 0x1B, 0x1B,
|
||||
0x1B, 0xAE, 0x04, 0x04, 0xAE, 0x08, 0x08, 0xAE, 0x10, 0x10, 0xAE, 0x07, 0x07, 0x1C, 0x1B, 0x1B,
|
||||
0x1E, 0x1B, 0x1B, 0x1F, 0x1B, 0x1B, 0x1F, 0xAE, 0x05, 0x06, 0x1E, 0x1B, 0x1B, 0x1D, 0xAE, 0x05,
|
||||
0x15, 0xAE, 0x24, 0x39, 0x1D, 0xAE, 0x05, 0x2D, 0xAE, 0x06, 0x06, 0xAE, 0x0C, 0x0C, 0xAE, 0x18,
|
||||
0x18, 0xAE, 0x1E, 0x1E, 0xAE, 0x24, 0x75, 0xAE, 0x09, 0x78, 0xAE, 0x0F, 0x81, 0x34, 0xAE, 0x27,
|
||||
0x3C, 0xAE, 0x27, 0x82, 0x14, 0xAE, 0x4D, 0x4D, 0xAE, 0x6D, 0x6D, 0xAE, 0x07, 0x83, 0x4E, 0x1A,
|
||||
0x1B, 0x23, 0x1A, 0x1B, 0x27, 0x1A, 0x1B, 0x2B, 0x19, 0x1B, 0x2F, 0x19, 0x1B, 0x30, 0x18, 0x1B,
|
||||
0x30, 0x19, 0x1B, 0x2E, 0x19, 0x1B, 0x2A, 0x19, 0x1B, 0x26, 0x1A, 0x1B, 0x22, 0x1A, 0x1B, 0x1F,
|
||||
0xAE, 0x17, 0x82, 0x71, 0x1D, 0xAE, 0x05, 0x3C, 0x24, 0x1A, 0x1B, 0x28, 0x1A, 0x1B, 0x29, 0x19,
|
||||
0x1B, 0x29, 0x19, 0xAE, 0x06, 0x06, 0xAE, 0x0C, 0x0C, 0xAE, 0x18, 0x18, 0xAE, 0x16, 0x18, 0x28,
|
||||
0xAE, 0x0B, 0x72, 0xAE, 0x18, 0x83, 0x24, 0xAE, 0x04, 0x75, 0x1B, 0x1B, 0x21, 0x1A, 0xAE, 0x04,
|
||||
0x2A, 0x2A, 0xAE, 0x05, 0x81, 0x28, 0x30, 0xAE, 0x05, 0x81, 0x34, 0x2F, 0x19, 0x1B, 0x2B, 0x19,
|
||||
0x1B, 0x28, 0xAE, 0x05, 0x81, 0x4C, 0x1F, 0x1A, 0xAE, 0x81, 0x7A, 0x83, 0x66, 0xAE, 0x06, 0x83,
|
||||
0x54, 0x22, 0xAE, 0x05, 0x83, 0x12, 0x32, 0x18, 0x1C, 0x3D, 0x17, 0x1C, 0x47, 0x16, 0x1C, 0x4F,
|
||||
0x15, 0x1C, 0x55, 0x14, 0x1C, 0x59, 0x14, 0x1C, 0x58, 0x14, 0x1C, 0x53, 0x14, 0x1C, 0x4D, 0x15,
|
||||
0x1C, 0x45, 0x16, 0x1C, 0x3B, 0x17, 0x1C, 0x31, 0x18, 0x1B, 0x28, 0x1A, 0x1B, 0x21, 0x1A, 0x1B,
|
||||
0x1D, 0xAE, 0x0E, 0x42, 0x20, 0xAE, 0x05, 0x84, 0x0D, 0x39, 0x18, 0x1C, 0x44, 0x16, 0x1C, 0x4B,
|
||||
0x15, 0xAE, 0x04, 0x30, 0x4D, 0xAE, 0x06, 0x06, 0xAE, 0x0C, 0x0C, 0xAE, 0x18, 0x18, 0xAE, 0x11,
|
||||
0x12, 0x4C, 0x15, 0x1C, 0x49, 0x16, 0x1C, 0x41, 0x17, 0x1C, 0x33, 0x18, 0x1C, 0x26, 0xAE, 0x05,
|
||||
0x83, 0x1B, 0xAE, 0x12, 0x83, 0x54, 0x20, 0xAE, 0x05, 0x84, 0x46, 0x30, 0x18, 0x1B, 0x3A, 0x17,
|
||||
0xAE, 0x04, 0x75, 0x4E, 0x15, 0x1C, 0x54, 0xAE, 0x05, 0x81, 0x2E, 0x58, 0x14, 0x1C, 0x55, 0x14,
|
||||
0x1C, 0x4F, 0x15, 0x1C, 0x47, 0x16, 0x1C, 0x3E, 0xAE, 0x05, 0x42, 0x2A, 0x19, 0x1B, 0x22, 0xAE,
|
||||
0x81, 0x72, 0x83, 0x60, 0xAE, 0x06, 0x83, 0x15, 0x28, 0x19, 0x1B, 0x37, 0x18, 0x1C, 0x49, 0x16,
|
||||
0x1C, 0x5A, 0x13, 0x1C, 0x6B, 0x11, 0x1D, 0x80, 0x0F, 0x1D, 0xA2, 0x0B, 0x1E, 0xC4, 0x06, 0x1F,
|
||||
0xC5, 0x06, 0x1F, 0xC5, 0x06, 0x1F, 0xC4, 0x06, 0x1F, 0xAA, 0x0A, 0x1E, 0x94, 0x0D, 0x1E, 0x69,
|
||||
0x12, 0x1D, 0x58, 0x14, 0x1C, 0x45, 0x16, 0x1C, 0x34, 0x18, 0x1C, 0x27, 0xAE, 0x0B, 0x86, 0x4E,
|
||||
0x1D, 0x1B, 0x1B, 0x27, 0x1A, 0x1B, 0x3B, 0x17, 0x1C, 0x74, 0x11, 0x1D, 0x9B, 0x0C, 0x1E, 0xA0,
|
||||
0x0B, 0x1E, 0xA2, 0x0B, 0x1E, 0xA2, 0xAE, 0x06, 0x06, 0xAE, 0x0C, 0x0C, 0xAE, 0x18, 0x18, 0xAE,
|
||||
0x11, 0x12, 0xA1, 0x0B, 0x1E, 0x9F, 0x0B, 0x1E, 0x97, 0x0D, 0x1E, 0x7A, 0x11, 0x1D, 0x31, 0x18,
|
||||
0x1B, 0x21, 0x1A, 0xAE, 0x0D, 0x81, 0x31, 0x1F, 0x1B, 0x1B, 0x26, 0x1A, 0x1B, 0x32, 0x18, 0x1C,
|
||||
0x43, 0x16, 0x1C, 0x56, 0x14, 0x1C, 0x67, 0x12, 0x1D, 0x73, 0x11, 0x1D, 0xA2, 0x0B, 0x1E, 0xBD,
|
||||
0x07, 0x1E, 0xAE, 0x09, 0x81, 0x31, 0xB4, 0x09, 0x1E, 0x9E, 0x0B, 0x1E, 0x6B, 0x11, 0x1D, 0x5C,
|
||||
0x13, 0x1C, 0x49, 0x15, 0x1C, 0x38, 0x18, 0x1C, 0x29, 0x19, 0x1B, 0x20, 0xAE, 0x0E, 0x85, 0x11,
|
||||
0xAE, 0x81, 0x5B, 0x83, 0x57, 0x1D, 0xAE, 0x05, 0x87, 0x2B, 0x2F, 0x19, 0x1B, 0x42, 0x16, 0x1C,
|
||||
0x5D, 0x13, 0x1C, 0x7F, 0x0F, 0x1D, 0xBD, 0x07, 0x1E, 0xEA, 0x02, 0x1F, 0xFF, 0x00, 0x20, 0xFF,
|
||||
0x00, 0x20, 0xAE, 0x06, 0x06, 0xAE, 0x0C, 0x0C, 0xF8, 0x01, 0x20, 0xD4, 0x04, 0x1F, 0x9C, 0x0C,
|
||||
0x1E, 0x59, 0x14, 0x1C, 0x3F, 0x17, 0x1C, 0x2B, 0xAE, 0x05, 0x82, 0x2C, 0xAE, 0x06, 0x87, 0x73,
|
||||
0x2C, 0x19, 0x1B, 0x4C, 0x15, 0x1C, 0xC1, 0x06, 0xAE, 0x19, 0x3C, 0xAE, 0x18, 0x18, 0xAE, 0x1E,
|
||||
0x1E, 0xDF, 0x03, 0x1F, 0x3C, 0x17, 0x1C, 0x24, 0xAE, 0x08, 0x83, 0x5A, 0xAE, 0x09, 0x88, 0x1D,
|
||||
0x3D, 0x17, 0x1C, 0x56, 0x14, 0x1C, 0x6F, 0x11, 0x1D, 0xB4, 0x08, 0x1E, 0xDC, 0x03, 0xAE, 0x1C,
|
||||
0x75, 0xDC, 0x03, 0x1F, 0xB1, 0x09, 0x1E, 0x5F, 0x13, 0x1C, 0x45, 0x16, 0x1C, 0x30, 0x19, 0x1B,
|
||||
0x23, 0xAE, 0x81, 0x63, 0x83, 0x5D, 0x1D, 0x1B, 0x1B, 0x23, 0xAE, 0x05, 0x85, 0x7A, 0x4B, 0x15,
|
||||
0x1C, 0x6B, 0x11, 0x1D, 0xAC, 0x09, 0x1E, 0xF8, 0x01, 0xAE, 0x28, 0x82, 0x71, 0xDB, 0x03, 0x1F,
|
||||
0x73, 0x11, 0x1D, 0x45, 0x16, 0x1C, 0x2E, 0xAE, 0x05, 0x83, 0x5D, 0x1F, 0x1A, 0x1B, 0x30, 0x19,
|
||||
0x1B, 0x55, 0x14, 0x1C, 0xC4, 0xAE, 0x50, 0x83, 0x5A, 0xE1, 0x03, 0x1F, 0x42, 0x16, 0x1C, 0x25,
|
||||
0xAE, 0x05, 0x83, 0x5A, 0x1C, 0xAE, 0x05, 0x8E, 0x53, 0x2E, 0x19, 0x1B, 0x44, 0x16, 0x1C, 0x63,
|
||||
0x12, 0x1D, 0x9A, 0x0C, 0xAE, 0x1C, 0x85, 0x05, 0xAE, 0x0F, 0x0F, 0xEA, 0x02, 0x1F, 0x90, 0x0D,
|
||||
0x1E, 0x4D, 0x15, 0x1C, 0x32, 0x18, 0x1C, 0xAE, 0x81, 0x5E, 0x83, 0x5D, 0x1C, 0xAE, 0x05, 0x87,
|
||||
0x2E, 0x32, 0x18, 0x1C, 0x4F, 0x15, 0x1C, 0x73, 0x11, 0x1D, 0xD5, 0x04, 0xAE, 0x31, 0x83, 0x12,
|
||||
0xF8, 0x01, 0x20, 0x8E, 0x0E, 0x1E, 0x46, 0x16, 0x1C, 0x2C, 0xAE, 0x05, 0x8D, 0x46, 0x2F, 0x19,
|
||||
0x1B, 0x52, 0xAE, 0x56, 0x83, 0x5A, 0x41, 0x17, 0x1C, 0x25, 0xAE, 0x05, 0x88, 0x1A, 0x20, 0x1A,
|
||||
0x1B, 0x2D, 0x19, 0x1B, 0x47, 0x16, 0x1C, 0x6A, 0x12, 0x1D, 0xB5, 0x08, 0x1E, 0xAE, 0x33, 0x4E,
|
||||
0xB0, 0x09, 0x1E, 0x4F, 0x15, 0x1C, 0xAE, 0x06, 0x8B, 0x5F, 0xAE, 0x81, 0x58, 0x8E, 0x74, 0x1F,
|
||||
0xAE, 0x05, 0x83, 0x0C, 0x4B, 0xAE, 0x05, 0x83, 0x57, 0xE3, 0xAE, 0x1D, 0x89, 0x4E, 0xAE, 0x1E,
|
||||
0x83, 0x5D, 0x8B, 0x0E, 0x1E, 0x40, 0x17, 0x1C, 0x29, 0x19, 0x1B, 0x2C, 0x19, 0x1B, 0x46, 0x16,
|
||||
0x1C, 0xBE, 0x07, 0xAE, 0x4F, 0x83, 0x5A, 0xDE, 0x03, 0x1F, 0x39, 0xAE, 0x05, 0x86, 0x66, 0x1F,
|
||||
0x1B, 0x1B, 0x29, 0x19, 0x1B, 0x43, 0x16, 0x1C, 0x69, 0x12, 0x1D, 0xC5, 0xAE, 0x3B, 0x84, 0x40,
|
||||
0xAF, 0x09, 0x1E, 0x49, 0x16, 0x1C, 0x2B, 0x19, 0xAE, 0x04, 0x51, 0xAE, 0x81, 0x52, 0x83, 0x57,
|
||||
0x1E, 0x1B, 0x1B, 0x28, 0x1A, 0x1B, 0x41, 0x16, 0x1C, 0x6B, 0x12, 0xAE, 0x19, 0x87, 0x2E, 0xD1,
|
||||
0x04, 0x1F, 0xAB, 0x0A, 0x1E, 0x93, 0x0E, 0x1E, 0x93, 0x0E, 0x1E, 0xA2, 0x0C, 0x1E, 0xC1, 0x06,
|
||||
0x1F, 0xF1, 0xAE, 0x14, 0x8B, 0x2C, 0xF1, 0x01, 0x20, 0x68, 0x13, 0x1C, 0x36, 0xAE, 0x05, 0x95,
|
||||
0x00, 0x35, 0x18, 0x1C, 0x86, 0x0F, 0x1D, 0xBA, 0x08, 0x1E, 0xBD, 0x07, 0x1F, 0xBE, 0x07, 0x1F,
|
||||
0xBE, 0xAE, 0x06, 0x06, 0xAE, 0x05, 0x06, 0xBF, 0x07, 0x1F, 0xAE, 0x06, 0x93, 0x10, 0xAE, 0x12,
|
||||
0x42, 0xC4, 0x06, 0x1F, 0xC1, 0xAE, 0x11, 0x30, 0xBE, 0x07, 0x1F, 0xBC, 0x07, 0x1F, 0xB8, 0x08,
|
||||
0x1E, 0x9A, 0x0D, 0x1E, 0x2C, 0x19, 0x1B, 0x21, 0xAE, 0x05, 0x9A, 0x50, 0x39, 0x17, 0x1C, 0x60,
|
||||
0x13, 0xAE, 0x19, 0x87, 0x2E, 0xE2, 0x03, 0x1F, 0xB5, 0x09, 0xAE, 0x07, 0x81, 0x31, 0x96, 0x0D,
|
||||
0x1E, 0xC1, 0x07, 0x1F, 0xAE, 0x18, 0x85, 0x32, 0x8A, 0x0E, 0x1E, 0x3C, 0xAE, 0x08, 0x88, 0x08,
|
||||
0xAE, 0x81, 0x4F, 0x83, 0x5A, 0x21, 0x1A, 0x1B, 0x35, 0x18, 0x1C, 0x5A, 0x13, 0x1C, 0xAC, 0x09,
|
||||
0xAE, 0x13, 0x82, 0x26, 0xD9, 0x04, 0x1F, 0x65, 0x13, 0x1C, 0x43, 0x16, 0x1C, 0x39, 0x17, 0x1C,
|
||||
0x36, 0x18, 0x1C, 0x36, 0x18, 0x1C, 0x3B, 0x17, 0x1C, 0x48, 0x16, 0x1C, 0x5E, 0x13, 0x1C, 0xBB,
|
||||
0x07, 0xAE, 0x13, 0x8F, 0x0C, 0xC9, 0x06, 0x1F, 0x47, 0xAE, 0x05, 0x8B, 0x14, 0x28, 0xAE, 0x05,
|
||||
0x88, 0x08, 0x37, 0xAE, 0x05, 0x30, 0x3C, 0x17, 0x1C, 0x3C, 0xAE, 0x06, 0x06, 0xAE, 0x05, 0x06,
|
||||
0x42, 0x16, 0x1C, 0x5B, 0x13, 0x1C, 0x7C, 0x10, 0x1D, 0xAE, 0x12, 0x6F, 0x68, 0x12, 0x1D, 0x49,
|
||||
0x16, 0xAE, 0x10, 0x30, 0x3C, 0x17, 0x1C, 0x3A, 0x17, 0x1C, 0x34, 0x18, 0x1C, 0x2B, 0xAE, 0x05,
|
||||
0x8B, 0x6B, 0xAE, 0x06, 0x8E, 0x5F, 0x4F, 0x15, 0x1C, 0x8E, 0x0E, 0x1D, 0xAE, 0x12, 0x81, 0x01,
|
||||
0xE9, 0x02, 0x1F, 0x84, 0x0F, 0x1D, 0x48, 0xAE, 0x05, 0x9B, 0x15, 0xAE, 0x06, 0x81, 0x31, 0x39,
|
||||
0xAE, 0x05, 0x9A, 0x08, 0x58, 0x14, 0x1C, 0x9D, 0x0C, 0x1E, 0xAE, 0x12, 0x85, 0x11, 0xEA, 0x02,
|
||||
0x1F, 0x51, 0x15, 0x1C, 0x2E, 0xAE, 0x1A, 0x87, 0x37, 0x1C, 0x1C, 0x1C, 0x1E, 0x1E, 0x1E, 0x1F,
|
||||
0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F, 0x1F, 0x1F, 0x1E, 0x1E,
|
||||
0x1E, 0x1D, 0x1D, 0x1D, 0x1C, 0x1C, 0xAE, 0x31, 0x84, 0x0F, 0xAE, 0x0F, 0x4E, 0xAE, 0x06, 0x09,
|
||||
0x1E, 0x1E, 0x1E, 0xAE, 0x24, 0x4B, 0xAE, 0x0F, 0x24, 0xAE, 0x0C, 0x4B, 0xAE, 0x06, 0x06, 0xAE,
|
||||
0x0C, 0x81, 0x13, 0x1D, 0xAE, 0x05, 0x87, 0x31, 0x45, 0x16, 0x1C, 0x73, 0x11, 0x1D, 0xAE, 0x12,
|
||||
0x81, 0x76, 0xD1, 0x04, 0x1F, 0x4A, 0xAE, 0x05, 0x8D, 0x0A, 0x26, 0xAE, 0x05, 0x82, 0x50, 0x1F,
|
||||
0x1A, 0x1B, 0x20, 0xAE, 0x05, 0xA0, 0x2F, 0x28, 0xAE, 0x05, 0x9D, 0x2C, 0x57, 0x14, 0x1C, 0xAA,
|
||||
0x0A, 0xAE, 0x13, 0x84, 0x0D, 0x68, 0x13, 0x1C, 0x33, 0x18, 0x1C, 0xAE, 0x06, 0x30, 0x21, 0xAE,
|
||||
0x05, 0x30, 0x22, 0xAE, 0x06, 0x06, 0xAE, 0x08, 0x09, 0x29, 0xAE, 0x05, 0x8B, 0x2C, 0x73, 0x11,
|
||||
0xAE, 0x13, 0x83, 0x5A, 0x54, 0x14, 0x1C, 0x30, 0x18, 0xAE, 0x13, 0x33, 0x21, 0xAE, 0x05, 0x7B,
|
||||
0xAE, 0x06, 0xA4, 0x4E, 0x24, 0x1A, 0x1B, 0x3C, 0x17, 0x1C, 0x68, 0xAE, 0x14, 0x88, 0x62, 0xE9,
|
||||
0x02, 0x1F, 0x62, 0x13, 0x1C, 0x37, 0x18, 0x1C, 0x28, 0xAE, 0x05, 0x84, 0x04, 0xAE, 0x06, 0x93,
|
||||
0x4F, 0x21, 0xAE, 0x05, 0xA2, 0x6D, 0x33, 0x18, 0x1C, 0x4D, 0x15, 0x1C, 0x8A, 0x0F, 0xAE, 0x13,
|
||||
0x84, 0x0D, 0xA0, 0x0C, 0x1E, 0x39, 0x17, 0x1C, 0x22, 0xAE, 0x0B, 0x9A, 0x4D, 0xAE, 0x09, 0x82,
|
||||
0x38, 0x20, 0x20, 0x20, 0x26, 0x26, 0x26, 0x2B, 0x2B, 0x2B, 0x30, 0x30, 0x30, 0x33, 0x33, 0x33,
|
||||
0x34, 0x34, 0x34, 0x33, 0x33, 0x33, 0x30, 0x30, 0x30, 0x2C, 0x2C, 0x2C, 0x27, 0x27, 0x27, 0x21,
|
||||
0x21, 0x21, 0x1F, 0x1F, 0x1F, 0xAE, 0x27, 0x83, 0x60, 0x1D, 0x1D, 0x1D, 0x1F, 0x1F, 0x1F, 0x25,
|
||||
0x25, 0x25, 0x2A, 0x2A, 0x2A, 0x2F, 0x2F, 0x2F, 0x32, 0x32, 0x32, 0x33, 0x33, 0x33, 0x32, 0x32,
|
||||
0x32, 0x2F, 0x2F, 0x2F, 0x29, 0x29, 0x29, 0x24, 0x24, 0x24, 0xAE, 0x1B, 0x4B, 0xAE, 0x06, 0x3C,
|
||||
0xAE, 0x0C, 0x84, 0x55, 0x1F, 0x1F, 0x1F, 0x24, 0x24, 0x24, 0x2A, 0x2A, 0x2A, 0x30, 0x30, 0x30,
|
||||
0x32, 0x32, 0x32, 0x31, 0x31, 0x31, 0x2C, 0x2C, 0x2C, 0x25, 0x25, 0x25, 0xAE, 0x09, 0x45, 0x1F,
|
||||
0x1A, 0x1B, 0x31, 0x18, 0x1B, 0x59, 0x14, 0x1C, 0xAE, 0x12, 0x89, 0x57, 0xF1, 0x01, 0x20, 0x60,
|
||||
0x14, 0x1C, 0x2F, 0xAE, 0x08, 0x99, 0x4C, 0xAE, 0x0F, 0x96, 0x49, 0x25, 0x1A, 0x1B, 0x3A, 0x17,
|
||||
0x1C, 0x63, 0xAE, 0x14, 0x82, 0x5F, 0xB5, 0x08, 0x1E, 0x3D, 0x17, 0x1C, 0x23, 0xAE, 0x0E, 0x82,
|
||||
0x29, 0xAE, 0x0C, 0x0C, 0x22, 0x1A, 0x1B, 0x40, 0x17, 0x1C, 0x70, 0xAE, 0x14, 0x83, 0x5A, 0x4F,
|
||||
0x15, 0x1C, 0x2A, 0x19, 0xAE, 0x1F, 0x8C, 0x3C, 0x2B, 0xAE, 0x05, 0x9A, 0x53, 0x8E, 0x0E, 0xAE,
|
||||
0x13, 0x3F, 0x82, 0x0F, 0x1D, 0x35, 0xAE, 0x14, 0x95, 0x6F, 0xAE, 0x06, 0x96, 0x49, 0x32, 0x18,
|
||||
0x1C, 0x58, 0x14, 0x1C, 0xB4, 0xAE, 0x11, 0x81, 0x6A, 0xDA, 0x03, 0x1F, 0x47, 0x16, 0x1C, 0x28,
|
||||
0xAE, 0x0B, 0x81, 0x67, 0x1D, 0x1D, 0x1D, 0x20, 0x20, 0x20, 0x28, 0x28, 0x28, 0x31, 0x31, 0x31,
|
||||
0x3C, 0x3C, 0x3C, 0x46, 0x46, 0x46, 0x4C, 0x4C, 0x4C, 0x4F, 0x4F, 0x4F, 0x50, 0x50, 0x50, 0x4F,
|
||||
0x4F, 0x4F, 0x4C, 0x4C, 0x4C, 0x47, 0x47, 0x47, 0x3F, 0x3F, 0x3F, 0x35, 0x35, 0x35, 0x2A, 0x2A,
|
||||
0x2A, 0x21, 0x21, 0x21, 0x1D, 0x1D, 0xAE, 0x1C, 0x96, 0x60, 0x1C, 0x1C, 0x1C, 0xAE, 0x06, 0x83,
|
||||
0x54, 0x2F, 0x2F, 0x2F, 0x39, 0x39, 0x39, 0x43, 0x43, 0x43, 0x4A, 0x4A, 0x4A, 0x4E, 0x4E, 0x4E,
|
||||
0xAE, 0x06, 0x4E, 0x4A, 0x4A, 0x4A, 0x43, 0x43, 0x43, 0x39, 0x39, 0x39, 0x2D, 0x2D, 0x2D, 0x23,
|
||||
0x23, 0x23, 0x1E, 0x1E, 0xAE, 0x10, 0xA3, 0x0A, 0x1C, 0x1C, 0x1C, 0x21, 0x21, 0x21, 0x28, 0x28,
|
||||
0x28, 0x2D, 0x2D, 0x2D, 0x2A, 0x2A, 0x2A, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x2E, 0x2E, 0x2E,
|
||||
0x39, 0x39, 0x39, 0x44, 0x44, 0x44, 0x4B, 0x4B, 0x4B, 0x4E, 0x4E, 0x4E, 0x4A, 0x4A, 0x4A, 0x40,
|
||||
0x40, 0x40, 0x30, 0x30, 0x30, 0x24, 0x24, 0x24, 0xAE, 0x06, 0x81, 0x0D, 0x23, 0xAE, 0x05, 0x86,
|
||||
0x00, 0x6A, 0x12, 0xAE, 0x13, 0x92, 0x39, 0xA8, 0x0B, 0x1E, 0x39, 0x18, 0x1C, 0x22, 0xAE, 0x17,
|
||||
0x8D, 0x01, 0xAE, 0x06, 0x82, 0x62, 0x4E, 0x15, 0xAE, 0x13, 0x87, 0x37, 0xE2, 0x03, 0x1F, 0x45,
|
||||
0x16, 0x1C, 0x27, 0xAE, 0x56, 0x83, 0x5A, 0x1F, 0x1A, 0x1B, 0x34, 0x18, 0x1C, 0x5D, 0x13, 0x1C,
|
||||
0xAE, 0x12, 0x8F, 0x27, 0xD0, 0x04, 0x1F, 0x41, 0x16, 0x1C, 0x26, 0xAE, 0x17, 0x99, 0x46, 0x1C,
|
||||
0xAE, 0x05, 0xA2, 0x40, 0x43, 0x16, 0x1C, 0x7D, 0xAE, 0x14, 0x8C, 0x06, 0x51, 0x15, 0x1C, 0x2C,
|
||||
0x19, 0xAE, 0x07, 0x39, 0x1E, 0x1E, 0x1E, 0x23, 0x23, 0x23, 0x2E, 0x2E, 0x2E, 0x3D, 0x3D, 0x3D,
|
||||
0x4B, 0x4B, 0x4B, 0x57, 0x57, 0x57, 0x97, 0x97, 0x97, 0xB4, 0xB4, 0xB4, 0xD6, 0xD6, 0xD6, 0xD6,
|
||||
0xAE, 0x04, 0x04, 0xD6, 0xCE, 0xCE, 0xCE, 0xB3, 0xB3, 0xB3, 0x8A, 0x8A, 0x8A, 0x4F, 0x4F, 0x4F,
|
||||
0x41, 0x41, 0x41, 0x31, 0x31, 0x31, 0x25, 0x25, 0x25, 0xAE, 0x12, 0x83, 0x12, 0xAE, 0x09, 0x84,
|
||||
0x25, 0x21, 0x21, 0x21, 0x2A, 0x2A, 0x2A, 0x39, 0x39, 0x39, 0x48, 0x48, 0x48, 0x54, 0x54, 0x54,
|
||||
0x80, 0x80, 0x80, 0xB4, 0xB4, 0xB4, 0xCE, 0xCE, 0xCE, 0xAE, 0x06, 0x4E, 0xC6, 0xC6, 0xC6, 0xA1,
|
||||
0xA1, 0xA1, 0x62, 0x62, 0x62, 0x45, 0x45, 0x45, 0x35, 0x35, 0x35, 0x28, 0x28, 0x28, 0x1F, 0x1F,
|
||||
0xAE, 0x0D, 0x8C, 0x1A, 0x1E, 0x1E, 0x1E, 0x28, 0x28, 0x28, 0x37, 0x37, 0x37, 0x6F, 0x6F, 0x6F,
|
||||
0x5E, 0x5E, 0x5E, 0x36, 0x36, 0x36, 0x39, 0x39, 0x39, 0x45, 0x45, 0x45, 0x53, 0x53, 0x53, 0x81,
|
||||
0x81, 0x81, 0xAE, 0x06, 0x81, 0x19, 0xD5, 0xD5, 0xD5, 0xD3, 0xD3, 0xD3, 0x85, 0x85, 0x85, 0x27,
|
||||
0x27, 0x27, 0x1E, 0x1E, 0x1E, 0xAE, 0x06, 0x8B, 0x0B, 0x48, 0x16, 0x1C, 0x80, 0x0F, 0xAE, 0x10,
|
||||
0x81, 0x6D, 0xF8, 0x01, 0x20, 0x4F, 0x15, 0x1C, 0x2B, 0x19, 0xAE, 0x13, 0xA7, 0x4B, 0xAE, 0x09,
|
||||
0x82, 0x29, 0x24, 0x1A, 0x1B, 0x3E, 0x17, 0x1C, 0x69, 0x12, 0xAE, 0x13, 0x82, 0x29, 0xAE, 0x06,
|
||||
0x86, 0x03, 0xAE, 0x54, 0x83, 0x5A, 0x23, 0x1A, 0x1B, 0x3D, 0x17, 0x1C, 0x6B, 0x11, 0x1D, 0xAE,
|
||||
0x12, 0x9D, 0x3E, 0x82, 0x0F, 0x1D, 0x32, 0x18, 0x1C, 0x1F, 0xAE, 0x1A, 0x78, 0x21, 0x1A, 0x1B,
|
||||
0x36, 0xAE, 0x05, 0x84, 0x16, 0xAE, 0x12, 0x85, 0x47, 0x8A, 0x0F, 0x1D, 0x2F, 0xAE, 0x05, 0x81,
|
||||
0x6D, 0x1D, 0x1D, 0x1D, 0x24, 0x24, 0x24, 0x31, 0x31, 0x31, 0x44, 0x44, 0x44, 0x55, 0x55, 0x55,
|
||||
0xA2, 0xA2, 0xA2, 0xE6, 0xE6, 0xE6, 0xF5, 0xF5, 0xF5, 0xD5, 0xD5, 0xD5, 0xBB, 0xBB, 0xBB, 0xB1,
|
||||
0xB1, 0xB1, 0xB1, 0xB1, 0xB1, 0xBB, 0xBB, 0xBB, 0xD6, 0xD6, 0xD6, 0xF5, 0xF5, 0xF5, 0xE6, 0xE6,
|
||||
0xE6, 0x9F, 0x9F, 0x9F, 0x48, 0x48, 0x48, 0x33, 0x33, 0x33, 0x25, 0x25, 0x25, 0xAE, 0x12, 0x87,
|
||||
0x3A, 0xAE, 0x06, 0x86, 0x6F, 0x2D, 0x2D, 0x2D, 0x3F, 0x3F, 0x3F, 0x51, 0x51, 0x51, 0x8D, 0x8D,
|
||||
0x8D, 0xAE, 0x06, 0x39, 0xDD, 0xDD, 0xDD, 0xAE, 0x06, 0x4E, 0xB2, 0xB2, 0xB2, 0xCE, 0xCE, 0xCE,
|
||||
0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xB4, 0xB4, 0xB4, 0x4E, 0x4E, 0x4E, 0x39, 0x39, 0x39, 0xAE,
|
||||
0x0F, 0x83, 0x5D, 0x1F, 0x1F, 0x1F, 0x30, 0x30, 0x30, 0x45, 0x45, 0x45, 0xD4, 0xD4, 0xD4, 0xB0,
|
||||
0xB0, 0xB0, 0x4E, 0x4E, 0x4E, 0x51, 0x51, 0x51, 0x80, 0x80, 0x80, 0xAE, 0x06, 0x4B, 0xDE, 0xDE,
|
||||
0xDE, 0xBA, 0xBA, 0xBA, 0xAF, 0xAF, 0xAF, 0xAB, 0xAB, 0xAB, 0x83, 0x83, 0x83, 0xAE, 0x06, 0x84,
|
||||
0x64, 0x1E, 0x1B, 0x1B, 0x2D, 0xAE, 0x05, 0x9C, 0x79, 0xAC, 0xAE, 0x11, 0x86, 0x78, 0xD1, 0x04,
|
||||
0xAE, 0x07, 0x9C, 0x3A, 0xAE, 0x1E, 0x86, 0x3F, 0x30, 0x18, 0x1B, 0x4F, 0x15, 0x1C, 0xE1, 0xAE,
|
||||
0x11, 0x82, 0x29, 0x62, 0x14, 0x1D, 0x26, 0xAE, 0x1A, 0x94, 0x6E, 0xAE, 0x39, 0x83, 0x5A, 0xAE,
|
||||
0x06, 0x86, 0x78, 0x47, 0xAE, 0x14, 0x85, 0x0B, 0xF1, 0x01, 0x20, 0x4B, 0x15, 0x1C, 0x29, 0x19,
|
||||
0xAE, 0x1C, 0x95, 0x63, 0x1F, 0xAE, 0x05, 0x88, 0x68, 0x47, 0x16, 0x1C, 0xBD, 0xAE, 0x11, 0x9B,
|
||||
0x0F, 0x9C, 0x0D, 0x1E, 0x2B, 0x19, 0x1B, 0x1F, 0xAE, 0x05, 0x83, 0x09, 0x30, 0x30, 0x30, 0x46,
|
||||
0x46, 0x46, 0x67, 0x67, 0x67, 0xD6, 0xD6, 0xD6, 0xED, 0xED, 0xED, 0xB0, 0xB0, 0xB0, 0x59, 0x59,
|
||||
0x59, 0x41, 0x41, 0x41, 0x3B, 0x3B, 0x3B, 0x39, 0x39, 0x39, 0x3A, 0x3A, 0x3A, 0x3E, 0x3E, 0x3E,
|
||||
0x45, 0x45, 0x45, 0x5F, 0x5F, 0x5F, 0xB3, 0xB3, 0xB3, 0xEE, 0xEE, 0xEE, 0xC4, 0xC4, 0xC4, 0x48,
|
||||
0x48, 0x48, 0x30, 0x30, 0x30, 0x21, 0x21, 0x21, 0xAE, 0x0F, 0x83, 0x57, 0x20, 0x20, 0x20, 0x2C,
|
||||
0x2C, 0x2C, 0x40, 0x40, 0x40, 0x55, 0x55, 0x55, 0xB4, 0xB4, 0xB4, 0xF5, 0xF5, 0xF5, 0xC3, 0xC3,
|
||||
0xC3, 0x68, 0x68, 0x68, 0x41, 0x41, 0x41, 0x3C, 0x3C, 0x3C, 0x3B, 0x3B, 0x3B, 0x3D, 0x3D, 0x3D,
|
||||
0x45, 0x45, 0x45, 0x60, 0x60, 0x60, 0xAB, 0xAB, 0xAB, 0xEE, 0xEE, 0xEE, 0xDE, 0xDE, 0xDE, 0x60,
|
||||
0x60, 0x60, 0x39, 0x39, 0x39, 0x26, 0x26, 0x26, 0xAE, 0x09, 0x88, 0x05, 0x20, 0x20, 0x20, 0x33,
|
||||
0x33, 0x33, 0x4F, 0x4F, 0x4F, 0xD7, 0xD7, 0xD7, 0xB8, 0xB8, 0xB8, 0x65, 0x65, 0x65, 0x85, 0x85,
|
||||
0x85, 0xED, 0xED, 0xED, 0xCC, 0xCC, 0xCC, 0x69, 0x69, 0x69, 0xAE, 0x06, 0x81, 0x19, 0x37, 0x37,
|
||||
0x37, 0x30, 0x30, 0x30, 0x28, 0x28, 0x28, 0x20, 0x20, 0x20, 0x1C, 0x1C, 0x1C, 0x1F, 0x1B, 0x1B,
|
||||
0x32, 0x18, 0x1C, 0x5C, 0xAE, 0x14, 0x89, 0x5A, 0xA9, 0x0A, 0x1E, 0x39, 0x18, 0x1C, 0x20, 0xAE,
|
||||
0x1D, 0x83, 0x5A, 0xAE, 0x06, 0x8E, 0x6E, 0x35, 0x18, 0x1C, 0x77, 0x12, 0x1D, 0x8C, 0x0F, 0x1D,
|
||||
0x8F, 0x0E, 0x1D, 0x8F, 0x0E, 0x1D, 0x8A, 0x0F, 0x1D, 0x81, 0x10, 0x1D, 0x45, 0x17, 0xAE, 0x0D,
|
||||
0xAB, 0x5E, 0xAE, 0x48, 0x83, 0x5A, 0xAE, 0x06, 0x8C, 0x03, 0x50, 0x15, 0x1C, 0xA2, 0x0B, 0xAE,
|
||||
0x14, 0x85, 0x0B, 0xAE, 0x08, 0xA5, 0x1F, 0xAE, 0x1B, 0x84, 0x19, 0x23, 0xAE, 0x05, 0x90, 0x58,
|
||||
0x65, 0x13, 0x1D, 0x8A, 0xAE, 0x08, 0x81, 0x31, 0x8B, 0x0F, 0x1D, 0x84, 0x10, 0x1D, 0x5B, 0x15,
|
||||
0x1D, 0x25, 0x1A, 0x1B, 0x21, 0x1F, 0x1F, 0x2A, 0x2A, 0x2A, 0x41, 0x41, 0x41, 0x66, 0x66, 0x66,
|
||||
0xDE, 0xDE, 0xDE, 0xDD, 0xDD, 0xDD, 0x59, 0x59, 0x59, 0x39, 0x39, 0x39, 0x2E, 0x2E, 0x2E, 0x28,
|
||||
0x28, 0x28, 0x24, 0x24, 0x24, 0x23, 0x23, 0x23, 0x24, 0x24, 0x24, 0xAE, 0x06, 0x92, 0x54, 0x36,
|
||||
0x36, 0x36, 0x48, 0x48, 0x48, 0x80, 0x80, 0x80, 0xEE, 0xEE, 0xEE, 0xBB, 0xBB, 0xBB, 0x40, 0x40,
|
||||
0x40, 0x28, 0x28, 0x28, 0xAE, 0x0C, 0x87, 0x37, 0xAE, 0x06, 0x8A, 0x46, 0x3B, 0x3B, 0x3B, 0x53,
|
||||
0x53, 0x53, 0xBD, 0xBD, 0xBD, 0xED, 0xED, 0xED, 0x84, 0x84, 0x84, 0x3D, 0x3D, 0x3D, 0xAE, 0x06,
|
||||
0x83, 0x03, 0x25, 0x25, 0x25, 0x24, 0x24, 0x24, 0x25, 0x25, 0x25, 0x2B, 0x2B, 0x2B, 0x35, 0x35,
|
||||
0x35, 0x46, 0x46, 0x46, 0x7F, 0x7F, 0x7F, 0xDF, 0xDF, 0xDF, 0xDE, 0xDE, 0xDE, 0x5B, 0x5B, 0x5B,
|
||||
0x32, 0x32, 0x32, 0xAE, 0x09, 0x84, 0x28, 0x20, 0x20, 0x20, 0x35, 0x35, 0x35, 0x55, 0x55, 0x55,
|
||||
0xD9, 0xD9, 0xD9, 0xBE, 0xBE, 0xBE, 0x91, 0x91, 0x91, 0xEE, 0xEE, 0xEE, 0xA6, 0xA6, 0xA6, 0x40,
|
||||
0x40, 0x40, 0x31, 0x31, 0x31, 0xAE, 0x06, 0x4B, 0x22, 0x22, 0x22, 0xAE, 0x06, 0x92, 0x60, 0xAE,
|
||||
0x06, 0x81, 0x01, 0x20, 0x1A, 0x1B, 0x38, 0x18, 0x1C, 0x64, 0xAE, 0x14, 0x8E, 0x65, 0x8F, 0x0E,
|
||||
0xAE, 0x05, 0x89, 0x5A, 0xAE, 0x20, 0xA5, 0x3A, 0x1F, 0xAE, 0x05, 0x8B, 0x14, 0x2B, 0xAE, 0x05,
|
||||
0xB6, 0x2D, 0x32, 0x18, 0x1C, 0x32, 0x18, 0x1C, 0x30, 0xAE, 0x05, 0xB6, 0x75, 0xAE, 0x06, 0xB2,
|
||||
0x4D, 0xAE, 0x51, 0x83, 0x5A, 0x1F, 0x1B, 0x1B, 0x30, 0x19, 0x1B, 0x58, 0x14, 0xAE, 0x13, 0x85,
|
||||
0x0B, 0xBE, 0x07, 0x1F, 0x3B, 0xAE, 0x11, 0x95, 0x60, 0xAE, 0x15, 0x84, 0x1C, 0xAE, 0x06, 0x97,
|
||||
0x1D, 0x2F, 0xAE, 0x05, 0xB5, 0x4A, 0x32, 0x18, 0x1C, 0x30, 0x18, 0x1B, 0x2B, 0x19, 0x1B, 0x25,
|
||||
0x1A, 0x1B, 0x20, 0x1C, 0x1C, 0x23, 0x22, 0x22, 0x35, 0x35, 0x35, 0x50, 0x50, 0x50, 0xBE, 0xBE,
|
||||
0xBE, 0xE6, 0xE6, 0xE6, 0x59, 0x59, 0x59, 0x31, 0x31, 0x31, 0x24, 0x24, 0x24, 0xAE, 0x12, 0x99,
|
||||
0x16, 0x1D, 0x1D, 0x1D, 0x22, 0x22, 0x22, 0x31, 0x31, 0x31, 0x49, 0x49, 0x49, 0x98, 0x98, 0x98,
|
||||
0xF5, 0xF5, 0xF5, 0x6A, 0x6A, 0x6A, 0x31, 0x31, 0x31, 0xAE, 0x09, 0x8A, 0x46, 0x1C, 0x1C, 0x1C,
|
||||
0x22, 0x22, 0x22, 0x33, 0x33, 0x33, 0x4C, 0x4C, 0x4C, 0xA2, 0xA2, 0xA2, 0xF5, 0xF5, 0xF5, 0x76,
|
||||
0x76, 0x76, 0x37, 0x37, 0x37, 0x27, 0x27, 0x27, 0xAE, 0x0F, 0x96, 0x04, 0xAE, 0x06, 0x8F, 0x09,
|
||||
0x2E, 0x2E, 0x2E, 0x43, 0x43, 0x43, 0x75, 0x75, 0x75, 0xEE, 0xEE, 0xEE, 0xBC, 0xBC, 0xBC, 0x41,
|
||||
0x41, 0x41, 0x29, 0x29, 0x29, 0xAE, 0x06, 0x87, 0x37, 0x20, 0x20, 0x20, 0x36, 0x36, 0x36, 0x59,
|
||||
0x59, 0x59, 0xDB, 0xDB, 0xDB, 0xBF, 0xBF, 0xBF, 0xD9, 0xD9, 0xD9, 0xBA, 0xBA, 0xBA, 0x3C, 0x3C,
|
||||
0x3C, 0x29, 0x29, 0x29, 0xAE, 0x18, 0x96, 0x4F, 0x21, 0xAE, 0x05, 0xB3, 0x12, 0x6B, 0xAE, 0x14,
|
||||
0x83, 0x5A, 0x72, 0x11, 0x1D, 0x2E, 0xAE, 0x08, 0x90, 0x52, 0xAE, 0x21, 0xAC, 0x71, 0xAE, 0x0C,
|
||||
0xBD, 0x64, 0xAE, 0x24, 0xBD, 0x67, 0xAE, 0x3A, 0x83, 0x5A, 0xAE, 0x05, 0x99, 0x3D, 0xAE, 0x15,
|
||||
0x92, 0x3F, 0xA9, 0x0A, 0x1E, 0x38, 0xAE, 0x20, 0x88, 0x65, 0xAE, 0x15, 0xC0, 0x49, 0xAE, 0x0A,
|
||||
0xC0, 0x4C, 0x1C, 0x1C, 0x26, 0x26, 0x26, 0x3C, 0x3C, 0x3C, 0x63, 0x63, 0x63, 0xF5, 0xF5, 0xF5,
|
||||
0x90, 0x90, 0x90, 0x36, 0x36, 0x36, 0x22, 0x22, 0x22, 0xAE, 0x18, 0x99, 0x0A, 0x1C, 0x1C, 0x1C,
|
||||
0x25, 0x25, 0x25, 0x3A, 0x3A, 0x3A, 0x56, 0x56, 0x56, 0xAE, 0x06, 0x8D, 0x6D, 0x39, 0x39, 0x39,
|
||||
0x23, 0x23, 0x23, 0xAE, 0x09, 0x87, 0x31, 0x29, 0x29, 0x29, 0xAE, 0x06, 0x87, 0x7F, 0xED, 0xED,
|
||||
0xED, 0xA6, 0xA6, 0xA6, 0x39, 0x39, 0x39, 0xAE, 0x18, 0x92, 0x69, 0xAE, 0x06, 0x8F, 0x0F, 0x30,
|
||||
0x30, 0x30, 0x49, 0x49, 0x49, 0xA3, 0xA3, 0xA3, 0xF5, 0xF5, 0xF5, 0x6C, 0x6C, 0x6C, 0x33, 0x33,
|
||||
0x33, 0x20, 0x20, 0x20, 0xAE, 0x06, 0x83, 0x5A, 0x37, 0x37, 0x37, 0x5C, 0x5C, 0x5C, 0xDB, 0xDB,
|
||||
0xDB, 0xDB, 0xDB, 0xDB, 0xE7, 0xE7, 0xE7, 0x46, 0x46, 0x46, 0x2B, 0x2B, 0x2B, 0xAE, 0x0F, 0x92,
|
||||
0x69, 0xAE, 0x0F, 0x83, 0x5A, 0x3D, 0x17, 0x1C, 0x6D, 0x11, 0xAE, 0x13, 0x9B, 0x63, 0x52, 0xAE,
|
||||
0x05, 0x92, 0x3F, 0xAE, 0x57, 0xA2, 0x1C, 0xAE, 0x3C, 0x83, 0x5A, 0x36, 0x18, 0x1C, 0x62, 0x13,
|
||||
0x1D, 0xAE, 0x12, 0xB3, 0x51, 0x92, 0x0E, 0x1E, 0x35, 0xAE, 0x1D, 0x92, 0x3F, 0xAE, 0x24, 0x9C,
|
||||
0x70, 0x27, 0x27, 0x27, 0x3B, 0x3B, 0x3B, 0x9B, 0x9B, 0x9B, 0xF5, 0xF5, 0xF5, 0x3F, 0x3F, 0x3F,
|
||||
0x2A, 0x2A, 0x2A, 0xAE, 0x1E, 0x99, 0x4F, 0x1F, 0x1F, 0x1F, 0x31, 0x31, 0x31, 0x4E, 0x4E, 0x4E,
|
||||
0xB5, 0xB5, 0xB5, 0xD5, 0xD5, 0xD5, 0x3F, 0x3F, 0x3F, 0x27, 0x27, 0x27, 0xAE, 0x07, 0x82, 0x5C,
|
||||
0x21, 0x21, 0x33, 0x33, 0x33, 0x4D, 0x4D, 0x4D, 0xB4, 0xB4, 0xB4, 0xD5, 0xD5, 0xD5, 0xAE, 0x0C,
|
||||
0x87, 0x04, 0xAE, 0x18, 0x84, 0x28, 0x24, 0x24, 0x24, 0x39, 0x39, 0x39, 0x57, 0x57, 0x57, 0xE6,
|
||||
0xE6, 0xE6, 0xC4, 0xC4, 0xC4, 0x3D, 0x3D, 0x3D, 0x25, 0x25, 0x25, 0xAE, 0x06, 0x83, 0x5A, 0x38,
|
||||
0x38, 0x38, 0x5E, 0x5E, 0x5E, 0xDB, 0xDB, 0xDB, 0xF5, 0xF5, 0xF5, 0xA0, 0xA0, 0xA0, 0x37, 0x37,
|
||||
0x37, 0xAE, 0x0F, 0x8F, 0x54, 0xAE, 0x12, 0x82, 0x62, 0x3F, 0x17, 0x1C, 0x6F, 0xAE, 0x35, 0x95,
|
||||
0x24, 0xAE, 0x75, 0x83, 0x5A, 0xAE, 0x06, 0x8C, 0x3F, 0x65, 0xAE, 0x14, 0x88, 0x65, 0x90, 0x0E,
|
||||
0x1D, 0x33, 0xAE, 0x20, 0x8C, 0x3F, 0xAE, 0x21, 0xA3, 0x62, 0xAE, 0x06, 0x96, 0x16, 0x93, 0x93,
|
||||
0x93, 0xB3, 0xB3, 0xB3, 0x2F, 0x2F, 0x2F, 0x22, 0x22, 0x22, 0xAE, 0x1F, 0x8B, 0x5C, 0x1E, 0x1E,
|
||||
0x2D, 0x2D, 0x2D, 0x49, 0x49, 0x49, 0xA2, 0xA2, 0xA2, 0xED, 0xED, 0xED, 0x41, 0x41, 0x41, 0x28,
|
||||
0x28, 0x28, 0xAE, 0x06, 0x84, 0x25, 0x26, 0x26, 0x26, 0x3D, 0x3D, 0x3D, 0x56, 0x56, 0x56, 0xED,
|
||||
0xED, 0xED, 0x9A, 0x9A, 0x9A, 0x34, 0x34, 0x34, 0xAE, 0x1E, 0x83, 0x0C, 0xAE, 0x06, 0x84, 0x28,
|
||||
0x2F, 0x2F, 0x2F, 0x4B, 0x4B, 0x4B, 0xAC, 0xAC, 0xAC, 0xE6, 0xE6, 0xE6, 0x45, 0x45, 0x45, 0x2A,
|
||||
0x2A, 0x2A, 0xAE, 0x06, 0x93, 0x07, 0x38, 0x38, 0x38, 0x5B, 0x5B, 0x5B, 0xDA, 0xDA, 0xDA, 0xF5,
|
||||
0xF5, 0xF5, 0x5D, 0x5D, 0x5D, 0x2D, 0x2D, 0x2D, 0xAE, 0x1B, 0x84, 0x25, 0xAE, 0x3F, 0x98, 0x7E,
|
||||
0xAE, 0x78, 0x83, 0x5A, 0x39, 0x18, 0x1C, 0x66, 0xAE, 0x59, 0x83, 0x5A, 0xAE, 0x09, 0xA4, 0x24,
|
||||
0x29, 0x29, 0x29, 0xAE, 0x15, 0xA0, 0x35, 0xAE, 0x12, 0x87, 0x67, 0x2B, 0x2B, 0x2B, 0x47, 0x47,
|
||||
0x47, 0x8E, 0x8E, 0x8E, 0xF5, 0xF5, 0xF5, 0x43, 0x43, 0x43, 0x29, 0x29, 0x29, 0xAE, 0x06, 0x83,
|
||||
0x72, 0x2C, 0x2C, 0x2C, 0x47, 0x47, 0x47, 0x97, 0x97, 0x97, 0xED, 0xED, 0xED, 0x49, 0x49, 0x49,
|
||||
0x30, 0x30, 0x30, 0xAE, 0x06, 0x91, 0x65, 0xAE, 0x06, 0xA9, 0x20, 0xAE, 0x09, 0x09, 0xAE, 0x0C,
|
||||
0x0C, 0x22, 0x22, 0x22, 0x2D, 0x2D, 0x2D, 0x47, 0x47, 0x47, 0x83, 0x83, 0x83, 0xF5, 0xF5, 0xF5,
|
||||
0x68, 0x68, 0x68, 0x2F, 0x2F, 0x2F, 0xAE, 0x06, 0xA6, 0x08, 0x36, 0x36, 0x36, 0x57, 0x57, 0x57,
|
||||
0xD8, 0xD8, 0xD8, 0xD6, 0xD6, 0xD6, 0x42, 0x42, 0x42, 0xAE, 0x09, 0x88, 0x1A, 0xAE, 0x82, 0x26,
|
||||
0x87, 0x34, 0xAE, 0x0F, 0xAB, 0x0A, 0xAE, 0x06, 0xAB, 0x04, 0x1C, 0x1C, 0x1C, 0xAE, 0x06, 0xA7,
|
||||
0x4B, 0x1F, 0x1F, 0x1F, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x22, 0x22, 0x22, 0x22, 0xAE, 0x04,
|
||||
0x04, 0xAE, 0x04, 0x04, 0x24, 0x24, 0x24, 0x30, 0x30, 0x30, 0x4B, 0x4B, 0x4B, 0x8F, 0x8F, 0x8F,
|
||||
0xF5, 0xF5, 0xF5, 0x44, 0x44, 0x44, 0x2A, 0x2A, 0x2A, 0xAE, 0x09, 0x8B, 0x26, 0x50, 0x50, 0x50,
|
||||
0xC0, 0xC0, 0xC0, 0xD0, 0xD0, 0xD0, 0x53, 0x53, 0x53, 0xAE, 0x06, 0xA5, 0x31, 0x35, 0xAE, 0x04,
|
||||
0x04, 0xAE, 0x08, 0x08, 0xAE, 0x10, 0x10, 0xAE, 0x04, 0x04, 0x3D, 0x3D, 0x3D, 0x52, 0x52, 0x52,
|
||||
0x65, 0x65, 0x65, 0xF5, 0xF5, 0xF5, 0x84, 0x84, 0x84, 0xAE, 0x06, 0x93, 0x13, 0xAE, 0x06, 0x96,
|
||||
0x1C, 0x52, 0x52, 0x52, 0xD7, 0xD7, 0xD7, 0xB2, 0xB2, 0xB2, 0x3C, 0x3C, 0x3C, 0x24, 0x24, 0x24,
|
||||
0xAE, 0x21, 0xB0, 0x0C, 0x3E, 0xAE, 0x05, 0x8E, 0x68, 0xAE, 0x15, 0xA3, 0x14, 0xAE, 0x81, 0x19,
|
||||
0x8E, 0x68, 0x63, 0x13, 0xAE, 0x13, 0x83, 0x5A, 0x91, 0x0E, 0x1D, 0x34, 0xAE, 0x3E, 0x8E, 0x68,
|
||||
0xAE, 0x15, 0xAB, 0x2B, 0x23, 0x23, 0x23, 0x28, 0x28, 0x28, 0x2E, 0x2E, 0x2E, 0x32, 0x32, 0x32,
|
||||
0xAE, 0x06, 0xA3, 0x7D, 0xAE, 0x06, 0x9D, 0x53, 0x3A, 0xAE, 0x04, 0x04, 0x3A, 0x3C, 0x3C, 0x3C,
|
||||
0x47, 0x47, 0x47, 0x5D, 0x5D, 0x5D, 0x95, 0x95, 0x95, 0xF5, 0xF5, 0xF5, 0xAE, 0x06, 0x8A, 0x40,
|
||||
0xAE, 0x09, 0x91, 0x74, 0x58, 0x58, 0x58, 0xD9, 0xD9, 0xD9, 0xBC, 0xBC, 0xBC, 0x67, 0x67, 0x67,
|
||||
0x56, 0x56, 0x56, 0x51, 0x51, 0x51, 0x51, 0xAE, 0x04, 0x04, 0xAE, 0x08, 0x08, 0xAE, 0x10, 0x10,
|
||||
0xAE, 0x04, 0x04, 0x55, 0x55, 0x55, 0x63, 0x63, 0x63, 0x6E, 0x6E, 0x6E, 0xF5, 0xF5, 0xF5, 0x83,
|
||||
0x83, 0x83, 0x30, 0x30, 0x30, 0xAE, 0x09, 0x83, 0x5A, 0x51, 0x51, 0x51, 0xD6, 0xD6, 0xD6, 0xB0,
|
||||
0xB0, 0xB0, 0xAE, 0x0C, 0x93, 0x28, 0xAE, 0x1B, 0x83, 0x5A, 0x3B, 0xAE, 0x05, 0xA3, 0x50, 0xAE,
|
||||
0x12, 0xB0, 0x0C, 0x54, 0x14, 0x1C, 0x2D, 0xAE, 0x1D, 0x9F, 0x76, 0xAE, 0x78, 0x83, 0x5A, 0x34,
|
||||
0x18, 0x1C, 0x5F, 0x13, 0x1C, 0xAE, 0x12, 0xAD, 0x2D, 0x93, 0x0E, 0x1E, 0x36, 0xAE, 0x26, 0x96,
|
||||
0x1C, 0xAE, 0x2A, 0x8B, 0x17, 0xAE, 0x06, 0xAB, 0x1C, 0x41, 0x41, 0x41, 0x49, 0x49, 0x49, 0x4F,
|
||||
0x4F, 0x4F, 0x52, 0x52, 0x52, 0x54, 0x54, 0x54, 0x55, 0x55, 0x55, 0x56, 0x56, 0x56, 0x56, 0xAE,
|
||||
0x04, 0x04, 0x56, 0x58, 0x58, 0x58, 0x61, 0x61, 0x61, 0x72, 0x72, 0x72, 0x9E, 0x9E, 0x9E, 0xF5,
|
||||
0xF5, 0xF5, 0x47, 0x47, 0x47, 0xAE, 0x06, 0x83, 0x5A, 0x21, 0x21, 0x21, 0x39, 0x39, 0x39, 0x5D,
|
||||
0x5D, 0x5D, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8, 0xD9, 0xD9, 0xD9, 0xD7, 0xD7, 0xD7, 0xAE, 0x09,
|
||||
0xA9, 0x1D, 0xAE, 0x09, 0x09, 0xAE, 0x12, 0x12, 0xD6, 0xD6, 0xD6, 0xD8, 0xD8, 0xD8, 0xD8, 0xD8,
|
||||
0xD8, 0xF5, 0xF5, 0xF5, 0x7E, 0x7E, 0x7E, 0x2B, 0x2B, 0x2B, 0xAE, 0x06, 0x8B, 0x0E, 0xAE, 0x0F,
|
||||
0x83, 0x5A, 0xAE, 0x21, 0x90, 0x01, 0xAE, 0x1B, 0x8D, 0x37, 0x76, 0x11, 0x1D, 0x30, 0x18, 0xAE,
|
||||
0x1C, 0x9D, 0x14, 0xAE, 0x0F, 0xD5, 0x3D, 0xAE, 0x09, 0xB3, 0x54, 0xAE, 0x06, 0xB3, 0x63, 0xAE,
|
||||
0x1E, 0x99, 0x79, 0xAE, 0x3C, 0x9D, 0x50, 0x31, 0x18, 0x1B, 0x5A, 0xAE, 0x14, 0x9D, 0x50, 0xAB,
|
||||
0x0A, 0x1E, 0x39, 0x17, 0x1C, 0xAE, 0x1B, 0xA2, 0x1F, 0xAE, 0x27, 0x81, 0x31, 0xAE, 0x12, 0xAB,
|
||||
0x67, 0x75, 0x75, 0x75, 0xA2, 0xA2, 0xA2, 0xC6, 0xC6, 0xC6, 0xD6, 0xD6, 0xD6, 0xEE, 0xEE, 0xEE,
|
||||
0xF5, 0xF5, 0xF5, 0xF5, 0xAE, 0x04, 0x04, 0xAE, 0x08, 0x08, 0xAE, 0x0B, 0x0B, 0x48, 0x48, 0x48,
|
||||
0xAE, 0x06, 0x83, 0x5A, 0x22, 0x22, 0x22, 0x3B, 0x3B, 0x3B, 0x5D, 0x5D, 0x5D, 0xF5, 0xF5, 0xF5,
|
||||
0xCB, 0xCB, 0xCB, 0xB6, 0xB6, 0xB6, 0xB1, 0xB1, 0xB1, 0xB0, 0xB0, 0xB0, 0xB0, 0xAE, 0x04, 0x04,
|
||||
0xAE, 0x08, 0x08, 0xAE, 0x10, 0x10, 0xAE, 0x07, 0x07, 0xB1, 0xB1, 0xB1, 0xAF, 0xAF, 0xAF, 0xAC,
|
||||
0xAC, 0xAC, 0x59, 0x59, 0x59, 0xAE, 0x06, 0xA9, 0x32, 0xAE, 0x33, 0x83, 0x5A, 0x1F, 0xAE, 0x05,
|
||||
0xA4, 0x42, 0x61, 0xAE, 0x14, 0x89, 0x5D, 0xAE, 0x06, 0x86, 0x03, 0xAE, 0x1E, 0x89, 0x5D, 0xAE,
|
||||
0x06, 0xC5, 0x33, 0x29, 0x19, 0x1B, 0x34, 0xAE, 0x05, 0xBB, 0x05, 0x3F, 0x17, 0x1C, 0x3F, 0x17,
|
||||
0x1C, 0x39, 0xAE, 0x05, 0xD5, 0x2B, 0xAE, 0x06, 0xD1, 0x4B, 0xAE, 0x54, 0xA5, 0x04, 0x2E, 0x19,
|
||||
0x1B, 0x53, 0xAE, 0x14, 0xC7, 0x08, 0xBF, 0x07, 0x1F, 0x3F, 0xAE, 0x0B, 0xCD, 0x7D, 0xAE, 0x19,
|
||||
0xA2, 0x5B, 0xAE, 0x05, 0xD5, 0x3D, 0x31, 0xAE, 0x05, 0xD5, 0x3D, 0xAE, 0x06, 0x81, 0x31, 0x3B,
|
||||
0xAE, 0x05, 0xD5, 0x2B, 0xAE, 0x07, 0xD1, 0x4B, 0xAE, 0x05, 0x9C, 0x58, 0x2E, 0x2E, 0x2E, 0x40,
|
||||
0x40, 0x40, 0x52, 0x52, 0x52, 0x84, 0x84, 0x84, 0xCF, 0xCF, 0xCF, 0xF5, 0xF5, 0xF5, 0xED, 0xED,
|
||||
0xED, 0xCD, 0xCD, 0xCD, 0xB0, 0xB0, 0xB0, 0x91, 0x91, 0x91, 0x85, 0x85, 0x85, 0x84, 0x84, 0x84,
|
||||
0x84, 0xAE, 0x04, 0x04, 0x84, 0x85, 0x85, 0x85, 0x8B, 0x8B, 0x8B, 0x95, 0x95, 0x95, 0xB5, 0xB5,
|
||||
0xB5, 0xAE, 0x0C, 0x87, 0x34, 0x22, 0x22, 0x22, 0x3A, 0x3A, 0x3A, 0x5A, 0x5A, 0x5A, 0xAE, 0x06,
|
||||
0x9E, 0x18, 0x4F, 0x4F, 0x4F, 0x3C, 0x3C, 0x3C, 0xAE, 0x06, 0x8B, 0x4A, 0xAE, 0x06, 0x06, 0xAE,
|
||||
0x0C, 0x0C, 0xAE, 0x12, 0x12, 0x35, 0x35, 0x35, 0x2F, 0x2F, 0x2F, 0x26, 0x26, 0x26, 0xAE, 0x06,
|
||||
0x9D, 0x32, 0xAE, 0x34, 0x83, 0x5A, 0x1B, 0x1B, 0x30, 0xAE, 0x05, 0xB7, 0x43, 0xCD, 0x05, 0xAE,
|
||||
0x10, 0x82, 0x29, 0xAC, 0x09, 0xAE, 0x1F, 0xB7, 0x0A, 0xAE, 0x06, 0x3F, 0x2A, 0x19, 0x1B, 0x40,
|
||||
0x17, 0x1C, 0x59, 0x14, 0x1C, 0x6B, 0x12, 0x1D, 0x6F, 0x11, 0x1D, 0x6E, 0x11, 0x1D, 0x64, 0x12,
|
||||
0x1D, 0x4E, 0x15, 0x1C, 0xAE, 0x06, 0xB6, 0x4B, 0xAE, 0x51, 0xAC, 0x38, 0x1D, 0xAE, 0x05, 0xC6,
|
||||
0x25, 0x4C, 0xAE, 0x14, 0xB4, 0x61, 0xD2, 0x04, 0xAE, 0x07, 0xB7, 0x0A, 0xAE, 0x1E, 0xA2, 0x55,
|
||||
0x27, 0xAE, 0x05, 0xC3, 0x0D, 0x52, 0xAE, 0x05, 0xD5, 0x3D, 0x6F, 0x11, 0x1D, 0x6F, 0x11, 0x1D,
|
||||
0x67, 0x12, 0x1D, 0x54, 0x14, 0x1C, 0x3B, 0x17, 0xAE, 0x04, 0x3C, 0x22, 0x1F, 0x1F, 0x2C, 0x2C,
|
||||
0x2C, 0x41, 0x41, 0x41, 0x59, 0x59, 0x59, 0xB6, 0xB6, 0xB6, 0xAE, 0x06, 0xB0, 0x09, 0x90, 0x90,
|
||||
0x90, 0x45, 0x45, 0x45, 0x3D, 0x3D, 0x3D, 0xAE, 0x06, 0x82, 0x74, 0xAE, 0x06, 0xBB, 0x23, 0x33,
|
||||
0xAE, 0x04, 0x04, 0x33, 0x35, 0x35, 0x35, 0x40, 0x40, 0x40, 0x58, 0x58, 0x58, 0x94, 0x94, 0x94,
|
||||
0xAE, 0x0C, 0x8E, 0x68, 0xAE, 0x06, 0x8B, 0x0E, 0x55, 0x55, 0x55, 0xF5, 0xF5, 0xF5, 0x89, 0x89,
|
||||
0x89, 0x3D, 0x3D, 0x3D, 0x28, 0x28, 0x28, 0xAE, 0x0C, 0x92, 0x7B, 0xAE, 0x0C, 0x0C, 0xAE, 0x12,
|
||||
0x12, 0xAE, 0x06, 0xBB, 0x77, 0xAE, 0x09, 0xA5, 0x79, 0xAE, 0x33, 0x83, 0x5A, 0xAE, 0x09, 0xB7,
|
||||
0x0A, 0xB3, 0xAE, 0x11, 0xC2, 0x4E, 0xAE, 0x09, 0x82, 0x29, 0xAE, 0x1E, 0x8A, 0x55, 0x38, 0xAE,
|
||||
0x17, 0xB2, 0x3B, 0x73, 0x12, 0x1D, 0xAE, 0x1B, 0x3C, 0xAE, 0x3C, 0xB0, 0x12, 0x25, 0x1A, 0x1B,
|
||||
0x42, 0x16, 0x1C, 0x88, 0xAE, 0x14, 0xB0, 0x12, 0x52, 0x15, 0x1C, 0x2D, 0xAE, 0x1A, 0xB5, 0x1D,
|
||||
0xAE, 0x09, 0xBD, 0x0D, 0x52, 0x14, 0x1C, 0xC3, 0xAE, 0x12, 0xA5, 0x43, 0x0B, 0x1E, 0x2F, 0x1B,
|
||||
0x1D, 0x29, 0x26, 0x26, 0x3B, 0x3B, 0x3B, 0x56, 0x56, 0x56, 0xC7, 0xC7, 0xC7, 0xF5, 0xF5, 0xF5,
|
||||
0x9E, 0x9E, 0x9E, 0x42, 0x42, 0x42, 0x34, 0x34, 0x34, 0x2B, 0x2B, 0x2B, 0xAE, 0x0C, 0xAB, 0x1C,
|
||||
0xAE, 0x09, 0xC1, 0x44, 0x20, 0x20, 0x20, 0xAE, 0x06, 0x9D, 0x50, 0xAE, 0x06, 0x99, 0x76, 0xAE,
|
||||
0x09, 0x96, 0x1C, 0xAE, 0x06, 0x99, 0x28, 0x52, 0x52, 0x52, 0xDE, 0xDE, 0xDE, 0xB1, 0xB1, 0xB1,
|
||||
0x3A, 0x3A, 0x3A, 0xAE, 0x21, 0x91, 0x74, 0xAE, 0x1C, 0x8E, 0x35, 0xAE, 0x32, 0x83, 0x5A, 0x1C,
|
||||
0xAE, 0x05, 0xDB, 0x04, 0x42, 0x16, 0x1C, 0x87, 0xAE, 0x14, 0x82, 0x29, 0x58, 0x14, 0x1C, 0x31,
|
||||
0x18, 0x1B, 0xAE, 0x18, 0x8B, 0x11, 0x1D, 0x1B, 0x1B, 0x28, 0x19, 0x1B, 0x48, 0x16, 0x1C, 0x74,
|
||||
0xAE, 0x14, 0xB9, 0x6F, 0xAE, 0x5A, 0xB7, 0x46, 0x21, 0xAE, 0x05, 0x90, 0x1C, 0x65, 0x12, 0xAE,
|
||||
0x13, 0x93, 0x76, 0x7D, 0x10, 0x1D, 0xAE, 0x1B, 0xBC, 0x51, 0xAE, 0x06, 0xB8, 0x77, 0x3F, 0xAE,
|
||||
0x17, 0xAA, 0x4E, 0x8A, 0x0F, 0x1D, 0x31, 0x1D, 0x1F, 0x31, 0x2F, 0x2F, 0x49, 0x49, 0x49, 0x9A,
|
||||
0x9A, 0x9A, 0xAE, 0x06, 0x83, 0x57, 0x3D, 0x3D, 0x3D, 0x2A, 0x2A, 0x2A, 0x20, 0x20, 0x20, 0xAE,
|
||||
0x18, 0xA5, 0x0A, 0x1D, 0x1D, 0x1D, 0x2A, 0x2A, 0x2A, 0x46, 0x46, 0x46, 0x8D, 0x8D, 0x8D, 0xAE,
|
||||
0x12, 0x99, 0x76, 0x4E, 0x4E, 0x4E, 0xD6, 0xD6, 0xD6, 0xBB, 0xBB, 0xBB, 0xAE, 0x0C, 0xA5, 0x1C,
|
||||
0xAE, 0x66, 0x83, 0x5A, 0xAE, 0x06, 0x82, 0x29, 0x37, 0xAE, 0x05, 0xA7, 0x30, 0xAE, 0x12, 0xB9,
|
||||
0x6F, 0x9B, 0x0C, 0x1E, 0x43, 0x16, 0x1C, 0x28, 0xAE, 0x14, 0x86, 0x06, 0xAE, 0x06, 0xC1, 0x23,
|
||||
0x35, 0xAE, 0x05, 0xB4, 0x28, 0xAD, 0xAE, 0x11, 0x87, 0x70, 0xE1, 0x03, 0xAE, 0x1F, 0xB2, 0x77,
|
||||
0xAE, 0x3D, 0xBE, 0x7A, 0x1B, 0x1B, 0x2F, 0xAE, 0x05, 0xD9, 0x4D, 0xCC, 0xAE, 0x11, 0x8C, 0x42,
|
||||
0xC2, 0x06, 0x1F, 0x4D, 0xAE, 0x06, 0xC9, 0x52, 0xAE, 0x14, 0x83, 0x5D, 0x1F, 0xAE, 0x05, 0xCA,
|
||||
0x3E, 0x51, 0x15, 0x1C, 0x85, 0xAE, 0x11, 0x85, 0x47, 0xFF, 0x00, 0x20, 0x4B, 0x15, 0x1C, 0x2F,
|
||||
0x1F, 0x21, 0x38, 0x37, 0x37, 0x54, 0x54, 0x54, 0xDF, 0xDF, 0xDF, 0xC5, 0xC5, 0xC5, 0xAE, 0x06,
|
||||
0x83, 0x27, 0xAE, 0x1B, 0xAB, 0x1C, 0xAE, 0x06, 0xA1, 0x12, 0x2B, 0x2B, 0x2B, 0x49, 0x49, 0x49,
|
||||
0xAE, 0x06, 0x9D, 0x50, 0xAE, 0x09, 0x8B, 0x0E, 0xAE, 0x06, 0xA1, 0x2A, 0x48, 0x48, 0x48, 0xB4,
|
||||
0xB4, 0xB4, 0xDE, 0xDE, 0xDE, 0x48, 0x48, 0x48, 0xAE, 0x21, 0xA4, 0x36, 0xAE, 0x51, 0x83, 0x5A,
|
||||
0xAE, 0x06, 0xDF, 0x50, 0xAE, 0x15, 0x8B, 0x11, 0xEA, 0x02, 0x1F, 0x62, 0x13, 0x1D, 0x3D, 0xAE,
|
||||
0x05, 0xD4, 0x66, 0x20, 0xAE, 0x05, 0x94, 0x3E, 0x1E, 0xAE, 0x08, 0xAE, 0x4C, 0x23, 0xAE, 0x05,
|
||||
0xDC, 0x2C, 0x4B, 0x15, 0x1C, 0x74, 0x10, 0xAE, 0x13, 0xAB, 0x43, 0xB2, 0x09, 0x1E, 0x37, 0xAE,
|
||||
0x1D, 0x99, 0x01, 0xAE, 0x3C, 0x83, 0x5A, 0xAE, 0x06, 0x8E, 0x2C, 0x43, 0xAE, 0x14, 0x88, 0x68,
|
||||
0xF8, 0x01, 0x20, 0x83, 0x0F, 0x1D, 0x45, 0x16, 0x1C, 0x2D, 0xAE, 0x05, 0xB4, 0x6D, 0xAE, 0x06,
|
||||
0xAF, 0x6B, 0xAE, 0x06, 0x81, 0x31, 0x21, 0xAE, 0x05, 0xB5, 0x11, 0x43, 0xAE, 0x05, 0xD3, 0x20,
|
||||
0xBE, 0x07, 0xAE, 0x10, 0x81, 0x6A, 0xD8, 0x04, 0x1F, 0x3F, 0x17, 0x1C, 0x2C, 0x22, 0x23, 0x3C,
|
||||
0x3C, 0x3C, 0xAE, 0x06, 0x91, 0x77, 0x94, 0x94, 0x94, 0xAE, 0x25, 0x91, 0x29, 0xAE, 0x05, 0x87,
|
||||
0x1C, 0x52, 0x52, 0x52, 0xAE, 0x06, 0x8E, 0x68, 0xAE, 0x09, 0x92, 0x42, 0xAE, 0x06, 0xAD, 0x03,
|
||||
0x3F, 0x3F, 0x3F, 0x7F, 0x7F, 0x7F, 0xF5, 0xF5, 0xF5, 0x6F, 0x6F, 0x6F, 0x38, 0x38, 0x38, 0xAE,
|
||||
0x1B, 0xB0, 0x5D, 0xAE, 0x54, 0x83, 0x5A, 0xAE, 0x06, 0x89, 0x24, 0x3C, 0xAE, 0x05, 0xE7, 0x04,
|
||||
0xAE, 0x12, 0xB0, 0x18, 0xD4, 0x04, 0x1F, 0x62, 0x13, 0x1D, 0x46, 0x16, 0x1C, 0x35, 0x18, 0x1C,
|
||||
0x2E, 0xAE, 0x05, 0xED, 0x52, 0x2C, 0x19, 0x1B, 0x31, 0x18, 0x1B, 0x3B, 0x17, 0x1C, 0x50, 0x15,
|
||||
0x1C, 0x6F, 0x11, 0x1D, 0xAE, 0x12, 0x87, 0x31, 0xFF, 0x00, 0x20, 0x6E, 0x12, 0x1D, 0x2C, 0xAE,
|
||||
0x1D, 0x8D, 0x70, 0xAE, 0x3F, 0xA9, 0x56, 0x20, 0xAE, 0x05, 0x9D, 0x56, 0x5A, 0xAE, 0x14, 0x8F,
|
||||
0x60, 0xEA, 0x02, 0x1F, 0x77, 0x11, 0x1D, 0x4B, 0x15, 0x1C, 0x39, 0x18, 0x1C, 0xAE, 0x06, 0xEF,
|
||||
0x03, 0x2B, 0xAE, 0x05, 0xEF, 0x12, 0x39, 0x18, 0x1C, 0x49, 0x15, 0x1C, 0x67, 0x12, 0x1D, 0x92,
|
||||
0x0D, 0xAE, 0x13, 0x81, 0x67, 0xA4, 0x0B, 0x1E, 0x33, 0x18, 0x1C, 0x28, 0x23, 0x24, 0x3E, 0x3E,
|
||||
0x3E, 0x80, 0x80, 0x80, 0xF5, 0xF5, 0xF5, 0x87, 0x87, 0x87, 0x36, 0x36, 0x36, 0xAE, 0x06, 0xB2,
|
||||
0x6B, 0xAE, 0x1B, 0xA1, 0x4B, 0x25, 0x25, 0x25, 0x3D, 0x3D, 0x3D, 0x61, 0x61, 0x61, 0xBD, 0xBD,
|
||||
0xBD, 0xF5, 0xF5, 0xF5, 0x49, 0x49, 0x49, 0xAE, 0x06, 0x83, 0x5A, 0xAE, 0x06, 0x92, 0x45, 0xAE,
|
||||
0x06, 0xA4, 0x39, 0xE6, 0xE6, 0xE6, 0xC5, 0xC5, 0xC5, 0x46, 0x46, 0x46, 0x2C, 0x2C, 0x2C, 0xAE,
|
||||
0x1E, 0x88, 0x02, 0xAE, 0x0C, 0xA6, 0x05, 0xAE, 0x0C, 0xB8, 0x38, 0xAE, 0x36, 0x83, 0x5A, 0xAE,
|
||||
0x06, 0x89, 0x60, 0x2D, 0x19, 0x1B, 0x4D, 0x15, 0x1C, 0xB1, 0xAE, 0x14, 0x83, 0x27, 0xD4, 0x04,
|
||||
0x1F, 0x7D, 0x10, 0x1D, 0x5F, 0x13, 0x1C, 0x53, 0x14, 0x1C, 0x50, 0x15, 0x1C, 0x52, 0x15, 0x1C,
|
||||
0x59, 0x14, 0x1C, 0x68, 0x12, 0x1D, 0x78, 0x10, 0x1D, 0xBE, 0xAE, 0x14, 0xD5, 0x16, 0xCE, 0x05,
|
||||
0x1F, 0x3B, 0xAE, 0x05, 0x98, 0x7E, 0xAE, 0x54, 0x9D, 0x50, 0xAE, 0x0C, 0xD2, 0x70, 0x43, 0x16,
|
||||
0x1C, 0x84, 0xAE, 0x14, 0x8A, 0x58, 0xEA, 0x02, 0x1F, 0x8B, 0x0E, 0x1D, 0x63, 0x12, 0x1D, 0x55,
|
||||
0xAE, 0x05, 0x81, 0x31, 0x50, 0x15, 0x1C, 0x56, 0x14, 0x1C, 0x63, 0x12, 0x1D, 0x74, 0x10, 0x1D,
|
||||
0xA5, 0x0A, 0xAE, 0x13, 0xD5, 0x16, 0xF0, 0x01, 0x20, 0x45, 0xAE, 0x05, 0x90, 0x16, 0x25, 0x23,
|
||||
0x23, 0x3B, 0x3B, 0x3B, 0x66, 0x66, 0x66, 0xAE, 0x06, 0x95, 0x51, 0xAE, 0x1E, 0x91, 0x77, 0x1D,
|
||||
0x1D, 0x1D, 0x23, 0x23, 0x23, 0x31, 0x31, 0x31, 0x4F, 0x4F, 0x4F, 0x7D, 0x7D, 0x7D, 0xEF, 0xEF,
|
||||
0xEF, 0xAE, 0x0F, 0x83, 0x5A, 0xAE, 0x06, 0x8B, 0x29, 0x44, 0x44, 0x44, 0xA1, 0xA1, 0xA1, 0xF5,
|
||||
0xF5, 0xF5, 0x72, 0x72, 0x72, 0x3C, 0x3C, 0x3C, 0xAE, 0x12, 0xC9, 0x64, 0xAE, 0x0F, 0x8B, 0x5C,
|
||||
0x22, 0x22, 0x22, 0x28, 0x28, 0x28, 0xAE, 0x06, 0xBE, 0x4D, 0xAE, 0x09, 0xBA, 0x7C, 0xAE, 0x39,
|
||||
0x83, 0x5A, 0xAE, 0x06, 0xC0, 0x6A, 0x37, 0x18, 0x1C, 0x5A, 0x14, 0x1C, 0xDB, 0xAE, 0x14, 0xDA,
|
||||
0x6F, 0xF8, 0x01, 0x20, 0xCD, 0x05, 0x1F, 0xAC, 0x09, 0x1E, 0xA2, 0x0B, 0x1E, 0xA3, 0x0B, 0x1E,
|
||||
0xAD, 0x09, 0x1E, 0xCD, 0x05, 0xAE, 0x16, 0xDC, 0x4A, 0xF8, 0x01, 0x20, 0x5A, 0x14, 0x1C, 0x2C,
|
||||
0xAE, 0x20, 0xDE, 0x73, 0xAE, 0x42, 0xB1, 0x0A, 0x20, 0xAE, 0x05, 0x8C, 0x0F, 0x50, 0x15, 0x1C,
|
||||
0xBA, 0xAE, 0x11, 0x8A, 0x5B, 0xAE, 0x06, 0x06, 0xD5, 0x04, 0x1F, 0xB5, 0x08, 0xAE, 0x07, 0xEF,
|
||||
0x4B, 0xA3, 0x0A, 0x1E, 0xC5, 0x06, 0x1F, 0xAE, 0x18, 0xE7, 0x76, 0x8B, 0x0F, 0x1D, 0x31, 0x18,
|
||||
0xAE, 0x04, 0x51, 0xAE, 0x06, 0x86, 0x66, 0x53, 0x53, 0x53, 0xEE, 0xEE, 0xEE, 0xAC, 0xAC, 0xAC,
|
||||
0x47, 0x47, 0x47, 0x2D, 0x2D, 0x2D, 0xAE, 0x06, 0xC4, 0x7D, 0xAE, 0x12, 0xA8, 0x76, 0x27, 0x27,
|
||||
0x27, 0x33, 0x33, 0x33, 0x46, 0x46, 0x46, 0x62, 0x62, 0x62, 0xDB, 0xDB, 0xDB, 0xE2, 0xE2, 0xE2,
|
||||
0xAE, 0x0F, 0x83, 0x5A, 0x1C, 0x1C, 0x1C, 0x23, 0x23, 0x23, 0x35, 0x35, 0x35, 0x4F, 0x4F, 0x4F,
|
||||
0xDE, 0xDE, 0xDE, 0xDE, 0xDE, 0xDE, 0x52, 0x52, 0x52, 0x3A, 0x3A, 0x3A, 0x29, 0x29, 0x29, 0xAE,
|
||||
0x12, 0x93, 0x13, 0xAE, 0x09, 0x54, 0x32, 0x32, 0x32, 0x3A, 0x3A, 0x3A, 0x4C, 0x4C, 0x4C, 0x2F,
|
||||
0x2F, 0x2F, 0x23, 0x23, 0x23, 0xAE, 0x07, 0xC2, 0x21, 0xAE, 0x38, 0x83, 0x5A, 0xAE, 0x06, 0x8E,
|
||||
0x6E, 0x27, 0xAE, 0x05, 0xBB, 0x2C, 0x6E, 0x12, 0xAE, 0x13, 0x92, 0x4B, 0xAE, 0x2A, 0xE3, 0x7E,
|
||||
0x7D, 0x11, 0x1D, 0x32, 0xAE, 0x05, 0xD8, 0x6A, 0xAE, 0x57, 0xBE, 0x7A, 0xAE, 0x0F, 0x85, 0x0E,
|
||||
0x36, 0xAE, 0x05, 0xD9, 0x74, 0xD3, 0xAE, 0x32, 0xE9, 0x06, 0xAE, 0x09, 0x09, 0xA5, 0x0B, 0x1E,
|
||||
0x39, 0xAE, 0x05, 0xCB, 0x6F, 0x1D, 0xAE, 0x05, 0x8E, 0x35, 0x2D, 0x2D, 0x2D, 0x48, 0x48, 0x48,
|
||||
0xC6, 0xC6, 0xC6, 0xE7, 0xE7, 0xE7, 0x67, 0x67, 0x67, 0x42, 0x42, 0x42, 0x30, 0x30, 0x30, 0x26,
|
||||
0x26, 0x26, 0xAE, 0x06, 0x9C, 0x64, 0x21, 0x21, 0x21, 0xAE, 0x06, 0xAC, 0x47, 0x30, 0x30, 0x30,
|
||||
0x3B, 0x3B, 0x3B, 0x4A, 0x4A, 0x4A, 0x5A, 0x5A, 0x5A, 0xC8, 0xC8, 0xC8, 0xE1, 0xE1, 0xE1, 0xA8,
|
||||
0xA8, 0xA8, 0xAE, 0x06, 0x83, 0x5A, 0x2C, 0x2C, 0x2C, 0xAE, 0x09, 0x84, 0x0A, 0xAE, 0x06, 0xC6,
|
||||
0x2E, 0x3C, 0x3C, 0x3C, 0x6F, 0x6F, 0x6F, 0xEE, 0xEE, 0xEE, 0xC6, 0xC6, 0xC6, 0x53, 0x53, 0x53,
|
||||
0xAE, 0x06, 0xD1, 0x6C, 0x28, 0x28, 0x28, 0x23, 0x23, 0x23, 0xAE, 0x09, 0x54, 0x27, 0x27, 0x27,
|
||||
0x2F, 0x2F, 0x2F, 0x3B, 0x3B, 0x3B, 0x49, 0x49, 0x49, 0x5F, 0x5F, 0x5F, 0xDB, 0xDB, 0xDB, 0x91,
|
||||
0x91, 0x91, 0xAE, 0x09, 0xCE, 0x33, 0xAE, 0x3C, 0x83, 0x5A, 0xAE, 0x06, 0x8B, 0x14, 0x29, 0x19,
|
||||
0x1B, 0x3F, 0x17, 0x1C, 0x6D, 0x12, 0xAE, 0x13, 0x8D, 0x40, 0xAE, 0x27, 0x83, 0x57, 0x35, 0x18,
|
||||
0x1C, 0x24, 0xAE, 0x23, 0xED, 0x5B, 0xAE, 0x06, 0xB4, 0x64, 0x6E, 0xAE, 0x14, 0x83, 0x5A, 0x4D,
|
||||
0xAE, 0x05, 0xCD, 0x26, 0xAE, 0x27, 0x85, 0x0E, 0x26, 0xAE, 0x05, 0x9A, 0x02, 0x56, 0x14, 0x1C,
|
||||
0xCA, 0xAE, 0x11, 0x96, 0x28, 0xAE, 0x24, 0x81, 0x34, 0xA4, 0x0B, 0x1E, 0x3B, 0x17, 0x1C, 0x27,
|
||||
0xAE, 0x08, 0xC7, 0x59, 0xAE, 0x06, 0x8E, 0x38, 0x39, 0x39, 0x39, 0x61, 0x61, 0x61, 0xEE, 0xEE,
|
||||
0xEE, 0xDF, 0xDF, 0xDF, 0x69, 0x69, 0x69, 0x4B, 0x4B, 0x4B, 0x3F, 0x3F, 0x3F, 0x39, 0x39, 0x39,
|
||||
0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x3A, 0x3A, 0x3A, 0x41, 0x41, 0x41, 0x4A, 0x4A, 0x4A, 0x54,
|
||||
0x54, 0x54, 0x81, 0x81, 0x81, 0xAE, 0x06, 0x87, 0x0D, 0x71, 0x71, 0x71, 0xAE, 0x06, 0xB0, 0x12,
|
||||
0x4A, 0x4A, 0x4A, 0x2F, 0x2F, 0x2F, 0xAE, 0x0C, 0x87, 0x10, 0x1F, 0x1F, 0x1F, 0x2B, 0x2B, 0x2B,
|
||||
0x3F, 0x3F, 0x3F, 0x7C, 0x7C, 0x7C, 0xEE, 0xEE, 0xEE, 0xD7, 0xD7, 0xD7, 0x74, 0x74, 0x74, 0x4D,
|
||||
0x4D, 0x4D, 0x41, 0x41, 0x41, 0x3A, 0x3A, 0x3A, 0xAE, 0x06, 0x54, 0x39, 0x39, 0x39, 0x40, 0x40,
|
||||
0x40, 0x49, 0x49, 0x49, 0x55, 0x55, 0x55, 0x80, 0x80, 0x80, 0xDD, 0xDD, 0xDD, 0xC0, 0xC0, 0xC0,
|
||||
0x31, 0x31, 0x31, 0xAE, 0x09, 0x92, 0x72, 0x20, 0x20, 0x20, 0x34, 0x34, 0x34, 0x4F, 0x4F, 0x4F,
|
||||
0xD6, 0xD6, 0xD6, 0xAF, 0xAF, 0xAF, 0xAE, 0x06, 0x93, 0x0D, 0xAE, 0x2E, 0xEB, 0x38, 0xAE, 0x05,
|
||||
0x9D, 0x23, 0x3A, 0x17, 0x1C, 0x55, 0x14, 0x1C, 0xC0, 0x07, 0x1F, 0xAE, 0x2A, 0xF2, 0x66, 0xCE,
|
||||
0x05, 0x1F, 0x5B, 0x14, 0x1C, 0x32, 0xAE, 0x26, 0x83, 0x57, 0xAE, 0x09, 0x9D, 0x14, 0x63, 0xAE,
|
||||
0x14, 0xD5, 0x4F, 0xAE, 0x06, 0x8D, 0x73, 0xAE, 0x2A, 0x88, 0x6B, 0xAE, 0x06, 0xCE, 0x63, 0x4E,
|
||||
0x15, 0x1C, 0xA2, 0xAE, 0x14, 0xE3, 0x5A, 0xAE, 0x18, 0x81, 0x31, 0xE0, 0x03, 0x1F, 0x7D, 0x11,
|
||||
0x1D, 0x38, 0xAE, 0x08, 0xFB, 0x51, 0xAE, 0x0C, 0x83, 0x09, 0x2A, 0x2A, 0x2A, 0x3E, 0x3E, 0x3E,
|
||||
0xAE, 0x06, 0x83, 0x09, 0xE7, 0xE7, 0xE7, 0xA3, 0xA3, 0xA3, 0x67, 0x67, 0x67, 0x55, 0x55, 0x55,
|
||||
0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x55, 0x55, 0x55, 0x5A, 0x5A, 0x5A, 0x97, 0x97, 0x97, 0xC5,
|
||||
0xC5, 0xC5, 0xF5, 0xF5, 0xF5, 0xB8, 0xB8, 0xB8, 0x57, 0x57, 0x57, 0x4B, 0x4B, 0x4B, 0x7E, 0x7E,
|
||||
0x7E, 0xF5, 0xF5, 0xF5, 0x7F, 0x7F, 0x7F, 0xAE, 0x06, 0xBA, 0x52, 0xAE, 0x12, 0xD1, 0x3F, 0x3E,
|
||||
0x3E, 0x3E, 0x7A, 0x7A, 0x7A, 0xDE, 0xDE, 0xDE, 0xEE, 0xEE, 0xEE, 0xBD, 0xBD, 0xBD, 0x75, 0x75,
|
||||
0x75, 0x56, 0x56, 0x56, 0xAE, 0x06, 0x54, 0x54, 0x54, 0x54, 0x59, 0x59, 0x59, 0x82, 0x82, 0x82,
|
||||
0xAE, 0x06, 0x54, 0xB7, 0xB7, 0xB7, 0xAE, 0x0F, 0xD5, 0x19, 0xAE, 0x06, 0xD5, 0x16, 0x47, 0x47,
|
||||
0x47, 0xD4, 0xD4, 0xD4, 0xAC, 0xAC, 0xAC, 0x33, 0x33, 0x33, 0xAE, 0x21, 0xBF, 0x45, 0xAE, 0x15,
|
||||
0x83, 0x5D, 0x25, 0xAE, 0x05, 0xA3, 0x29, 0x45, 0x16, 0x1C, 0x68, 0x12, 0x1C, 0xBF, 0x07, 0xAE,
|
||||
0x16, 0x8E, 0x50, 0xAE, 0x09, 0x87, 0x28, 0xCF, 0x05, 0x1F, 0x7D, 0x10, 0x1D, 0x3D, 0x17, 0x1C,
|
||||
0xAE, 0x06, 0xEA, 0x49, 0xAE, 0x27, 0xF5, 0x09, 0xAE, 0x06, 0xCD, 0x29, 0x4C, 0x15, 0x1C, 0xAE,
|
||||
0x12, 0x54, 0xAE, 0x06, 0xEE, 0x6B, 0xAE, 0x2D, 0xEC, 0x6F, 0x23, 0xAE, 0x05, 0x9D, 0x29, 0x3F,
|
||||
0xAE, 0x05, 0x85, 0x11, 0xAC, 0x0A, 0x1E, 0xE9, 0xAE, 0x1D, 0x8C, 0x4E, 0xD8, 0x04, 0x1F, 0x98,
|
||||
0x0D, 0x1D, 0x41, 0x16, 0x1C, 0x30, 0x18, 0x1B, 0x24, 0xAE, 0x11, 0xCF, 0x07, 0xAE, 0x06, 0x83,
|
||||
0x09, 0x2B, 0x2B, 0x2B, 0xAE, 0x06, 0xAF, 0x50, 0xC4, 0xC4, 0xC4, 0xAE, 0x06, 0xAF, 0x6B, 0xDE,
|
||||
0xDE, 0xDE, 0xAE, 0x06, 0xB3, 0x09, 0xAE, 0x06, 0xD8, 0x7C, 0xED, 0xED, 0xED, 0xC2, 0xC2, 0xC2,
|
||||
0x72, 0x72, 0x72, 0x37, 0x37, 0x37, 0x2F, 0x2F, 0x2F, 0x35, 0x35, 0x35, 0x41, 0x41, 0x41, 0xAE,
|
||||
0x06, 0xA1, 0x5D, 0x2A, 0x2A, 0x2A, 0xAE, 0x0F, 0x9D, 0x38, 0xAE, 0x06, 0x54, 0x29, 0x29, 0x29,
|
||||
0x38, 0x38, 0x38, 0x48, 0x48, 0x48, 0x9E, 0x9E, 0x9E, 0xAE, 0x06, 0x45, 0xEE, 0xEE, 0xEE, 0xAE,
|
||||
0x09, 0xB3, 0x60, 0xAE, 0x06, 0x66, 0xCB, 0xCB, 0xCB, 0x7F, 0x7F, 0x7F, 0x36, 0x36, 0x36, 0xAE,
|
||||
0x06, 0x83, 0x57, 0xAE, 0x09, 0x8B, 0x56, 0x1F, 0x1F, 0x1F, 0x29, 0x29, 0x29, 0x39, 0x39, 0x39,
|
||||
0xD2, 0xD2, 0xD2, 0xA8, 0xA8, 0xA8, 0xAE, 0x1E, 0xCA, 0x02, 0xAE, 0x1E, 0x94, 0x7A, 0xAE, 0x06,
|
||||
0x81, 0x83, 0x74, 0x33, 0x18, 0x1C, 0x40, 0x17, 0x1C, 0x4D, 0x15, 0x1C, 0x75, 0x11, 0x1D, 0x9E,
|
||||
0x0C, 0xAE, 0x07, 0xEE, 0x53, 0xBD, 0xAE, 0x05, 0xEE, 0x17, 0x90, 0x0E, 0x1D, 0x7E, 0x10, 0xAE,
|
||||
0x07, 0xEA, 0x16, 0x2F, 0xAE, 0x05, 0xCF, 0x79, 0xAE, 0x1B, 0x81, 0x88, 0x19, 0xAE, 0x18, 0xD5,
|
||||
0x4F, 0x32, 0x18, 0x1C, 0x41, 0x16, 0x1C, 0x4B, 0x15, 0x1C, 0x4F, 0x15, 0xAE, 0x07, 0x81, 0x85,
|
||||
0x79, 0x39, 0xAE, 0x05, 0xE7, 0x10, 0xAE, 0x30, 0x81, 0x35, 0xAE, 0x06, 0xAF, 0x68, 0x26, 0xAE,
|
||||
0x05, 0x92, 0x54, 0x3D, 0x17, 0x1C, 0x49, 0x15, 0x1C, 0x65, 0x13, 0x1C, 0x92, 0x0E, 0xAE, 0x0A,
|
||||
0xF0, 0x04, 0xBC, 0x07, 0x1F, 0x9C, 0x0C, 0x1D, 0x8C, 0x0F, 0x1D, 0x4B, 0x15, 0x1C, 0x3E, 0xAE,
|
||||
0x09, 0xB1, 0x31, 0xAE, 0x18, 0xA5, 0x2B, 0xAE, 0x05, 0xB7, 0x43, 0x28, 0x28, 0x28, 0x32, 0x32,
|
||||
0x32, 0x3F, 0x3F, 0x3F, 0x59, 0x59, 0x59, 0x85, 0x85, 0x85, 0xAE, 0x06, 0xB3, 0x06, 0xAF, 0xAF,
|
||||
0xAF, 0x9B, 0x9B, 0x9B, 0x81, 0x81, 0x81, 0x41, 0x41, 0x41, 0x37, 0x37, 0x37, 0x2D, 0x2D, 0x2D,
|
||||
0x25, 0x25, 0x25, 0x21, 0x21, 0x21, 0x25, 0x25, 0x25, 0x2C, 0x2C, 0x2C, 0x30, 0x30, 0x30, 0x2B,
|
||||
0x2B, 0x2B, 0x22, 0x22, 0x22, 0xAE, 0x15, 0xDC, 0x50, 0xAE, 0x0C, 0xE3, 0x7E, 0x45, 0x45, 0x45,
|
||||
0x77, 0x77, 0x77, 0x9C, 0x9C, 0x9C, 0xAE, 0x06, 0x54, 0xAF, 0xAF, 0xAF, 0x82, 0x82, 0x82, 0x53,
|
||||
0x53, 0x53, 0xAE, 0x06, 0xD5, 0x7F, 0xAE, 0x06, 0x96, 0x16, 0xAE, 0x12, 0xE0, 0x66, 0xAE, 0x09,
|
||||
0xE3, 0x7E, 0xAE, 0x09, 0x92, 0x5A, 0xAE, 0x39, 0xFE, 0x03, 0x1F, 0x1A, 0x1B, 0x25, 0x1A, 0x1B,
|
||||
0x2A, 0xAE, 0x05, 0xD4, 0x72, 0x36, 0x18, 0x1C, 0x3A, 0xAE, 0x05, 0xB2, 0x17, 0x3A, 0x17, 0x1C,
|
||||
0x38, 0x18, 0x1C, 0x33, 0xAE, 0x05, 0x9D, 0x5F, 0xAE, 0x07, 0x81, 0x8B, 0x2E, 0xAE, 0x35, 0x81,
|
||||
0x87, 0x4B, 0x1E, 0xAE, 0x08, 0x81, 0x8C, 0x05, 0x28, 0x19, 0xAE, 0x04, 0x63, 0x29, 0xAE, 0x3E,
|
||||
0x4E, 0xAE, 0x09, 0xD6, 0x23, 0x23, 0xAE, 0x05, 0x51, 0x2F, 0xAE, 0x05, 0xF3, 0x64, 0x39, 0xAE,
|
||||
0x05, 0x81, 0x31, 0x3B, 0x17, 0x1C, 0x39, 0x18, 0x1C, 0x34, 0xAE, 0x05, 0x9D, 0x5F, 0x29, 0x19,
|
||||
0x1B, 0x24, 0xAE, 0x05, 0x83, 0x54, 0xAE, 0x21, 0x82, 0x18, 0x1E, 0x1E, 0x1E, 0xAE, 0x06, 0x82,
|
||||
0x4D, 0x2E, 0x2E, 0x2E, 0x33, 0x33, 0x33, 0x37, 0x37, 0x37, 0x38, 0x38, 0x38, 0x37, 0x37, 0x37,
|
||||
0x33, 0x33, 0x33, 0x2F, 0x2F, 0x2F, 0xAE, 0x06, 0x92, 0x00, 0xAE, 0x06, 0x86, 0x57, 0xAE, 0x09,
|
||||
0x9D, 0x02, 0xAE, 0x09, 0xAF, 0x47, 0xAE, 0x21, 0xBB, 0x77, 0x2B, 0x2B, 0x2B, 0x31, 0x31, 0x31,
|
||||
0x35, 0x35, 0x35, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x35, 0x35, 0x35, 0x30, 0x30, 0x30, 0x2A,
|
||||
0x2A, 0x2A, 0xAE, 0x06, 0xEB, 0x35, 0xAE, 0x15, 0x83, 0x36, 0xAE, 0x0F, 0xEB, 0x32, 0xAE, 0x48,
|
||||
0x81, 0x81, 0x66, 0x1F, 0xAE, 0x05, 0x87, 0x46, 0xAE, 0x06, 0xB9, 0x51, 0xAE, 0x09, 0xEE, 0x14,
|
||||
0xAE, 0x2A, 0x81, 0x93, 0x1E, 0xAE, 0x78, 0x81, 0x91, 0x70, 0xAE, 0x09, 0x81, 0x31, 0xAE, 0x24,
|
||||
0xBC, 0x33, 0xAE, 0x1E, 0xA0, 0x38, 0xAE, 0x06, 0x95, 0x45, 0xAE, 0x0F, 0xB3, 0x03, 0xAE, 0x3F,
|
||||
0xC3, 0x2E, 0x20, 0x20, 0x20, 0xAE, 0x06, 0x54, 0xAE, 0x0C, 0xDC, 0x02, 0xAE, 0x82, 0x07, 0x81,
|
||||
0x95, 0x34, 0xAE, 0x82, 0x0A, 0x82, 0x0A, 0xAE, 0x84, 0x14, 0x84, 0x14, 0xAE, 0x88, 0x28, 0x88,
|
||||
0x28, 0xAE, 0x82, 0x40, 0x82, 0x40, 0xAE, 0x09, 0x81, 0x83, 0x0E, 0xAE, 0x09, 0x93, 0x2B, 0xAE,
|
||||
0x09, 0x94, 0x08, 0xAE, 0x0F, 0x0F, 0xAE, 0x1E, 0x1E, 0xAE, 0x3C, 0x3C, 0xAE, 0x78, 0x78, 0xAE,
|
||||
0x81, 0x4F, 0x81, 0x4F, 0x20, 0x20, 0x20, 0xAE, 0x06, 0x81, 0x85, 0x43, 0xAE, 0x09, 0xA2, 0x1F,
|
||||
0xAE, 0x06, 0x81, 0x81, 0x75, 0x32, 0x32, 0x32, 0x34, 0x34, 0x34, 0x34, 0xAE, 0x04, 0x04, 0xAE,
|
||||
0x08, 0x08, 0xAE, 0x10, 0x10, 0xAE, 0x20, 0x20, 0xAE, 0x40, 0x40, 0xAE, 0x81, 0x00, 0x81, 0x00,
|
||||
0xAE, 0x81, 0x3C, 0x81, 0x3C, 0xAE, 0x06, 0x9E, 0x69, 0x29, 0x29, 0x29, 0xAE, 0x06, 0xA2, 0x2B,
|
||||
0xAE, 0x06, 0xB8, 0x65, 0x2E, 0x2E, 0x2E, 0x3B, 0x3B, 0x3B, 0x44, 0x44, 0x44, 0x47, 0x47, 0x47,
|
||||
0x47, 0xAE, 0x04, 0x04, 0xAE, 0x08, 0x08, 0xAE, 0x10, 0x10, 0xAE, 0x20, 0x20, 0xAE, 0x40, 0x40,
|
||||
0xAE, 0x81, 0x00, 0x81, 0x00, 0xAE, 0x81, 0x3C, 0x81, 0x3C, 0x45, 0x45, 0x45, 0x3E, 0x3E, 0x3E,
|
||||
0x33, 0x33, 0x33, 0xAE, 0x06, 0xFE, 0x2D, 0xAE, 0x09, 0x81, 0x83, 0x14, 0xAE, 0x06, 0xF3, 0x19,
|
||||
0xAE, 0x06, 0x06, 0xAE, 0x0C, 0x0C, 0xAE, 0x18, 0x18, 0xAE, 0x30, 0x30, 0xAE, 0x60, 0x60, 0xAE,
|
||||
0x81, 0x40, 0x81, 0x40, 0xAE, 0x4B, 0x4B, 0xAE, 0x09, 0xAC, 0x74, 0xAE, 0x06, 0xAD, 0x2D, 0x32,
|
||||
0x32, 0x32, 0x38, 0x38, 0x38, 0xAE, 0x09, 0xE5, 0x2F, 0xAE, 0x09, 0x09, 0xAE, 0x12, 0x12, 0xAE,
|
||||
0x24, 0x24, 0xAE, 0x48, 0x48, 0xAE, 0x81, 0x10, 0x81, 0x10, 0xAE, 0x81, 0x1C, 0x81, 0x1C, 0xAE,
|
||||
0x06, 0xDA, 0x0C, 0x2C, 0x2C, 0x2C, 0xAE, 0x09, 0xAC, 0x56, 0xAE, 0x06, 0xE0, 0x5D, 0xAE, 0x06,
|
||||
0x81, 0x82, 0x7C, 0xAE, 0x06, 0xC3, 0x28, 0xAE, 0x06, 0x06, 0xAE, 0x0C, 0x0C, 0xAE, 0x18, 0x18,
|
||||
0xAE, 0x30, 0x30, 0xAE, 0x60, 0x60, 0xAE, 0x81, 0x40, 0x81, 0x40, 0xAE, 0x3C, 0x3C, 0x27, 0x27,
|
||||
0x27, 0xAE, 0x06, 0xC0, 0x22, 0xAE, 0x42, 0xA9, 0x7D, 0xAE, 0x93, 0x10, 0xA9, 0x65, 0xAE, 0x83,
|
||||
0x33, 0xAD, 0x15, 0xAE, 0x06, 0xC0, 0x3D, 0xAE, 0x06, 0x97, 0x0B, 0xAE, 0x09, 0x81, 0x87, 0x4B,
|
||||
0xAE, 0x06, 0x97, 0x17, 0xAE, 0x06, 0x1E, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0xAE, 0x06, 0xDA,
|
||||
0x5D, 0xAE, 0x06, 0xAD, 0x42, 0xAE, 0x2D, 0xC0, 0x5E, 0xAE, 0x06, 0x9F, 0x13, 0xAE, 0x15, 0x36,
|
||||
0xAE, 0x09, 0xAE, 0x13, 0xAE, 0x48, 0x51, 0xAE, 0x73, 0x81, 0xC7, 0x37, 0xAE, 0x08, 0xC2, 0x7E,
|
||||
0xAE, 0x21, 0x81, 0xAE, 0x66, 0xAE, 0x12, 0xE4, 0x34, 0xAE, 0x5D, 0x81, 0x19, 0xAE, 0x06, 0xF4,
|
||||
0x5F, 0x36, 0x36, 0x36, 0x2B, 0x2B, 0x2B, 0xAE, 0x06, 0x9E, 0x36, 0x2D, 0x2D, 0x2D, 0xAE, 0x06,
|
||||
0x0C, 0xAE, 0x09, 0x1E, 0x3D, 0x3D, 0x3D, 0x3D, 0x3D, 0x3D, 0x2F, 0x2F, 0x2F, 0xAE, 0x06, 0x81,
|
||||
0xB3, 0x08, 0x2F, 0x2F, 0x2F, 0xAE, 0x15, 0x81, 0xA8, 0x75, 0xAE, 0x1B, 0x63, 0x31, 0x31, 0x31,
|
||||
0x37, 0x37, 0x37, 0xAE, 0x06, 0x81, 0x96, 0x15, 0xAE, 0x0F, 0x1B, 0xAE, 0x06, 0x81, 0xB4, 0x72,
|
||||
0xAE, 0x2D, 0xF5, 0x3C, 0xAE, 0x1B, 0x51, 0xAE, 0x21, 0x83, 0x03, 0xAE, 0x4E, 0xC5, 0x75, 0xAE,
|
||||
0x06, 0x81, 0x9B, 0x59, 0x2C, 0x2C, 0x2C, 0x2E, 0x2E, 0x2E, 0xAE, 0x1E, 0x81, 0x43, 0x1E, 0x1E,
|
||||
0x1E, 0x27, 0x27, 0x27, 0xAE, 0x06, 0x81, 0xA4, 0x1D, 0xAE, 0x48, 0xCA, 0x26, 0xAE, 0x1E, 0x1E,
|
||||
0x23, 0x23, 0x23, 0x3F, 0x3F, 0x3F, 0xA5, 0xA5, 0xA5, 0x63, 0x63, 0x63, 0x23, 0x23, 0x23, 0x29,
|
||||
0x29, 0x29, 0x6C, 0x6C, 0x6C, 0x83, 0x83, 0x83, 0x24, 0x24, 0x24, 0xAE, 0x06, 0x81, 0x9E, 0x0B,
|
||||
0x41, 0x41, 0x41, 0x93, 0x93, 0x93, 0xAA, 0xAA, 0xAA, 0x8A, 0x8A, 0x8A, 0xAE, 0x06, 0xE2, 0x50,
|
||||
0x9A, 0x9A, 0x9A, 0x46, 0x46, 0x46, 0xAE, 0x2A, 0x82, 0x20, 0x25, 0x25, 0x25, 0x48, 0x48, 0x48,
|
||||
0xBB, 0xBB, 0xBB, 0x31, 0x31, 0x31, 0xAE, 0x12, 0x7E, 0x3D, 0x3D, 0x3D, 0xA3, 0xA3, 0xA3, 0x2B,
|
||||
0x2B, 0x2B, 0xAE, 0x2A, 0x81, 0x34, 0xAE, 0x1B, 0x51, 0xAE, 0x1B, 0x83, 0x03, 0xAE, 0x06, 0xAE,
|
||||
0x7F, 0x2E, 0x2E, 0x2E, 0xAE, 0x30, 0xDB, 0x64, 0xAE, 0x1E, 0x57, 0x25, 0x25, 0x25, 0x4E, 0x4E,
|
||||
0x4E, 0x9A, 0x9A, 0x9A, 0x26, 0x26, 0x26, 0xAE, 0x1E, 0x85, 0x0E, 0x34, 0x34, 0x34, 0x87, 0x87,
|
||||
0x87, 0x60, 0x60, 0x60, 0xAE, 0x12, 0xD9, 0x0B, 0xAE, 0x09, 0x8A, 0x0D, 0x22, 0x22, 0x22, 0xAE,
|
||||
0x09, 0x8A, 0x22, 0xAE, 0x06, 0xE8, 0x44, 0xAE, 0x06, 0x81, 0xA8, 0x24, 0xAE, 0x0F, 0x81, 0xA3,
|
||||
0x3D, 0xAE, 0x1B, 0x1B, 0xAE, 0x06, 0xD2, 0x46, 0x23, 0x23, 0x23, 0x2B, 0x2B, 0x2B, 0x4A, 0x4A,
|
||||
0x4A, 0xA7, 0xA7, 0xA7, 0x67, 0x67, 0x67, 0xAE, 0x06, 0x81, 0xA8, 0x18, 0x56, 0x56, 0x56, 0x68,
|
||||
0x68, 0x68, 0xAE, 0x06, 0x5D, 0x32, 0x32, 0x32, 0x6A, 0x6A, 0x6A, 0xA6, 0xA6, 0xA6, 0x3F, 0x3F,
|
||||
0x3F, 0xAE, 0x06, 0xD0, 0x0E, 0x2E, 0x2E, 0x2E, 0x7B, 0x7B, 0x7B, 0x36, 0x36, 0x36, 0xAE, 0x0C,
|
||||
0xA6, 0x20, 0xAE, 0x0C, 0x8B, 0x2F, 0xAE, 0x0C, 0x88, 0x7D, 0xAE, 0x06, 0x81, 0x28, 0x2E, 0x2E,
|
||||
0x2E, 0x54, 0x54, 0x54, 0xBB, 0xBB, 0xBB, 0x36, 0x36, 0x36, 0xAE, 0x12, 0x83, 0x24, 0x43, 0x43,
|
||||
0x43, 0xA4, 0xA4, 0xA4, 0x33, 0x33, 0x33, 0xAE, 0x12, 0x45, 0xAE, 0x12, 0x60, 0xAE, 0x06, 0x81,
|
||||
0x43, 0x28, 0x28, 0x28, 0x51, 0x51, 0x51, 0xAE, 0x06, 0x51, 0xAE, 0x09, 0x8B, 0x50, 0xAE, 0x0C,
|
||||
0xD1, 0x27, 0xAE, 0x09, 0x81, 0x76, 0xAE, 0x09, 0x33, 0xAE, 0x06, 0x87, 0x67, 0x65, 0x65, 0x65,
|
||||
0x90, 0x90, 0x90, 0xAE, 0x0C, 0xDC, 0x4A, 0xAE, 0x15, 0x60, 0xAE, 0x2D, 0x83, 0x5A, 0x23, 0x23,
|
||||
0x23, 0xAE, 0x06, 0xDD, 0x03, 0x25, 0x25, 0x25, 0xAE, 0x09, 0x81, 0x0D, 0xAE, 0x06, 0x82, 0x5C,
|
||||
0xAE, 0x0C, 0x54, 0xAE, 0x06, 0x81, 0x86, 0x17, 0x8A, 0x8A, 0x8A, 0x63, 0x63, 0x63, 0xAE, 0x0F,
|
||||
0x84, 0x5B, 0xAE, 0x06, 0x45, 0x2D, 0x2D, 0x2D, 0x35, 0x35, 0x35, 0xAE, 0x06, 0x81, 0xAF, 0x40,
|
||||
0x3D, 0x3D, 0x3D, 0x34, 0x34, 0x34, 0x30, 0x30, 0x30, 0x38, 0x38, 0x38, 0x3F, 0x3F, 0x3F, 0x3D,
|
||||
0x3D, 0x3D, 0x2E, 0x2E, 0x2E, 0x21, 0x21, 0x21, 0xAE, 0x06, 0x81, 0x61, 0xAE, 0x06, 0x89, 0x69,
|
||||
0x3A, 0x3A, 0x3A, 0x40, 0x40, 0x40, 0xAE, 0x06, 0x81, 0xAB, 0x57, 0xAE, 0x09, 0xA9, 0x2F, 0xAE,
|
||||
0x06, 0xD7, 0x2D, 0x38, 0x38, 0x38, 0x3E, 0x3E, 0x3E, 0x42, 0x42, 0x42, 0x56, 0x56, 0x56, 0xAE,
|
||||
0x06, 0x83, 0x5A, 0x23, 0x23, 0x23, 0xAE, 0x06, 0x81, 0x8F, 0x08, 0xAE, 0x06, 0x81, 0xBA, 0x54,
|
||||
0x27, 0x27, 0x27, 0x43, 0x43, 0x43, 0x7C, 0x7C, 0x7C, 0x92, 0x92, 0x92, 0x41, 0x41, 0x41, 0xAE,
|
||||
0x06, 0xD7, 0x39, 0x2C, 0x2C, 0x2C, 0xAE, 0x06, 0x81, 0xB7, 0x60, 0xAE, 0x09, 0xE3, 0x0C, 0x32,
|
||||
0x32, 0x32, 0x3D, 0x3D, 0x3D, 0x3E, 0x3E, 0x3E, 0x34, 0x34, 0x34, 0xAE, 0x06, 0x8B, 0x26, 0xAE,
|
||||
0x06, 0x7E, 0x2D, 0x2D, 0x2D, 0x3B, 0x3B, 0x3B, 0x3E, 0x3E, 0x3E, 0x43, 0x43, 0x43, 0x5D, 0x5D,
|
||||
0x5D, 0xAE, 0x18, 0x83, 0x5A, 0x44, 0x44, 0x44, 0xA5, 0xA5, 0xA5, 0x42, 0x42, 0x42, 0x3D, 0x3D,
|
||||
0x3D, 0x3F, 0x3F, 0x3F, 0x37, 0x37, 0x37, 0x26, 0x26, 0x26, 0xAE, 0x06, 0x81, 0x28, 0xAE, 0x06,
|
||||
0x89, 0x42, 0x35, 0x35, 0x35, 0xAE, 0x06, 0x81, 0x5E, 0x31, 0x31, 0x31, 0xAE, 0x06, 0x81, 0x43,
|
||||
0xAE, 0x09, 0x83, 0x5A, 0xAE, 0x06, 0x81, 0xA1, 0x5C, 0x2D, 0x2D, 0x2D, 0x33, 0x33, 0x33, 0xAE,
|
||||
0x06, 0xFD, 0x7A, 0xAE, 0x0F, 0x81, 0x76, 0xAE, 0x06, 0x33, 0xAE, 0x06, 0x48, 0x45, 0x45, 0x45,
|
||||
0x7F, 0x7F, 0x7F, 0xA9, 0xA9, 0xA9, 0x44, 0x44, 0x44, 0xAE, 0x06, 0x81, 0x28, 0xAE, 0x18, 0x60,
|
||||
0xAE, 0x33, 0x8D, 0x4F, 0xAE, 0x06, 0x81, 0xAB, 0x30, 0xAE, 0x06, 0x0C, 0xAE, 0x06, 0x81, 0x95,
|
||||
0x0E, 0xAE, 0x06, 0x82, 0x14, 0x33, 0x33, 0x33, 0xAE, 0x06, 0x81, 0xBC, 0x5C, 0xAE, 0x1B, 0x83,
|
||||
0x5A, 0xAE, 0x06, 0xF0, 0x13, 0x61, 0x61, 0x61, 0x80, 0x80, 0x80, 0x77, 0x77, 0x77, 0x9E, 0x9E,
|
||||
0x9E, 0xA5, 0xA5, 0xA5, 0x80, 0x80, 0x80, 0x4E, 0x4E, 0x4E, 0x7D, 0x7D, 0x7D, 0xA5, 0xA5, 0xA5,
|
||||
0xA5, 0xA5, 0xA5, 0x73, 0x73, 0x73, 0x2F, 0x2F, 0x2F, 0xAE, 0x06, 0x8C, 0x4E, 0x2E, 0x2E, 0x2E,
|
||||
0x44, 0x44, 0x44, 0x7F, 0x7F, 0x7F, 0xAE, 0x06, 0x1B, 0x7C, 0x7C, 0x7C, 0x36, 0x36, 0x36, 0xAE,
|
||||
0x06, 0x81, 0x67, 0x29, 0x29, 0x29, 0x3F, 0x3F, 0x3F, 0x77, 0x77, 0x77, 0xA4, 0xA4, 0xA4, 0x9F,
|
||||
0x9F, 0x9F, 0x83, 0x83, 0x83, 0xA8, 0xA8, 0xA8, 0x68, 0x68, 0x68, 0x25, 0x25, 0x25, 0x29, 0x29,
|
||||
0x29, 0x5A, 0x5A, 0x5A, 0x74, 0x74, 0x74, 0x27, 0x27, 0x27, 0x2A, 0x2A, 0x2A, 0x7B, 0x7B, 0x7B,
|
||||
0xAD, 0xAD, 0xAD, 0xB1, 0xB1, 0xB1, 0xA3, 0xA3, 0xA3, 0x50, 0x50, 0x50, 0x25, 0x25, 0x25, 0x38,
|
||||
0x38, 0x38, 0x8E, 0x8E, 0x8E, 0x29, 0x29, 0x29, 0xAE, 0x06, 0x84, 0x6A, 0x37, 0x37, 0x37, 0x5D,
|
||||
0x5D, 0x5D, 0x98, 0x98, 0x98, 0xA4, 0xA4, 0xA4, 0x90, 0x90, 0x90, 0x46, 0x46, 0x46, 0x25, 0x25,
|
||||
0x25, 0x20, 0x20, 0x20, 0x2E, 0x2E, 0x2E, 0x45, 0x45, 0x45, 0x8C, 0x8C, 0x8C, 0xA4, 0xA4, 0xA4,
|
||||
0x99, 0x99, 0x99, 0x7B, 0x7B, 0x7B, 0xAE, 0x18, 0x83, 0x5A, 0x46, 0x46, 0x46, 0xA7, 0xA7, 0xA7,
|
||||
0x5C, 0x5C, 0x5C, 0x97, 0x97, 0x97, 0xA5, 0xA5, 0xA5, 0x98, 0x98, 0x98, 0x46, 0x46, 0x46, 0xAE,
|
||||
0x09, 0x83, 0x42, 0x3D, 0x3D, 0x3D, 0x6F, 0x6F, 0x6F, 0x9E, 0x9E, 0x9E, 0xA4, 0xA4, 0xA4, 0x82,
|
||||
0x82, 0x82, 0x35, 0x35, 0x35, 0xAE, 0x06, 0xEB, 0x11, 0xAE, 0x06, 0x83, 0x5A, 0x3D, 0x3D, 0x3D,
|
||||
0x32, 0x32, 0x32, 0x47, 0x47, 0x47, 0x8F, 0x8F, 0x8F, 0x71, 0x71, 0x71, 0x23, 0x23, 0x23, 0xAE,
|
||||
0x06, 0xE4, 0x19, 0x83, 0x83, 0x83, 0xA4, 0xA4, 0xA4, 0xAE, 0x09, 0x33, 0xAE, 0x06, 0x90, 0x1F,
|
||||
0x7C, 0x7C, 0x7C, 0xAD, 0xAD, 0xAD, 0xB6, 0xB6, 0xB6, 0xA4, 0xA4, 0xA4, 0x50, 0x50, 0x50, 0xAE,
|
||||
0x06, 0x81, 0xC1, 0x04, 0xAE, 0x15, 0x60, 0xAE, 0x30, 0x8D, 0x4F, 0xAE, 0x09, 0x82, 0x14, 0xAE,
|
||||
0x06, 0x85, 0x29, 0xA1, 0xA1, 0xA1, 0x6C, 0x6C, 0x6C, 0xAE, 0x06, 0x81, 0x4F, 0x8B, 0x8B, 0x8B,
|
||||
0x38, 0x38, 0x38, 0x23, 0x23, 0x23, 0xAE, 0x1E, 0x83, 0x5A, 0x31, 0x31, 0x31, 0x72, 0x72, 0x72,
|
||||
0xAC, 0xAC, 0xAC, 0x81, 0x81, 0x81, 0x38, 0x38, 0x38, 0x54, 0x54, 0x54, 0xA8, 0xA8, 0xA8, 0xA1,
|
||||
0xA1, 0xA1, 0x80, 0x80, 0x80, 0x3A, 0x3A, 0x3A, 0x54, 0x54, 0x54, 0xAB, 0xAB, 0xAB, 0x66, 0x66,
|
||||
0x66, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x40, 0x40, 0x40, 0x93, 0x93, 0x93, 0x96, 0x96, 0x96,
|
||||
0x45, 0x45, 0x45, 0x4D, 0x4D, 0x4D, 0x99, 0x99, 0x99, 0x90, 0x90, 0x90, 0xAE, 0x06, 0x8F, 0x69,
|
||||
0x3A, 0x3A, 0x3A, 0x79, 0x79, 0x79, 0xA4, 0xA4, 0xA4, 0x45, 0x45, 0x45, 0x3F, 0x3F, 0x3F, 0x8C,
|
||||
0x8C, 0x8C, 0xB6, 0xB6, 0xB6, 0xAE, 0x06, 0x83, 0x5A, 0x2E, 0x2E, 0x2E, 0x6A, 0x6A, 0x6A, 0x87,
|
||||
0x87, 0x87, 0xAE, 0x06, 0x8A, 0x7C, 0x3A, 0x3A, 0x3A, 0x72, 0x72, 0x72, 0x8C, 0x8C, 0x8C, 0x34,
|
||||
0x34, 0x34, 0x20, 0x20, 0x20, 0x25, 0x25, 0x25, 0x41, 0x41, 0x41, 0xA4, 0xA4, 0xA4, 0x2E, 0x2E,
|
||||
0x2E, 0xAE, 0x06, 0xFC, 0x4C, 0x56, 0x56, 0x56, 0xAB, 0xAB, 0xAB, 0x6A, 0x6A, 0x6A, 0x41, 0x41,
|
||||
0x41, 0x71, 0x71, 0x71, 0xA5, 0xA5, 0xA5, 0xAE, 0x06, 0x81, 0xBE, 0x67, 0xAE, 0x06, 0x7E, 0x8F,
|
||||
0x8F, 0x8F, 0x37, 0x37, 0x37, 0x4F, 0x4F, 0x4F, 0x99, 0x99, 0x99, 0xAE, 0x18, 0x83, 0x5A, 0x47,
|
||||
0x47, 0x47, 0xA7, 0xA7, 0xA7, 0x98, 0x98, 0x98, 0xAE, 0x06, 0x81, 0xBF, 0x71, 0x8E, 0x8E, 0x8E,
|
||||
0x98, 0x98, 0x98, 0x2C, 0x2C, 0x2C, 0xAE, 0x06, 0x81, 0x8B, 0x7C, 0x72, 0x72, 0x72, 0xA5, 0xA5,
|
||||
0xA5, 0x56, 0x56, 0x56, 0x43, 0x43, 0x43, 0x87, 0x87, 0x87, 0x90, 0x90, 0x90, 0x2D, 0x2D, 0x2D,
|
||||
0x29, 0x29, 0x29, 0xAE, 0x06, 0x83, 0x5A, 0x4E, 0x4E, 0x4E, 0x4C, 0x4C, 0x4C, 0x9A, 0x9A, 0x9A,
|
||||
0x95, 0x95, 0x95, 0x28, 0x28, 0x28, 0xAE, 0x06, 0x81, 0x90, 0x4E, 0x8E, 0x8E, 0x8E, 0x7F, 0x7F,
|
||||
0x7F, 0x3A, 0x3A, 0x3A, 0x42, 0x42, 0x42, 0x8D, 0x8D, 0x8D, 0x8F, 0x8F, 0x8F, 0x2B, 0x2B, 0x2B,
|
||||
0xAE, 0x06, 0x8F, 0x51, 0x7A, 0x7A, 0x7A, 0xA7, 0xA7, 0xA7, 0x3A, 0x3A, 0x3A, 0xAE, 0x06, 0x8D,
|
||||
0x52, 0xAE, 0x18, 0x60, 0xAE, 0x0F, 0x8D, 0x37, 0xAE, 0x06, 0x94, 0x59, 0xAE, 0x06, 0x81, 0x89,
|
||||
0x5F, 0xAE, 0x12, 0x91, 0x7D, 0xAE, 0x0C, 0x82, 0x14, 0xAE, 0x09, 0x84, 0x73, 0x91, 0x91, 0x91,
|
||||
0x43, 0x43, 0x43, 0x4D, 0x4D, 0x4D, 0x9A, 0x9A, 0x9A, 0x91, 0x91, 0x91, 0xAE, 0x06, 0x8A, 0x04,
|
||||
0xAE, 0x18, 0x83, 0x5A, 0xAE, 0x06, 0x82, 0x4A, 0xAE, 0x06, 0x82, 0x3E, 0x32, 0x32, 0x32, 0xAE,
|
||||
0x06, 0x86, 0x30, 0x79, 0x79, 0x79, 0x98, 0x98, 0x98, 0xAE, 0x06, 0x8A, 0x6A, 0x37, 0x37, 0x37,
|
||||
0x7D, 0x7D, 0x7D, 0x88, 0x88, 0x88, 0xAE, 0x06, 0x95, 0x3F, 0x5E, 0x5E, 0x5E, 0xA5, 0xA5, 0xA5,
|
||||
0xAE, 0x06, 0x83, 0x12, 0x29, 0x29, 0x29, 0x46, 0x46, 0x46, 0xA5, 0xA5, 0xA5, 0x50, 0x50, 0x50,
|
||||
0x2B, 0x2B, 0x2B, 0x45, 0x45, 0x45, 0xAB, 0xAB, 0xAB, 0x52, 0x52, 0x52, 0x22, 0x22, 0x22, 0x2A,
|
||||
0x2A, 0x2A, 0x4E, 0x4E, 0x4E, 0xAC, 0xAC, 0xAC, 0xAE, 0x06, 0x83, 0x5A, 0x2F, 0x2F, 0x2F, 0x6B,
|
||||
0x6B, 0x6B, 0xAE, 0x06, 0x83, 0x5A, 0xAE, 0x06, 0x81, 0xA8, 0x18, 0xAE, 0x09, 0x0F, 0xAE, 0x0C,
|
||||
0x8E, 0x17, 0xAE, 0x06, 0xF4, 0x3B, 0x3F, 0x3F, 0x3F, 0x96, 0x96, 0x96, 0x7B, 0x7B, 0x7B, 0x43,
|
||||
0x43, 0x43, 0x42, 0x42, 0x42, 0x55, 0x55, 0x55, 0x96, 0x96, 0x96, 0x71, 0x71, 0x71, 0x34, 0x34,
|
||||
0x34, 0x55, 0x55, 0x55, 0xB0, 0xB0, 0xB0, 0x35, 0x35, 0x35, 0x20, 0x20, 0x20, 0x2F, 0x2F, 0x2F,
|
||||
0x61, 0x61, 0x61, 0xAE, 0x18, 0x83, 0x5A, 0x45, 0x45, 0x45, 0xA6, 0xA6, 0xA6, 0x51, 0x51, 0x51,
|
||||
0x22, 0x22, 0x22, 0x2B, 0x2B, 0x2B, 0x50, 0x50, 0x50, 0xB0, 0xB0, 0xB0, 0xAE, 0x06, 0x81, 0xBF,
|
||||
0x74, 0x47, 0x47, 0x47, 0xAC, 0xAC, 0xAC, 0x5C, 0x5C, 0x5C, 0x3F, 0x3F, 0x3F, 0x45, 0x45, 0x45,
|
||||
0x5B, 0x5B, 0x5B, 0xAC, 0xAC, 0xAC, 0x43, 0x43, 0x43, 0x2B, 0x2B, 0x2B, 0xAE, 0x06, 0x8F, 0x39,
|
||||
0x68, 0x68, 0x68, 0x9C, 0x9C, 0x9C, 0x97, 0x97, 0x97, 0x2C, 0x2C, 0x2C, 0x1E, 0x1E, 0x1E, 0xAE,
|
||||
0x06, 0xF2, 0x33, 0x56, 0x56, 0x56, 0x38, 0x38, 0x38, 0xAE, 0x06, 0x81, 0xC6, 0x75, 0x58, 0x58,
|
||||
0x58, 0xA5, 0xA5, 0xA5, 0xAE, 0x06, 0x85, 0x08, 0x33, 0x33, 0x33, 0xAE, 0x06, 0x83, 0x48, 0x2F,
|
||||
0x2F, 0x2F, 0xAE, 0x09, 0x84, 0x55, 0xAE, 0x15, 0x60, 0xAE, 0x09, 0x83, 0x3F, 0xAE, 0x06, 0x81,
|
||||
0xB5, 0x5B, 0x30, 0x30, 0x30, 0x3E, 0x3E, 0x3E, 0x40, 0x40, 0x40, 0x36, 0x36, 0x36, 0xAE, 0x12,
|
||||
0x98, 0x15, 0xAE, 0x0C, 0x82, 0x14, 0x28, 0x28, 0x28, 0x52, 0x52, 0x52, 0xAE, 0x06, 0x88, 0x4D,
|
||||
0xAE, 0x06, 0x8C, 0x18, 0x4B, 0x4B, 0x4B, 0xB0, 0xB0, 0xB0, 0x43, 0x43, 0x43, 0xAE, 0x06, 0x81,
|
||||
0xB2, 0x67, 0xAE, 0x18, 0x83, 0x5A, 0x30, 0x30, 0x30, 0x6C, 0x6C, 0x6C, 0x88, 0x88, 0x88, 0xAE,
|
||||
0x06, 0x81, 0xB5, 0x6A, 0xAE, 0x09, 0x0F, 0xAE, 0x06, 0x83, 0x06, 0xAE, 0x09, 0x0F, 0xAE, 0x06,
|
||||
0x99, 0x46, 0x7F, 0x7F, 0x7F, 0x8A, 0x8A, 0x8A, 0xAE, 0x06, 0x81, 0xA8, 0x18, 0xAE, 0x06, 0x85,
|
||||
0x32, 0x8D, 0x8D, 0x8D, 0x78, 0x78, 0x78, 0x30, 0x30, 0x30, 0x48, 0x48, 0x48, 0xAE, 0x06, 0x82,
|
||||
0x3E, 0xAE, 0x06, 0x93, 0x5B, 0xAE, 0x06, 0x86, 0x36, 0x67, 0x67, 0x67, 0xAE, 0x2D, 0x83, 0x5A,
|
||||
0xAE, 0x06, 0x8A, 0x49, 0xA8, 0xA8, 0xA8, 0x8F, 0x8F, 0x8F, 0x8A, 0x8A, 0x8A, 0x8B, 0x8B, 0x8B,
|
||||
0x8E, 0x8E, 0x8E, 0xA5, 0xA5, 0xA5, 0x86, 0x86, 0x86, 0x37, 0x37, 0x37, 0x6E, 0x6E, 0x6E, 0xAE,
|
||||
0x06, 0x82, 0x71, 0xAE, 0x0F, 0x91, 0x71, 0xAE, 0x18, 0x92, 0x42, 0x31, 0x31, 0x31, 0x1C, 0x1C,
|
||||
0x1C, 0x28, 0x28, 0x28, 0x4F, 0x4F, 0x4F, 0xBB, 0xBB, 0xBB, 0x35, 0x35, 0x35, 0x25, 0x25, 0x25,
|
||||
0x4C, 0x4C, 0x4C, 0xB2, 0xB2, 0xB2, 0xAE, 0x09, 0x60, 0x8F, 0x8F, 0x8F, 0xB0, 0xB0, 0xB0, 0x60,
|
||||
0x60, 0x60, 0x2B, 0x2B, 0x2B, 0x56, 0x56, 0x56, 0xBB, 0xBB, 0xBB, 0xA0, 0xA0, 0xA0, 0xA8, 0xA8,
|
||||
0xA8, 0x3F, 0x3F, 0x3F, 0xAE, 0x06, 0x8A, 0x43, 0xAE, 0x06, 0x8D, 0x31, 0x3E, 0x3E, 0x3E, 0x5A,
|
||||
0x5A, 0x5A, 0x83, 0x83, 0x83, 0x8C, 0x8C, 0x8C, 0x91, 0x91, 0x91, 0xA6, 0xA6, 0xA6, 0xAE, 0x06,
|
||||
0x8D, 0x22, 0xAE, 0x12, 0x83, 0x5A, 0xAE, 0x18, 0x60, 0xAE, 0x0C, 0x81, 0xB9, 0x35, 0x23, 0x23,
|
||||
0x23, 0x56, 0x56, 0x56, 0xA3, 0xA3, 0xA3, 0xA4, 0xA4, 0xA4, 0xA1, 0xA1, 0xA1, 0x50, 0x50, 0x50,
|
||||
0xAE, 0x1E, 0x83, 0x5A, 0xAE, 0x0C, 0x81, 0x6A, 0x25, 0x25, 0x25, 0x42, 0x42, 0x42, 0x9F, 0x9F,
|
||||
0x9F, 0x64, 0x64, 0x64, 0x27, 0x27, 0x27, 0xAE, 0x1B, 0x83, 0x5A, 0xAE, 0x1B, 0x82, 0x77, 0xAE,
|
||||
0x0C, 0x0F, 0xAE, 0x06, 0x92, 0x66, 0x8C, 0x8C, 0x8C, 0x8A, 0x8A, 0x8A, 0x2B, 0x2B, 0x2B, 0xAE,
|
||||
0x06, 0x81, 0x1F, 0xAE, 0x06, 0x83, 0x5A, 0x87, 0x87, 0x87, 0xAE, 0x06, 0xF0, 0x0D, 0xAE, 0x06,
|
||||
0x87, 0x4F, 0xAE, 0x3F, 0x83, 0x5A, 0x45, 0x45, 0x45, 0xA7, 0xA7, 0xA7, 0x6F, 0x6F, 0x6F, 0x65,
|
||||
0x65, 0x65, 0x63, 0x63, 0x63, 0x64, 0x64, 0x64, 0x62, 0x62, 0x62, 0xAE, 0x06, 0x81, 0xC6, 0x66,
|
||||
0x6E, 0x6E, 0x6E, 0x8A, 0x8A, 0x8A, 0xAE, 0x06, 0x89, 0x5A, 0x29, 0x29, 0x29, 0xAE, 0x06, 0x85,
|
||||
0x4A, 0xAE, 0x1B, 0x83, 0x5A, 0xAE, 0x06, 0x82, 0x6E, 0xAE, 0x0C, 0x82, 0x1A, 0x25, 0x25, 0x25,
|
||||
0x4A, 0x4A, 0x4A, 0xAC, 0xAC, 0xAC, 0x6F, 0x6F, 0x6F, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x65,
|
||||
0x65, 0x65, 0x61, 0x61, 0x61, 0x36, 0x36, 0x36, 0x2A, 0x2A, 0x2A, 0x55, 0x55, 0x55, 0xBB, 0xBB,
|
||||
0xBB, 0x94, 0x94, 0x94, 0xA6, 0xA6, 0xA6, 0x73, 0x73, 0x73, 0xAE, 0x06, 0x81, 0x8C, 0x17, 0x23,
|
||||
0x23, 0x23, 0x3C, 0x3C, 0x3C, 0x80, 0x80, 0x80, 0xA4, 0xA4, 0xA4, 0x6F, 0x6F, 0x6F, 0x68, 0x68,
|
||||
0x68, 0x74, 0x74, 0x74, 0xAE, 0x06, 0x83, 0x4B, 0x1E, 0x1E, 0x1E, 0x32, 0x32, 0x32, 0xAE, 0x0F,
|
||||
0x83, 0x5A, 0xAE, 0x18, 0x60, 0xAE, 0x0F, 0xF6, 0x5E, 0x25, 0x25, 0x25, 0x2D, 0x2D, 0x2D, 0xAE,
|
||||
0x06, 0x8A, 0x6D, 0xAE, 0x12, 0x96, 0x40, 0xAE, 0x15, 0x83, 0x5A, 0x37, 0x37, 0x37, 0xAE, 0x06,
|
||||
0x82, 0x5C, 0x42, 0x42, 0x42, 0x93, 0x93, 0x93, 0xAE, 0x48, 0x83, 0x5A, 0x2B, 0x2B, 0x2B, 0x2D,
|
||||
0x2D, 0x2D, 0x6D, 0x6D, 0x6D, 0x92, 0x92, 0x92, 0xAE, 0x06, 0x9F, 0x4F, 0x2D, 0x2D, 0x2D, 0x46,
|
||||
0x46, 0x46, 0x92, 0x92, 0x92, 0x62, 0x62, 0x62, 0x2A, 0x2A, 0x2A, 0x45, 0x45, 0x45, 0xB6, 0xB6,
|
||||
0xB6, 0x3E, 0x3E, 0x3E, 0xAE, 0x06, 0xCE, 0x39, 0x4F, 0x4F, 0x4F, 0xA7, 0xA7, 0xA7, 0xAE, 0x33,
|
||||
0x8B, 0x0E, 0x3E, 0x3E, 0x3E, 0xA6, 0xA6, 0xA6, 0x5C, 0x5C, 0x5C, 0x31, 0x31, 0x31, 0xAE, 0x06,
|
||||
0x75, 0x2B, 0x2B, 0x2B, 0x24, 0x24, 0x24, 0x2B, 0x2B, 0x2B, 0x65, 0x65, 0x65, 0xA5, 0xA5, 0xA5,
|
||||
0xAE, 0x06, 0x81, 0xBB, 0x3D, 0x33, 0x33, 0x33, 0x59, 0x59, 0x59, 0xAE, 0x33, 0x83, 0x5A, 0x45,
|
||||
0x45, 0x45, 0xB0, 0xB0, 0xB0, 0x45, 0x45, 0x45, 0x2E, 0x2E, 0x2E, 0xAE, 0x06, 0x60, 0xAE, 0x06,
|
||||
0x81, 0x80, 0x68, 0xAE, 0x09, 0x89, 0x75, 0x4A, 0x4A, 0x4A, 0x4F, 0x4F, 0x4F, 0xAB, 0xAB, 0xAB,
|
||||
0x56, 0x56, 0x56, 0xAE, 0x06, 0xBD, 0x5B, 0xAE, 0x06, 0x33, 0x42, 0x42, 0x42, 0xAE, 0x06, 0x81,
|
||||
0xA6, 0x6A, 0x54, 0x54, 0x54, 0xA5, 0xA5, 0xA5, 0x30, 0x30, 0x30, 0x1E, 0x1E, 0x1E, 0x2F, 0x2F,
|
||||
0x2F, 0x71, 0x71, 0x71, 0xA6, 0xA6, 0xA6, 0x34, 0x34, 0x34, 0x1E, 0x1E, 0x1E, 0xAE, 0x1B, 0x60,
|
||||
0xAE, 0x2D, 0x92, 0x42, 0xAE, 0x15, 0x8B, 0x0E, 0x40, 0x40, 0x40, 0x25, 0x25, 0x25, 0x30, 0x30,
|
||||
0x30, 0x4D, 0x4D, 0x4D, 0xA5, 0xA5, 0xA5, 0x58, 0x58, 0x58, 0xAE, 0x1B, 0x8B, 0x0E, 0xAE, 0x06,
|
||||
0x81, 0xB6, 0x5C, 0x68, 0x68, 0x68, 0x86, 0x86, 0x86, 0xAE, 0x06, 0x81, 0xCF, 0x4B, 0xAE, 0x0F,
|
||||
0x0F, 0xAE, 0x09, 0x0F, 0xAE, 0x06, 0x81, 0xC6, 0x03, 0x3D, 0x3D, 0x3D, 0xAB, 0xAB, 0xAB, 0xAE,
|
||||
0x06, 0xFF, 0x70, 0x46, 0x46, 0x46, 0x61, 0x61, 0x61, 0xAA, 0xAA, 0xAA, 0xAE, 0x06, 0x90, 0x4C,
|
||||
0x38, 0x38, 0x38, 0x99, 0x99, 0x99, 0x7F, 0x7F, 0x7F, 0x42, 0x42, 0x42, 0x45, 0x45, 0x45, 0x65,
|
||||
0x65, 0x65, 0xB1, 0xB1, 0xB1, 0xAE, 0x06, 0x87, 0x34, 0xAE, 0x1B, 0x63, 0xAE, 0x06, 0x81, 0x46,
|
||||
0x3F, 0x3F, 0x3F, 0xA3, 0xA3, 0xA3, 0x2D, 0x2D, 0x2D, 0xAE, 0x06, 0x8F, 0x78, 0x7D, 0x7D, 0x7D,
|
||||
0x9F, 0x9F, 0x9F, 0x46, 0x46, 0x46, 0x3E, 0x3E, 0x3E, 0x3F, 0x3F, 0x3F, 0x58, 0x58, 0x58, 0xAE,
|
||||
0x06, 0x8A, 0x49, 0x3F, 0x3F, 0x3F, 0xB0, 0xB0, 0xB0, 0x5F, 0x5F, 0x5F, 0x3F, 0x3F, 0x3F, 0x48,
|
||||
0x48, 0x48, 0x76, 0x76, 0x76, 0xBB, 0xBB, 0xBB, 0x34, 0x34, 0x34, 0xAE, 0x12, 0x82, 0x17, 0xAE,
|
||||
0x09, 0x51, 0x1B, 0x1B, 0x1B, 0x27, 0x27, 0x27, 0x4C, 0x4C, 0x4C, 0xAE, 0x06, 0x2A, 0x21, 0x21,
|
||||
0x21, 0xAE, 0x06, 0x81, 0x28, 0x86, 0x86, 0x86, 0x42, 0x42, 0x42, 0x3E, 0x3E, 0x3E, 0x3E, 0x3E,
|
||||
0x3E, 0x5F, 0x5F, 0x5F, 0x22, 0x22, 0x22, 0xAE, 0x09, 0x27, 0xAE, 0x06, 0xF2, 0x48, 0x61, 0x61,
|
||||
0x61, 0xA4, 0xA4, 0xA4, 0x43, 0x43, 0x43, 0x2A, 0x2A, 0x2A, 0x40, 0x40, 0x40, 0xB0, 0xB0, 0xB0,
|
||||
0x4B, 0x4B, 0x4B, 0x3D, 0x3D, 0x3D, 0x48, 0x48, 0x48, 0x85, 0x85, 0x85, 0xAE, 0x06, 0x8B, 0x0E,
|
||||
0x1D, 0x1D, 0x1D, 0x29, 0x29, 0x29, 0x5C, 0x5C, 0x5C, 0xA6, 0xA6, 0xA6, 0x41, 0x41, 0x41, 0x27,
|
||||
0x27, 0x27, 0xAE, 0x09, 0x82, 0x08, 0xAE, 0x12, 0x60, 0xAE, 0x30, 0x83, 0x5A, 0xAE, 0x09, 0x81,
|
||||
0x43, 0x28, 0x28, 0x28, 0xAE, 0x06, 0x90, 0x01, 0x6E, 0x6E, 0x6E, 0xAE, 0x06, 0x81, 0x79, 0x6E,
|
||||
0x6E, 0x6E, 0xAF, 0xAF, 0xAF, 0xAE, 0x06, 0xC6, 0x22, 0x37, 0x37, 0x37, 0x88, 0x88, 0x88, 0x62,
|
||||
0x62, 0x62, 0xAE, 0x0F, 0x63, 0xAE, 0x06, 0x81, 0xBA, 0x1E, 0x60, 0x60, 0x60, 0x82, 0x82, 0x82,
|
||||
0xAE, 0x06, 0x98, 0x15, 0xAE, 0x0F, 0x0F, 0xAE, 0x0C, 0x0F, 0xAE, 0x06, 0x8C, 0x72, 0x5F, 0x5F,
|
||||
0x5F, 0xAA, 0xAA, 0xAA, 0x92, 0x92, 0x92, 0x91, 0x91, 0x91, 0xAA, 0xAA, 0xAA, 0x56, 0x56, 0x56,
|
||||
0xAE, 0x06, 0x81, 0xD8, 0x45, 0x27, 0x27, 0x27, 0x49, 0x49, 0x49, 0xAA, 0xAA, 0xAA, 0x91, 0x91,
|
||||
0x91, 0x8A, 0x8A, 0x8A, 0x9F, 0x9F, 0x9F, 0xAA, 0xAA, 0xAA, 0x5F, 0x5F, 0x5F, 0x21, 0x21, 0x21,
|
||||
0xAE, 0x1B, 0x54, 0xAE, 0x09, 0x81, 0xBE, 0x79, 0xA1, 0xA1, 0xA1, 0x26, 0x26, 0x26, 0xAE, 0x09,
|
||||
0x99, 0x76, 0x90, 0x90, 0x90, 0xA4, 0xA4, 0xA4, 0x8A, 0x8A, 0x8A, 0x96, 0x96, 0x96, 0x9A, 0x9A,
|
||||
0x9A, 0xAE, 0x06, 0x81, 0xC2, 0x62, 0x2C, 0x2C, 0x2C, 0x61, 0x61, 0x61, 0xAF, 0xAF, 0xAF, 0x8A,
|
||||
0x8A, 0x8A, 0x90, 0x90, 0x90, 0x93, 0x93, 0x93, 0xBB, 0xBB, 0xBB, 0xAE, 0x12, 0xA4, 0x69, 0xAE,
|
||||
0x0C, 0x51, 0xAE, 0x06, 0x90, 0x10, 0x3A, 0x3A, 0x3A, 0xAE, 0x06, 0x2A, 0xAE, 0x06, 0x81, 0x28,
|
||||
0x48, 0x48, 0x48, 0xA4, 0xA4, 0xA4, 0x98, 0x98, 0x98, 0x8A, 0x8A, 0x8A, 0xA3, 0xA3, 0xA3, 0x7A,
|
||||
0x7A, 0x7A, 0xAE, 0x06, 0xA0, 0x05, 0xAE, 0x09, 0x27, 0x20, 0x20, 0x20, 0x30, 0x30, 0x30, 0x75,
|
||||
0x75, 0x75, 0x91, 0x91, 0x91, 0x26, 0x26, 0x26, 0x30, 0x30, 0x30, 0x7A, 0x7A, 0x7A, 0xAE, 0x06,
|
||||
0x81, 0x10, 0x97, 0x97, 0x97, 0x85, 0x85, 0x85, 0xB5, 0xB5, 0xB5, 0xAE, 0x06, 0x88, 0x71, 0x23,
|
||||
0x23, 0x23, 0x3B, 0x3B, 0x3B, 0xAA, 0xAA, 0xAA, 0x8F, 0x8F, 0x8F, 0x5C, 0x5C, 0x5C, 0x21, 0x21,
|
||||
0x21, 0xAE, 0x18, 0x60, 0xAE, 0x2E, 0x81, 0xE5, 0x0D, 0xAE, 0x0B, 0x81, 0x43, 0xAE, 0x09, 0x83,
|
||||
0x5A, 0x9C, 0x9C, 0x9C, 0x90, 0x90, 0x90, 0x8C, 0x8C, 0x8C, 0xAF, 0xAF, 0xAF, 0xAE, 0x06, 0x82,
|
||||
0x77, 0x1F, 0x1F, 0x1F, 0x2C, 0x2C, 0x2C, 0x83, 0x83, 0x83, 0x5C, 0x5C, 0x5C, 0xAE, 0x0F, 0xF6,
|
||||
0x7C, 0xAE, 0x09, 0xAF, 0x1D, 0xAE, 0x06, 0xD5, 0x2E, 0xAE, 0x0F, 0x0F, 0xAE, 0x0F, 0x0F, 0xAE,
|
||||
0x06, 0x8B, 0x3E, 0xAE, 0x06, 0x81, 0x8A, 0x09, 0x63, 0x63, 0x63, 0xAE, 0x06, 0x90, 0x76, 0xAE,
|
||||
0x06, 0xA1, 0x45, 0xAE, 0x09, 0xA0, 0x62, 0x31, 0x31, 0x31, 0x62, 0x62, 0x62, 0x56, 0x56, 0x56,
|
||||
0xAE, 0x0C, 0xD6, 0x05, 0xAE, 0x1E, 0x54, 0xAE, 0x06, 0x9E, 0x72, 0xAE, 0x06, 0xF4, 0x44, 0xAE,
|
||||
0x09, 0x81, 0x8F, 0x17, 0x2B, 0x2B, 0x2B, 0x40, 0x40, 0x40, 0x61, 0x61, 0x61, 0x4A, 0x4A, 0x4A,
|
||||
0xAE, 0x06, 0x87, 0x6A, 0xAE, 0x06, 0x9F, 0x40, 0xAE, 0x06, 0x99, 0x7C, 0x60, 0x60, 0x60, 0x4A,
|
||||
0x4A, 0x4A, 0xAE, 0x09, 0x8D, 0x25, 0xAE, 0x12, 0xA6, 0x56, 0xAE, 0x0F, 0x51, 0xAE, 0x06, 0xCB,
|
||||
0x6F, 0xAE, 0x06, 0x2A, 0xAE, 0x06, 0x81, 0x28, 0x2E, 0x2E, 0x2E, 0x4D, 0x4D, 0x4D, 0x60, 0x60,
|
||||
0x60, 0xAE, 0x06, 0x81, 0xB7, 0x69, 0xAE, 0x06, 0xD7, 0x2A, 0xAE, 0x09, 0x27, 0xAE, 0x06, 0xA2,
|
||||
0x16, 0xAE, 0x06, 0x81, 0xCE, 0x59, 0xAE, 0x06, 0xF2, 0x6C, 0x2B, 0x2B, 0x2B, 0x4C, 0x4C, 0x4C,
|
||||
0x60, 0x60, 0x60, 0x3D, 0x3D, 0x3D, 0x2B, 0x2B, 0x2B, 0xAE, 0x09, 0x78, 0xAE, 0x06, 0x85, 0x29,
|
||||
0xAE, 0x06, 0x87, 0x19, 0x42, 0x42, 0x42, 0xAE, 0x06, 0xD4, 0x18, 0xAE, 0x15, 0x60, 0xAE, 0x30,
|
||||
0xB0, 0x12, 0xAE, 0x09, 0x81, 0x43, 0xAE, 0x09, 0x8B, 0x0E, 0x48, 0x48, 0x48, 0x57, 0x57, 0x57,
|
||||
0x61, 0x61, 0x61, 0x3B, 0x3B, 0x3B, 0xAE, 0x06, 0x81, 0x85, 0x4C, 0xAE, 0x06, 0x81, 0x28, 0xAE,
|
||||
0x36, 0xA5, 0x6A, 0xAE, 0x1B, 0xE0, 0x5D, 0xAE, 0x12, 0x81, 0xCC, 0x33, 0xAE, 0x09, 0x1B, 0xAE,
|
||||
0x42, 0xB0, 0x7B, 0xAE, 0x18, 0x4B, 0xAE, 0x48, 0x63, 0xAE, 0x30, 0xAF, 0x4A, 0xAE, 0x1B, 0x30,
|
||||
0xAE, 0x15, 0x81, 0x13, 0xAE, 0x4B, 0xB0, 0x2A, 0xAE, 0x09, 0x8C, 0x27, 0xAE, 0x06, 0x81, 0x99,
|
||||
0x03, 0xAE, 0x81, 0x07, 0xB5, 0x0E, 0xAE, 0x82, 0x44, 0xBA, 0x13, 0xAE, 0x0C, 0x8C, 0x27, 0xAE,
|
||||
0x83, 0x4E, 0xBD, 0x6D, 0xAE, 0x0F, 0x8C, 0x4E, 0xAE, 0x83, 0x78, 0xC1, 0x74
|
||||
} ;
|
||||
46
ipl/di.c
46
ipl/di.c
@@ -87,31 +87,31 @@ void display_init()
|
||||
|
||||
sleep(60000);
|
||||
|
||||
DSI(_DSIREG(DSI_BTA_TIMING)) = 0x50204;
|
||||
DSI(_DSIREG(DSI_WR_DATA)) = 0x337;
|
||||
DSI(_DSIREG(DSI_TRIGGER)) = DSI_TRIGGER_HOST;
|
||||
_display_dsi_wait(250000, _DSIREG(DSI_TRIGGER), DSI_TRIGGER_HOST | DSI_TRIGGER_VIDEO);
|
||||
DSI(_DSIREG(DSI_DSI_BTA_TIMING)) = 0x50204;
|
||||
DSI(_DSIREG(DSI_DSI_WR_DATA)) = 0x337;
|
||||
DSI(_DSIREG(DSI_DSI_TRIGGER)) = 0x2;
|
||||
_display_dsi_wait(250000, _DSIREG(DSI_DSI_TRIGGER), 3);
|
||||
|
||||
DSI(_DSIREG(DSI_WR_DATA)) = 0x406;
|
||||
DSI(_DSIREG(DSI_TRIGGER)) = DSI_TRIGGER_HOST;
|
||||
_display_dsi_wait(250000, _DSIREG(DSI_TRIGGER), DSI_TRIGGER_HOST | DSI_TRIGGER_VIDEO);
|
||||
DSI(_DSIREG(DSI_DSI_WR_DATA)) = 0x406;
|
||||
DSI(_DSIREG(DSI_DSI_TRIGGER)) = 0x2;
|
||||
_display_dsi_wait(250000, _DSIREG(DSI_DSI_TRIGGER), 3);
|
||||
|
||||
DSI(_DSIREG(DSI_HOST_CONTROL)) = DSI_HOST_CONTROL_TX_TRIG_HOST | DSI_HOST_CONTROL_IMM_BTA | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC;
|
||||
_display_dsi_wait(150000, _DSIREG(DSI_HOST_CONTROL), DSI_HOST_CONTROL_IMM_BTA);
|
||||
DSI(_DSIREG(DSI_HOST_DSI_CONTROL)) = 0x200B;
|
||||
_display_dsi_wait(150000, _DSIREG(DSI_HOST_DSI_CONTROL), 8);
|
||||
|
||||
sleep(5000);
|
||||
|
||||
_display_ver = DSI(_DSIREG(DSI_RD_DATA));
|
||||
_display_ver = DSI(_DSIREG(DSI_DSI_RD_DATA));
|
||||
if (_display_ver == 0x10)
|
||||
exec_cfg((u32 *)DSI_BASE, _display_config_4, 43);
|
||||
|
||||
DSI(_DSIREG(DSI_WR_DATA)) = 0x1105;
|
||||
DSI(_DSIREG(DSI_TRIGGER)) = DSI_TRIGGER_HOST;
|
||||
DSI(_DSIREG(DSI_DSI_WR_DATA)) = 0x1105;
|
||||
DSI(_DSIREG(DSI_DSI_TRIGGER)) = 0x2;
|
||||
|
||||
sleep(180000);
|
||||
|
||||
DSI(_DSIREG(DSI_WR_DATA)) = 0x2905;
|
||||
DSI(_DSIREG(DSI_TRIGGER)) = DSI_TRIGGER_HOST;
|
||||
DSI(_DSIREG(DSI_DSI_WR_DATA)) = 0x2905;
|
||||
DSI(_DSIREG(DSI_DSI_TRIGGER)) = 0x2;
|
||||
|
||||
sleep(20000);
|
||||
|
||||
@@ -134,15 +134,15 @@ void display_init()
|
||||
void display_end()
|
||||
{
|
||||
GPIO_6(0x24) &= 0xFFFFFFFE;
|
||||
DSI(_DSIREG(DSI_VIDEO_MODE_CONTROL)) = 1;
|
||||
DSI(_DSIREG(DSI_WR_DATA)) = 0x2805;
|
||||
DSI(_DSIREG(DSI_DSI_VID_MODE_CONTROL)) = 1;
|
||||
DSI(_DSIREG(DSI_DSI_WR_DATA)) = 0x2805;
|
||||
|
||||
u32 end = HOST1X(0x30A4) + 5;
|
||||
while (HOST1X(0x30A4) < end)
|
||||
;
|
||||
|
||||
DISPLAY_A(_DIREG(DC_CMD_STATE_ACCESS)) = READ_MUX | WRITE_MUX;
|
||||
DSI(_DSIREG(DSI_VIDEO_MODE_CONTROL)) = 0;
|
||||
DISPLAY_A(_DIREG(DC_CMD_STATE_ACCESS)) = 5;
|
||||
DSI(_DSIREG(DSI_DSI_VID_MODE_CONTROL)) = 0;
|
||||
|
||||
exec_cfg((u32 *)DISPLAY_A_BASE, _display_config_12, 17);
|
||||
exec_cfg((u32 *)DSI_BASE, _display_config_13, 16);
|
||||
@@ -152,8 +152,8 @@ void display_end()
|
||||
if (_display_ver == 0x10)
|
||||
exec_cfg((u32 *)DSI_BASE, _display_config_14, 22);
|
||||
|
||||
DSI(_DSIREG(DSI_WR_DATA)) = 0x1005;
|
||||
DSI(_DSIREG(DSI_TRIGGER)) = DSI_TRIGGER_HOST;
|
||||
DSI(_DSIREG(DSI_DSI_WR_DATA)) = 0x1005;
|
||||
DSI(_DSIREG(DSI_DSI_TRIGGER)) = 2;
|
||||
|
||||
sleep(50000);
|
||||
|
||||
@@ -175,8 +175,8 @@ void display_end()
|
||||
CLOCK(0x300) = 0x18000000;
|
||||
CLOCK(0x324) = 0x18000000;
|
||||
|
||||
DSI(_DSIREG(DSI_PAD_CONTROL_0)) = DSI_PAD_CONTROL_VS1_PULLDN_CLK | DSI_PAD_CONTROL_VS1_PULLDN(0xF) | DSI_PAD_CONTROL_VS1_PDIO_CLK | DSI_PAD_CONTROL_VS1_PDIO(0xF);
|
||||
DSI(_DSIREG(DSI_POWER_CONTROL)) = 0;
|
||||
DSI(_DSIREG(DSI_PAD_CONTROL)) = 0x10F010F;
|
||||
DSI(_DSIREG(DSI_DSI_POWER_CONTROL)) = 0;
|
||||
|
||||
GPIO_6(0x04) &= 0xFFFFFFFE;
|
||||
|
||||
@@ -193,7 +193,7 @@ void display_color_screen(u32 color)
|
||||
DISPLAY_A(_DIREG(DC_WIN_BD_WIN_OPTIONS)) = 0;
|
||||
DISPLAY_A(_DIREG(DC_WIN_CD_WIN_OPTIONS)) = 0;
|
||||
DISPLAY_A(_DIREG(DC_DISP_BLEND_BACKGROUND_COLOR)) = color;
|
||||
DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) & 0xFFFFFFFE | GENERAL_ACT_REQ;
|
||||
DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) & 0xFFFFFFFE | 1;
|
||||
|
||||
sleep(35000);
|
||||
|
||||
|
||||
317
ipl/di.h
317
ipl/di.h
@@ -21,319 +21,44 @@
|
||||
|
||||
/*! Display registers. */
|
||||
#define _DIREG(reg) ((reg) * 4)
|
||||
|
||||
#define DC_CMD_GENERAL_INCR_SYNCPT 0x00
|
||||
|
||||
#define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x01
|
||||
#define SYNCPT_CNTRL_NO_STALL (1 << 8)
|
||||
#define SYNCPT_CNTRL_SOFT_RESET (1 << 0)
|
||||
|
||||
#define DC_CMD_CONT_SYNCPT_VSYNC 0x28
|
||||
#define SYNCPT_VSYNC_ENABLE (1 << 8)
|
||||
|
||||
#define DC_CMD_DISPLAY_COMMAND_OPTION0 0x031
|
||||
|
||||
#define DC_CMD_DISPLAY_COMMAND 0x32
|
||||
#define DISP_CTRL_MODE_STOP (0 << 5)
|
||||
#define DISP_CTRL_MODE_C_DISPLAY (1 << 5)
|
||||
#define DISP_CTRL_MODE_NC_DISPLAY (2 << 5)
|
||||
#define DISP_CTRL_MODE_MASK (3 << 5)
|
||||
|
||||
#define DC_CMD_DISPLAY_POWER_CONTROL 0x36
|
||||
#define PW0_ENABLE (1 << 0)
|
||||
#define PW1_ENABLE (1 << 2)
|
||||
#define PW2_ENABLE (1 << 4)
|
||||
#define PW3_ENABLE (1 << 6)
|
||||
#define PW4_ENABLE (1 << 8)
|
||||
#define PM0_ENABLE (1 << 16)
|
||||
#define PM1_ENABLE (1 << 18)
|
||||
|
||||
#define DC_CMD_INT_MASK 0x38
|
||||
#define DC_CMD_INT_ENABLE 0x39
|
||||
|
||||
#define DC_CMD_STATE_ACCESS 0x40
|
||||
#define READ_MUX (1 << 0)
|
||||
#define WRITE_MUX (1 << 2)
|
||||
|
||||
#define DC_CMD_STATE_CONTROL 0x41
|
||||
#define GENERAL_ACT_REQ (1 << 0)
|
||||
#define WIN_A_ACT_REQ (1 << 1)
|
||||
#define WIN_B_ACT_REQ (1 << 2)
|
||||
#define WIN_C_ACT_REQ (1 << 3)
|
||||
#define CURSOR_ACT_REQ (1 << 7)
|
||||
#define GENERAL_UPDATE (1 << 8)
|
||||
#define WIN_A_UPDATE (1 << 9)
|
||||
#define WIN_B_UPDATE (1 << 10)
|
||||
#define WIN_C_UPDATE (1 << 11)
|
||||
#define CURSOR_UPDATE (1 << 15)
|
||||
#define NC_HOST_TRIG (1 << 24)
|
||||
|
||||
#define DC_CMD_DISPLAY_WINDOW_HEADER 0x42
|
||||
#define WINDOW_A_SELECT (1 << 4)
|
||||
#define WINDOW_B_SELECT (1 << 5)
|
||||
#define WINDOW_C_SELECT (1 << 6)
|
||||
|
||||
#define DC_CMD_REG_ACT_CONTROL 0x043
|
||||
|
||||
#define DC_COM_CRC_CONTROL 0x300
|
||||
#define DC_COM_PIN_OUTPUT_ENABLE(x) (0x302 + (x))
|
||||
#define DC_COM_PIN_OUTPUT_POLARITY(x) (0x306 + (x))
|
||||
|
||||
#define DC_DISP_DISP_WIN_OPTIONS 0x402
|
||||
#define HDMI_ENABLE (1 << 30)
|
||||
#define DSI_ENABLE (1 << 29)
|
||||
#define SOR1_TIMING_CYA (1 << 27)
|
||||
#define SOR1_ENABLE (1 << 26)
|
||||
#define SOR_ENABLE (1 << 25)
|
||||
#define CURSOR_ENABLE (1 << 16)
|
||||
|
||||
#define DC_DISP_DISP_MEM_HIGH_PRIORITY 0x403
|
||||
#define DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER 0x404
|
||||
#define DC_DISP_DISP_TIMING_OPTIONS 0x405
|
||||
#define DC_DISP_REF_TO_SYNC 0x406
|
||||
#define DC_DISP_SYNC_WIDTH 0x407
|
||||
#define DC_DISP_BACK_PORCH 0x408
|
||||
#define DC_DISP_ACTIVE 0x409
|
||||
#define DC_DISP_FRONT_PORCH 0x40A
|
||||
|
||||
#define DC_DISP_DISP_CLOCK_CONTROL 0x42E
|
||||
#define PIXEL_CLK_DIVIDER_PCD1 (0 << 8)
|
||||
#define PIXEL_CLK_DIVIDER_PCD1H (1 << 8)
|
||||
#define PIXEL_CLK_DIVIDER_PCD2 (2 << 8)
|
||||
#define PIXEL_CLK_DIVIDER_PCD3 (3 << 8)
|
||||
#define PIXEL_CLK_DIVIDER_PCD4 (4 << 8)
|
||||
#define PIXEL_CLK_DIVIDER_PCD6 (5 << 8)
|
||||
#define PIXEL_CLK_DIVIDER_PCD8 (6 << 8)
|
||||
#define PIXEL_CLK_DIVIDER_PCD9 (7 << 8)
|
||||
#define PIXEL_CLK_DIVIDER_PCD12 (8 << 8)
|
||||
#define PIXEL_CLK_DIVIDER_PCD16 (9 << 8)
|
||||
#define PIXEL_CLK_DIVIDER_PCD18 (10 << 8)
|
||||
#define PIXEL_CLK_DIVIDER_PCD24 (11 << 8)
|
||||
#define PIXEL_CLK_DIVIDER_PCD13 (12 << 8)
|
||||
#define SHIFT_CLK_DIVIDER(x) ((x) & 0xff)
|
||||
|
||||
#define DC_DISP_DISP_INTERFACE_CONTROL 0x42F
|
||||
#define DISP_DATA_FORMAT_DF1P1C (0 << 0)
|
||||
#define DISP_DATA_FORMAT_DF1P2C24B (1 << 0)
|
||||
#define DISP_DATA_FORMAT_DF1P2C18B (2 << 0)
|
||||
#define DISP_DATA_FORMAT_DF1P2C16B (3 << 0)
|
||||
#define DISP_DATA_FORMAT_DF2S (4 << 0)
|
||||
#define DISP_DATA_FORMAT_DF3S (5 << 0)
|
||||
#define DISP_DATA_FORMAT_DFSPI (6 << 0)
|
||||
#define DISP_DATA_FORMAT_DF1P3C24B (7 << 0)
|
||||
#define DISP_DATA_FORMAT_DF1P3C18B (8 << 0)
|
||||
#define DISP_ALIGNMENT_MSB (0 << 8)
|
||||
#define DISP_ALIGNMENT_LSB (1 << 8)
|
||||
#define DISP_ORDER_RED_BLUE (0 << 9)
|
||||
#define DISP_ORDER_BLUE_RED (1 << 9)
|
||||
|
||||
#define DC_DISP_DISP_COLOR_CONTROL 0x430
|
||||
#define DITHER_CONTROL_MASK (3 << 8)
|
||||
#define DITHER_CONTROL_DISABLE (0 << 8)
|
||||
#define DITHER_CONTROL_ORDERED (2 << 8)
|
||||
#define DITHER_CONTROL_ERRDIFF (3 << 8)
|
||||
#define BASE_COLOR_SIZE_MASK (0xf << 0)
|
||||
#define BASE_COLOR_SIZE_666 (0 << 0)
|
||||
#define BASE_COLOR_SIZE_111 (1 << 0)
|
||||
#define BASE_COLOR_SIZE_222 (2 << 0)
|
||||
#define BASE_COLOR_SIZE_333 (3 << 0)
|
||||
#define BASE_COLOR_SIZE_444 (4 << 0)
|
||||
#define BASE_COLOR_SIZE_555 (5 << 0)
|
||||
#define BASE_COLOR_SIZE_565 (6 << 0)
|
||||
#define BASE_COLOR_SIZE_332 (7 << 0)
|
||||
#define BASE_COLOR_SIZE_888 (8 << 0)
|
||||
|
||||
#define DC_DISP_SHIFT_CLOCK_OPTIONS 0x431
|
||||
#define SC1_H_QUALIFIER_NONE (1 << 16)
|
||||
#define SC0_H_QUALIFIER_NONE (1 << 0)
|
||||
|
||||
#define DC_DISP_DATA_ENABLE_OPTIONS 0x432
|
||||
#define DE_SELECT_ACTIVE_BLANK (0 << 0)
|
||||
#define DE_SELECT_ACTIVE (1 << 0)
|
||||
#define DE_SELECT_ACTIVE_IS (2 << 0)
|
||||
#define DE_CONTROL_ONECLK (0 << 2)
|
||||
#define DE_CONTROL_NORMAL (1 << 2)
|
||||
#define DE_CONTROL_EARLY_EXT (2 << 2)
|
||||
#define DE_CONTROL_EARLY (3 << 2)
|
||||
#define DE_CONTROL_ACTIVE_BLANK (4 << 2)
|
||||
|
||||
#define DC_DISP_DC_MCCIF_FIFOCTRL 0x480
|
||||
#define DC_DISP_BLEND_BACKGROUND_COLOR 0x4E4
|
||||
|
||||
#define DC_WIN_CSC_YOF 0x611
|
||||
#define DC_WIN_CSC_KYRGB 0x612
|
||||
#define DC_WIN_CSC_KUR 0x613
|
||||
#define DC_WIN_CSC_KVR 0x614
|
||||
#define DC_WIN_CSC_KUG 0x615
|
||||
#define DC_WIN_CSC_KVG 0x616
|
||||
#define DC_WIN_CSC_KUB 0x617
|
||||
#define DC_WIN_CSC_KVB 0x618
|
||||
#define DC_WIN_AD_WIN_OPTIONS 0xB80
|
||||
#define DC_WIN_BD_WIN_OPTIONS 0xD80
|
||||
#define DC_WIN_CD_WIN_OPTIONS 0xF80
|
||||
|
||||
//The following registers are A/B/C shadows of the 0xB80/0xD80/0xF80 registers (see DISPLAY_WINDOW_HEADER).
|
||||
#define DC_WIN_WIN_OPTIONS 0x700
|
||||
#define H_DIRECTION (1 << 0)
|
||||
#define V_DIRECTION (1 << 2)
|
||||
#define COLOR_EXPAND (1 << 6)
|
||||
#define CSC_ENABLE (1 << 18)
|
||||
#define WIN_ENABLE (1 << 30)
|
||||
|
||||
#define DC_WIN_COLOR_DEPTH 0x703
|
||||
#define WIN_COLOR_DEPTH_P1 0x0
|
||||
#define WIN_COLOR_DEPTH_P2 0x1
|
||||
#define WIN_COLOR_DEPTH_P4 0x2
|
||||
#define WIN_COLOR_DEPTH_P8 0x3
|
||||
#define WIN_COLOR_DEPTH_B4G4R4A4 0x4
|
||||
#define WIN_COLOR_DEPTH_B5G5R5A 0x5
|
||||
#define WIN_COLOR_DEPTH_B5G6R5 0x6
|
||||
#define WIN_COLOR_DEPTH_AB5G5R5 0x7
|
||||
#define WIN_COLOR_DEPTH_B8G8R8A8 0xC
|
||||
#define WIN_COLOR_DEPTH_R8G8B8A8 0xD
|
||||
#define WIN_COLOR_DEPTH_B6x2G6x2R6x2A8 0xE
|
||||
#define WIN_COLOR_DEPTH_R6x2G6x2B6x2A8 0xF
|
||||
#define WIN_COLOR_DEPTH_YCbCr422 0x10
|
||||
#define WIN_COLOR_DEPTH_YUV422 0x11
|
||||
#define WIN_COLOR_DEPTH_YCbCr420P 0x12
|
||||
#define WIN_COLOR_DEPTH_YUV420P 0x13
|
||||
#define WIN_COLOR_DEPTH_YCbCr422P 0x14
|
||||
#define WIN_COLOR_DEPTH_YUV422P 0x15
|
||||
#define WIN_COLOR_DEPTH_YCbCr422R 0x16
|
||||
#define WIN_COLOR_DEPTH_YUV422R 0x17
|
||||
#define WIN_COLOR_DEPTH_YCbCr422RA 0x18
|
||||
#define WIN_COLOR_DEPTH_YUV422RA 0x19
|
||||
|
||||
#define DC_WIN_BUFFER_CONTROL 0x702
|
||||
#define DC_WIN_POSITION 0x704
|
||||
|
||||
#define DC_WIN_SIZE 0x705
|
||||
#define H_SIZE(x) (((x) & 0x1fff) << 0)
|
||||
#define V_SIZE(x) (((x) & 0x1fff) << 16)
|
||||
|
||||
#define DC_WIN_PRESCALED_SIZE 0x706
|
||||
#define H_PRESCALED_SIZE(x) (((x) & 0x7fff) << 0)
|
||||
#define V_PRESCALED_SIZE(x) (((x) & 0x1fff) << 16)
|
||||
|
||||
#define DC_WIN_H_INITIAL_DDA 0x707
|
||||
#define DC_WIN_V_INITIAL_DDA 0x708
|
||||
|
||||
#define DC_WIN_DDA_INC 0x709
|
||||
#define H_DDA_INC(x) (((x) & 0xffff) << 0)
|
||||
#define V_DDA_INC(x) (((x) & 0xffff) << 16)
|
||||
|
||||
#define DC_WIN_LINE_STRIDE 0x70A
|
||||
#define DC_WIN_DV_CONTROL 0x70E
|
||||
#define DC_X_WIN_XD_WIN_OPTIONS 0x700
|
||||
#define DC_X_WIN_XD_COLOR_DEPTH 0x703
|
||||
#define DC_X_WIN_XD_POSITION 0x704
|
||||
#define DC_X_WIN_XD_SIZE 0x705
|
||||
#define DC_X_WIN_XD_PRESCALED_SIZE 0x706
|
||||
#define DC_X_WIN_XD_H_INITIAL_DDA 0x707
|
||||
#define DC_X_WIN_XD_V_INITIAL_DDA 0x708
|
||||
#define DC_X_WIN_XD_DDA_INCREMENT 0x709
|
||||
#define DC_X_WIN_XD_LINE_STRIDE 0x70A
|
||||
|
||||
//The following registers are A/B/C shadows of the 0xBC0/0xDC0/0xFC0 registers (see DISPLAY_WINDOW_HEADER).
|
||||
#define DC_WINBUF_START_ADDR 0x800
|
||||
#define DC_WINBUF_ADDR_H_OFFSET 0x806
|
||||
#define DC_WINBUF_ADDR_V_OFFSET 0x808
|
||||
#define DC_WINBUF_SURFACE_KIND 0x80B
|
||||
#define DC_X_WINBUF_XD_START_ADDR 0x800
|
||||
#define DC_X_WINBUF_XD_ADDR_H_OFFSET 0x806
|
||||
#define DC_X_WINBUF_XD_ADDR_V_OFFSET 0x808
|
||||
#define DC_X_WINBUF_XD_SURFACE_KIND 0x80B
|
||||
|
||||
/*! Display serial interface registers. */
|
||||
#define _DSIREG(reg) ((reg) * 4)
|
||||
|
||||
#define DSI_RD_DATA 0x9
|
||||
#define DSI_WR_DATA 0xA
|
||||
|
||||
#define DSI_POWER_CONTROL 0xB
|
||||
#define DSI_POWER_CONTROL_ENABLE 1
|
||||
|
||||
#define DSI_INT_ENABLE 0xC
|
||||
#define DSI_INT_STATUS 0xD
|
||||
#define DSI_INT_MASK 0xE
|
||||
|
||||
#define DSI_HOST_CONTROL 0xF
|
||||
#define DSI_HOST_CONTROL_FIFO_RESET (1 << 21)
|
||||
#define DSI_HOST_CONTROL_CRC_RESET (1 << 20)
|
||||
#define DSI_HOST_CONTROL_TX_TRIG_SOL (0 << 12)
|
||||
#define DSI_HOST_CONTROL_TX_TRIG_FIFO (1 << 12)
|
||||
#define DSI_HOST_CONTROL_TX_TRIG_HOST (2 << 12)
|
||||
#define DSI_HOST_CONTROL_RAW (1 << 6)
|
||||
#define DSI_HOST_CONTROL_HS (1 << 5)
|
||||
#define DSI_HOST_CONTROL_FIFO_SEL (1 << 4)
|
||||
#define DSI_HOST_CONTROL_IMM_BTA (1 << 3)
|
||||
#define DSI_HOST_CONTROL_PKT_BTA (1 << 2)
|
||||
#define DSI_HOST_CONTROL_CS (1 << 1)
|
||||
#define DSI_HOST_CONTROL_ECC (1 << 0)
|
||||
|
||||
#define DSI_CONTROL 0x10
|
||||
#define DSI_CONTROL_HS_CLK_CTRL (1 << 20)
|
||||
#define DSI_CONTROL_CHANNEL(c) (((c) & 0x3) << 16)
|
||||
#define DSI_CONTROL_FORMAT(f) (((f) & 0x3) << 12)
|
||||
#define DSI_CONTROL_TX_TRIG(x) (((x) & 0x3) << 8)
|
||||
#define DSI_CONTROL_LANES(n) (((n) & 0x3) << 4)
|
||||
#define DSI_CONTROL_DCS_ENABLE (1 << 3)
|
||||
#define DSI_CONTROL_SOURCE(s) (((s) & 0x1) << 2)
|
||||
#define DSI_CONTROL_VIDEO_ENABLE (1 << 1)
|
||||
#define DSI_CONTROL_HOST_ENABLE (1 << 0)
|
||||
|
||||
#define DSI_SOL_DELAY 0x11
|
||||
#define DSI_MAX_THRESHOLD 0x12
|
||||
|
||||
#define DSI_TRIGGER 0x13
|
||||
#define DSI_TRIGGER_HOST (1 << 1)
|
||||
#define DSI_TRIGGER_VIDEO (1 << 0)
|
||||
|
||||
#define DSI_TX_CRC 0x14
|
||||
#define DSI_STATUS 0x15
|
||||
#define DSI_INIT_SEQ_CONTROL 0x1A
|
||||
#define DSI_INIT_SEQ_DATA_0 0x1B
|
||||
#define DSI_INIT_SEQ_DATA_1 0x1C
|
||||
#define DSI_INIT_SEQ_DATA_2 0x1D
|
||||
#define DSI_INIT_SEQ_DATA_3 0x1E
|
||||
#define DSI_PKT_SEQ_0_LO 0x23
|
||||
#define DSI_PKT_SEQ_0_HI 0x24
|
||||
#define DSI_PKT_SEQ_1_LO 0x25
|
||||
#define DSI_PKT_SEQ_1_HI 0x26
|
||||
#define DSI_PKT_SEQ_2_LO 0x27
|
||||
#define DSI_PKT_SEQ_2_HI 0x28
|
||||
#define DSI_PKT_SEQ_3_LO 0x29
|
||||
#define DSI_PKT_SEQ_3_HI 0x2A
|
||||
#define DSI_PKT_SEQ_4_LO 0x2B
|
||||
#define DSI_PKT_SEQ_4_HI 0x2C
|
||||
#define DSI_PKT_SEQ_5_LO 0x2D
|
||||
#define DSI_PKT_SEQ_5_HI 0x2E
|
||||
#define DSI_DCS_CMDS 0x33
|
||||
#define DSI_PKT_LEN_0_1 0x34
|
||||
#define DSI_PKT_LEN_2_3 0x35
|
||||
#define DSI_PKT_LEN_4_5 0x36
|
||||
#define DSI_PKT_LEN_6_7 0x37
|
||||
#define DSI_PHY_TIMING_0 0x3C
|
||||
#define DSI_PHY_TIMING_1 0x3D
|
||||
#define DSI_PHY_TIMING_2 0x3E
|
||||
#define DSI_BTA_TIMING 0x3F
|
||||
|
||||
#define DSI_TIMEOUT_0 0x44
|
||||
#define DSI_TIMEOUT_LRX(x) (((x) & 0xffff) << 16)
|
||||
#define DSI_TIMEOUT_HTX(x) (((x) & 0xffff) << 0)
|
||||
|
||||
#define DSI_TIMEOUT_1 0x45
|
||||
#define DSI_TIMEOUT_PR(x) (((x) & 0xffff) << 16)
|
||||
#define DSI_TIMEOUT_TA(x) (((x) & 0xffff) << 0)
|
||||
|
||||
#define DSI_TO_TALLY 0x46
|
||||
|
||||
#define DSI_PAD_CONTROL_0 0x4B
|
||||
#define DSI_PAD_CONTROL_VS1_PULLDN_CLK (1 << 24)
|
||||
#define DSI_PAD_CONTROL_VS1_PULLDN(x) (((x) & 0xf) << 16)
|
||||
#define DSI_PAD_CONTROL_VS1_PDIO_CLK (1 << 8)
|
||||
#define DSI_PAD_CONTROL_VS1_PDIO(x) (((x) & 0xf) << 0)
|
||||
|
||||
#define DSI_PAD_CONTROL_CD 0x4c
|
||||
#define DSI_VIDEO_MODE_CONTROL 0x4E
|
||||
|
||||
#define DSI_PAD_CONTROL_1 0x4F
|
||||
#define DSI_PAD_CONTROL_2 0x50
|
||||
|
||||
#define DSI_PAD_CONTROL_3 0x51
|
||||
#define DSI_PAD_PREEMP_PD_CLK(x) (((x) & 0x3) << 12)
|
||||
#define DSI_PAD_PREEMP_PU_CLK(x) (((x) & 0x3) << 8)
|
||||
#define DSI_PAD_PREEMP_PD(x) (((x) & 0x3) << 4)
|
||||
#define DSI_PAD_PREEMP_PU(x) (((x) & 0x3) << 0)
|
||||
|
||||
#define DSI_PAD_CONTROL_4 0x52
|
||||
#define DSI_DSI_RD_DATA 0x9
|
||||
#define DSI_DSI_WR_DATA 0xA
|
||||
#define DSI_DSI_POWER_CONTROL 0xB
|
||||
#define DSI_HOST_DSI_CONTROL 0xF
|
||||
#define DSI_DSI_TRIGGER 0x13
|
||||
#define DSI_DSI_BTA_TIMING 0x3F
|
||||
#define DSI_PAD_CONTROL 0x4B
|
||||
#define DSI_DSI_VID_MODE_CONTROL 0x4E
|
||||
|
||||
void display_init();
|
||||
void display_end();
|
||||
|
||||
888
ipl/di.inl
888
ipl/di.inl
@@ -18,269 +18,263 @@
|
||||
static const cfg_op_t _display_config_1[4] = {
|
||||
{0x4E, 0x40000000}, //CLK_RST_CONTROLLER_CLK_SOURCE_DISP1
|
||||
{0x34, 0x4830A001}, //CLK_RST_CONTROLLER_PLLD_BASE
|
||||
{0x36, 0x20}, //CLK_RST_CONTROLLER_PLLD_MISC1
|
||||
{0x37, 0x2D0AAA} //CLK_RST_CONTROLLER_PLLD_MISC
|
||||
{0x36, 0x20}, //CLK_RST_CONTROLLER_PLLD_MISC1
|
||||
{0x37, 0x2D0AAA} //CLK_RST_CONTROLLER_PLLD_MISC
|
||||
};
|
||||
|
||||
//Display A config.
|
||||
static const cfg_op_t _display_config_2[94] = {
|
||||
{DC_CMD_STATE_ACCESS, 0},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
|
||||
{DC_CMD_REG_ACT_CONTROL, 0x54},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
|
||||
{DC_DISP_DC_MCCIF_FIFOCTRL, 0},
|
||||
{DC_DISP_DISP_MEM_HIGH_PRIORITY, 0},
|
||||
{DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER, 0},
|
||||
{DC_CMD_DISPLAY_POWER_CONTROL, PW0_ENABLE | PW1_ENABLE | PW2_ENABLE | PW3_ENABLE | PW4_ENABLE | PM0_ENABLE | PM1_ENABLE},
|
||||
{DC_CMD_GENERAL_INCR_SYNCPT_CNTRL, SYNCPT_CNTRL_NO_STALL},
|
||||
{DC_CMD_CONT_SYNCPT_VSYNC, SYNCPT_VSYNC_ENABLE | 0x9}, // 9: SYNCPT
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ},
|
||||
{DC_CMD_STATE_ACCESS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
|
||||
{DC_WIN_DV_CONTROL, 0},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
|
||||
/* Setup default YUV colorspace conversion coefficients */
|
||||
{DC_WIN_CSC_YOF, 0xF0},
|
||||
{DC_WIN_CSC_KYRGB, 0x12A},
|
||||
{DC_WIN_CSC_KUR, 0},
|
||||
{DC_WIN_CSC_KVR, 0x198},
|
||||
{DC_WIN_CSC_KUG, 0x39B},
|
||||
{DC_WIN_CSC_KVG, 0x32F},
|
||||
{DC_WIN_CSC_KUB, 0x204},
|
||||
{DC_WIN_CSC_KVB, 0},
|
||||
/* End of color coefficients */
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
|
||||
{DC_WIN_DV_CONTROL, 0},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
|
||||
/* Setup default YUV colorspace conversion coefficients */
|
||||
{DC_WIN_CSC_YOF, 0xF0},
|
||||
{DC_WIN_CSC_KYRGB, 0x12A},
|
||||
{DC_WIN_CSC_KUR, 0},
|
||||
{DC_WIN_CSC_KVR, 0x198},
|
||||
{DC_WIN_CSC_KUG, 0x39B},
|
||||
{DC_WIN_CSC_KVG, 0x32F},
|
||||
{DC_WIN_CSC_KUB, 0x204},
|
||||
{DC_WIN_CSC_KVB, 0},
|
||||
/* End of color coefficients */
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
|
||||
{DC_WIN_DV_CONTROL, 0},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
|
||||
/* Setup default YUV colorspace conversion coefficients */
|
||||
{DC_WIN_CSC_YOF, 0xF0},
|
||||
{DC_WIN_CSC_KYRGB, 0x12A},
|
||||
{DC_WIN_CSC_KUR, 0},
|
||||
{DC_WIN_CSC_KVR, 0x198},
|
||||
{DC_WIN_CSC_KUG, 0x39B},
|
||||
{DC_WIN_CSC_KVG, 0x32F},
|
||||
{DC_WIN_CSC_KUB, 0x204},
|
||||
{DC_WIN_CSC_KVB, 0},
|
||||
/* End of color coefficients */
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_DISP_DISP_COLOR_CONTROL, BASE_COLOR_SIZE_888},
|
||||
{DC_DISP_DISP_INTERFACE_CONTROL, DISP_DATA_FORMAT_DF1P1C},
|
||||
{DC_COM_PIN_OUTPUT_POLARITY(1), 0x1000000},
|
||||
{DC_COM_PIN_OUTPUT_POLARITY(3), 0},
|
||||
{0x40, 0},
|
||||
{DC_CMD_STATE_CONTROL, 0x100},
|
||||
{DC_CMD_STATE_CONTROL, 1},
|
||||
{0x43, 0x54},
|
||||
{DC_CMD_STATE_CONTROL, 0x100},
|
||||
{DC_CMD_STATE_CONTROL, 1},
|
||||
{0x42, 0x10},
|
||||
{0x42, 0x20},
|
||||
{0x42, 0x40},
|
||||
{0x480, 0},
|
||||
{0x403, 0},
|
||||
{0x404, 0},
|
||||
{0x36, 0x50155},
|
||||
{1, 0x100},
|
||||
{0x28, 0x109},
|
||||
{DC_CMD_STATE_CONTROL, 0xF00},
|
||||
{DC_CMD_STATE_CONTROL, 0xF},
|
||||
{0x40, 0},
|
||||
{0x42, 0x10},
|
||||
{0x700, 0},
|
||||
{0x42, 0x10},
|
||||
{0x70E, 0},
|
||||
{0x700, 0},
|
||||
{0x42, 0x10},
|
||||
{0x42, 0x10},
|
||||
{0x611, 0xF0},
|
||||
{0x612, 0x12A},
|
||||
{0x613, 0},
|
||||
{0x614, 0x198},
|
||||
{0x615, 0x39B},
|
||||
{0x616, 0x32F},
|
||||
{0x617, 0x204},
|
||||
{0x618, 0},
|
||||
{0x42, 0x20},
|
||||
{0x700, 0},
|
||||
{0x42, 0x20},
|
||||
{0x70E, 0},
|
||||
{0x700, 0},
|
||||
{0x42, 0x20},
|
||||
{0x42, 0x20},
|
||||
{0x611, 0xF0},
|
||||
{0x612, 0x12A},
|
||||
{0x613, 0},
|
||||
{0x614, 0x198},
|
||||
{0x615, 0x39B},
|
||||
{0x616, 0x32F},
|
||||
{0x617, 0x204},
|
||||
{0x618, 0},
|
||||
{0x42, 0x40},
|
||||
{0x700, 0},
|
||||
{0x42, 0x40},
|
||||
{0x70E, 0},
|
||||
{0x700, 0},
|
||||
{0x42, 0x40},
|
||||
{0x42, 0x40},
|
||||
{0x611, 0xF0},
|
||||
{0x612, 0x12A},
|
||||
{0x613, 0},
|
||||
{0x614, 0x198},
|
||||
{0x615, 0x39B},
|
||||
{0x616, 0x32F},
|
||||
{0x617, 0x204},
|
||||
{0x618, 0},
|
||||
{0x42, 0x10},
|
||||
{0x700, 0},
|
||||
{0x42, 0x20},
|
||||
{0x700, 0},
|
||||
{0x42, 0x40},
|
||||
{0x700, 0},
|
||||
{0x430, 8},
|
||||
{0x42F, 0},
|
||||
{0x307, 0x1000000},
|
||||
{0x309, 0},
|
||||
{0x4E4, 0},
|
||||
{DC_COM_CRC_CONTROL, 0},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
|
||||
{0x300, 0},
|
||||
{DC_CMD_STATE_CONTROL, 0xF00},
|
||||
{DC_CMD_STATE_CONTROL, 0xF},
|
||||
{0x42, 0x10},
|
||||
{0x716, 0x10000FF},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
|
||||
{0x42, 0x20},
|
||||
{0x716, 0x10000FF},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
|
||||
{0x42, 0x40},
|
||||
{0x716, 0x10000FF},
|
||||
{DC_CMD_DISPLAY_COMMAND_OPTION0, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_DISP_DISP_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_COMMAND, 0},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ}
|
||||
{0x31, 0},
|
||||
{0x42, 0x10},
|
||||
{0x700, 0},
|
||||
{0x42, 0x20},
|
||||
{0x700, 0},
|
||||
{0x42, 0x40},
|
||||
{0x700, 0},
|
||||
{0x402, 0},
|
||||
{0x32, 0},
|
||||
{DC_CMD_STATE_CONTROL, 0xF00},
|
||||
{DC_CMD_STATE_CONTROL, 0xF}
|
||||
};
|
||||
|
||||
//DSI Init config.
|
||||
//DSI config.
|
||||
static const cfg_op_t _display_config_3[60] = {
|
||||
{DSI_WR_DATA, 0},
|
||||
{DSI_INT_ENABLE, 0},
|
||||
{DSI_INT_STATUS, 0},
|
||||
{DSI_INT_MASK, 0},
|
||||
{DSI_INIT_SEQ_DATA_0, 0},
|
||||
{DSI_INIT_SEQ_DATA_1, 0},
|
||||
{DSI_INIT_SEQ_DATA_2, 0},
|
||||
{DSI_INIT_SEQ_DATA_3, 0},
|
||||
{DSI_DCS_CMDS, 0},
|
||||
{DSI_PKT_SEQ_0_LO, 0},
|
||||
{DSI_PKT_SEQ_1_LO, 0},
|
||||
{DSI_PKT_SEQ_2_LO, 0},
|
||||
{DSI_PKT_SEQ_3_LO, 0},
|
||||
{DSI_PKT_SEQ_4_LO, 0},
|
||||
{DSI_PKT_SEQ_5_LO, 0},
|
||||
{DSI_PKT_SEQ_0_HI, 0},
|
||||
{DSI_PKT_SEQ_1_HI, 0},
|
||||
{DSI_PKT_SEQ_2_HI, 0},
|
||||
{DSI_PKT_SEQ_3_HI, 0},
|
||||
{DSI_PKT_SEQ_4_HI, 0},
|
||||
{DSI_PKT_SEQ_5_HI, 0},
|
||||
{DSI_CONTROL, 0},
|
||||
{DSI_PAD_CONTROL_CD, 0},
|
||||
{DSI_SOL_DELAY, 0x18},
|
||||
{DSI_MAX_THRESHOLD, 0x1E0},
|
||||
{DSI_TRIGGER, 0},
|
||||
{DSI_INIT_SEQ_CONTROL, 0},
|
||||
{DSI_PKT_LEN_0_1, 0},
|
||||
{DSI_PKT_LEN_2_3, 0},
|
||||
{DSI_PKT_LEN_4_5, 0},
|
||||
{DSI_PKT_LEN_6_7, 0},
|
||||
{DSI_PAD_CONTROL_1, 0},
|
||||
{DSI_PHY_TIMING_0, 0x6070601},
|
||||
{DSI_PHY_TIMING_1, 0x40A0E05},
|
||||
{DSI_PHY_TIMING_2, 0x30109},
|
||||
{DSI_BTA_TIMING, 0x190A14},
|
||||
{DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF)},
|
||||
{DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x765) | DSI_TIMEOUT_TA(0x2000)},
|
||||
{DSI_TO_TALLY, 0},
|
||||
{DSI_PAD_CONTROL_0, DSI_PAD_CONTROL_VS1_PULLDN(0) | DSI_PAD_CONTROL_VS1_PDIO(0)}, // Enable
|
||||
{DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE},
|
||||
{DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE},
|
||||
{DSI_POWER_CONTROL, 0},
|
||||
{DSI_POWER_CONTROL, 0},
|
||||
{DSI_PAD_CONTROL_1, 0},
|
||||
{DSI_PHY_TIMING_0, 0x6070601},
|
||||
{DSI_PHY_TIMING_1, 0x40A0E05},
|
||||
{DSI_PHY_TIMING_2, 0x30118},
|
||||
{DSI_BTA_TIMING, 0x190A14},
|
||||
{DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF)},
|
||||
{DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x1343) | DSI_TIMEOUT_TA(0x2000)},
|
||||
{DSI_TO_TALLY, 0},
|
||||
{DSI_HOST_CONTROL, DSI_HOST_CONTROL_CRC_RESET | DSI_HOST_CONTROL_TX_TRIG_HOST | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC},
|
||||
{DSI_CONTROL, DSI_CONTROL_LANES(3) | DSI_CONTROL_HOST_ENABLE},
|
||||
{DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE},
|
||||
{DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE},
|
||||
{DSI_MAX_THRESHOLD, 0x40},
|
||||
{DSI_TRIGGER, 0},
|
||||
{DSI_TX_CRC, 0},
|
||||
{DSI_INIT_SEQ_CONTROL, 0}
|
||||
{0xA, 0},
|
||||
{0xC, 0},
|
||||
{0xD, 0},
|
||||
{0xE, 0},
|
||||
{0x1B, 0},
|
||||
{0x1C, 0},
|
||||
{0x1D, 0},
|
||||
{0x1E, 0},
|
||||
{0x33, 0},
|
||||
{0x23, 0},
|
||||
{0x25, 0},
|
||||
{0x27, 0},
|
||||
{0x29, 0},
|
||||
{0x2B, 0},
|
||||
{0x2D, 0},
|
||||
{0x24, 0},
|
||||
{0x26, 0},
|
||||
{0x28, 0},
|
||||
{0x2A, 0},
|
||||
{0x2C, 0},
|
||||
{0x2E, 0},
|
||||
{0x10, 0},
|
||||
{0x4C, 0},
|
||||
{0x11, 0x18},
|
||||
{0x12, 0x1E0},
|
||||
{0x13, 0},
|
||||
{0x1A, 0},
|
||||
{0x34, 0},
|
||||
{0x35, 0},
|
||||
{0x36, 0},
|
||||
{0x37, 0},
|
||||
{0x4F, 0},
|
||||
{0x3C, 0x6070601},
|
||||
{0x3D, 0x40A0E05},
|
||||
{0x3E, 0x30109},
|
||||
{0x3F, 0x190A14},
|
||||
{0x44, 0x2000FFFF},
|
||||
{0x45, 0x7652000},
|
||||
{0x46, 0},
|
||||
{0x4B, 0},
|
||||
{DSI_DSI_POWER_CONTROL, 1},
|
||||
{DSI_DSI_POWER_CONTROL, 1},
|
||||
{DSI_DSI_POWER_CONTROL, 0},
|
||||
{DSI_DSI_POWER_CONTROL, 0},
|
||||
{0x4F, 0},
|
||||
{0x3C, 0x6070601},
|
||||
{0x3D, 0x40A0E05},
|
||||
{0x3E, 0x30118},
|
||||
{0x3F, 0x190A14},
|
||||
{0x44, 0x2000FFFF},
|
||||
{0x45, 0x13432000},
|
||||
{0x46, 0},
|
||||
{0xF, 0x102003},
|
||||
{0x10, 0x31},
|
||||
{DSI_DSI_POWER_CONTROL, 1},
|
||||
{DSI_DSI_POWER_CONTROL, 1},
|
||||
{0x12, 0x40},
|
||||
{0x13, 0},
|
||||
{0x14, 0},
|
||||
{0x1A, 0}
|
||||
};
|
||||
|
||||
//DSI config (if ver == 0x10).
|
||||
static const cfg_op_t _display_config_4[43] = {
|
||||
{DSI_WR_DATA, 0x439},
|
||||
{DSI_WR_DATA, 0x9483FFB9},
|
||||
{DSI_TRIGGER, DSI_TRIGGER_HOST},
|
||||
{DSI_WR_DATA, 0xBD15},
|
||||
{DSI_TRIGGER, DSI_TRIGGER_HOST},
|
||||
{DSI_WR_DATA, 0x1939},
|
||||
{DSI_WR_DATA, 0xAAAAAAD8},
|
||||
{DSI_WR_DATA, 0xAAAAAAEB},
|
||||
{DSI_WR_DATA, 0xAAEBAAAA},
|
||||
{DSI_WR_DATA, 0xAAAAAAAA},
|
||||
{DSI_WR_DATA, 0xAAAAAAEB},
|
||||
{DSI_WR_DATA, 0xAAEBAAAA},
|
||||
{DSI_WR_DATA, 0xAA},
|
||||
{DSI_TRIGGER, DSI_TRIGGER_HOST},
|
||||
{DSI_WR_DATA, 0x1BD15},
|
||||
{DSI_TRIGGER, DSI_TRIGGER_HOST},
|
||||
{DSI_WR_DATA, 0x2739},
|
||||
{DSI_WR_DATA, 0xFFFFFFD8},
|
||||
{DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_WR_DATA, 0xFFFFFF},
|
||||
{DSI_TRIGGER, DSI_TRIGGER_HOST},
|
||||
{DSI_WR_DATA, 0x2BD15},
|
||||
{DSI_TRIGGER, DSI_TRIGGER_HOST},
|
||||
{DSI_WR_DATA, 0xF39},
|
||||
{DSI_WR_DATA, 0xFFFFFFD8},
|
||||
{DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_WR_DATA, 0xFFFFFF},
|
||||
{DSI_TRIGGER, DSI_TRIGGER_HOST},
|
||||
{DSI_WR_DATA, 0xBD15},
|
||||
{DSI_TRIGGER, DSI_TRIGGER_HOST},
|
||||
{DSI_WR_DATA, 0x6D915},
|
||||
{DSI_TRIGGER, DSI_TRIGGER_HOST},
|
||||
{DSI_WR_DATA, 0x439},
|
||||
{DSI_WR_DATA, 0xB9},
|
||||
{DSI_TRIGGER, DSI_TRIGGER_HOST}
|
||||
{DSI_DSI_WR_DATA, 0x439},
|
||||
{DSI_DSI_WR_DATA, 0x9483FFB9},
|
||||
{DSI_DSI_TRIGGER, 2},
|
||||
{DSI_DSI_WR_DATA, 0xBD15},
|
||||
{DSI_DSI_TRIGGER, 2},
|
||||
{DSI_DSI_WR_DATA, 0x1939},
|
||||
{DSI_DSI_WR_DATA, 0xAAAAAAD8},
|
||||
{DSI_DSI_WR_DATA, 0xAAAAAAEB},
|
||||
{DSI_DSI_WR_DATA, 0xAAEBAAAA},
|
||||
{DSI_DSI_WR_DATA, 0xAAAAAAAA},
|
||||
{DSI_DSI_WR_DATA, 0xAAAAAAEB},
|
||||
{DSI_DSI_WR_DATA, 0xAAEBAAAA},
|
||||
{DSI_DSI_WR_DATA, 0xAA},
|
||||
{DSI_DSI_TRIGGER, 2},
|
||||
{DSI_DSI_WR_DATA, 0x1BD15},
|
||||
{DSI_DSI_TRIGGER, 2},
|
||||
{DSI_DSI_WR_DATA, 0x2739},
|
||||
{DSI_DSI_WR_DATA, 0xFFFFFFD8},
|
||||
{DSI_DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_DSI_WR_DATA, 0xFFFFFF},
|
||||
{DSI_DSI_TRIGGER, 2},
|
||||
{DSI_DSI_WR_DATA, 0x2BD15},
|
||||
{DSI_DSI_TRIGGER, 2},
|
||||
{DSI_DSI_WR_DATA, 0xF39},
|
||||
{DSI_DSI_WR_DATA, 0xFFFFFFD8},
|
||||
{DSI_DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_DSI_WR_DATA, 0xFFFFFFFF},
|
||||
{DSI_DSI_WR_DATA, 0xFFFFFF},
|
||||
{DSI_DSI_TRIGGER, 2},
|
||||
{DSI_DSI_WR_DATA, 0xBD15},
|
||||
{DSI_DSI_TRIGGER, 2},
|
||||
{DSI_DSI_WR_DATA, 0x6D915},
|
||||
{DSI_DSI_TRIGGER, 2},
|
||||
{DSI_DSI_WR_DATA, 0x439},
|
||||
{DSI_DSI_WR_DATA, 0xB9},
|
||||
{DSI_DSI_TRIGGER, 2}
|
||||
};
|
||||
|
||||
//DSI config.
|
||||
static const cfg_op_t _display_config_5[21] = {
|
||||
{DSI_PAD_CONTROL_1, 0},
|
||||
{DSI_PHY_TIMING_0, 0x6070601},
|
||||
{DSI_PHY_TIMING_1, 0x40A0E05},
|
||||
{DSI_PHY_TIMING_2, 0x30172},
|
||||
{DSI_BTA_TIMING, 0x190A14},
|
||||
{DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xA40)},
|
||||
{DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x5A2F) | DSI_TIMEOUT_TA(0x2000)},
|
||||
{DSI_TO_TALLY, 0},
|
||||
{DSI_PKT_SEQ_0_LO, 0x40000208},
|
||||
{DSI_PKT_SEQ_2_LO, 0x40000308},
|
||||
{DSI_PKT_SEQ_4_LO, 0x40000308},
|
||||
{DSI_PKT_SEQ_1_LO, 0x40000308},
|
||||
{DSI_PKT_SEQ_3_LO, 0x3F3B2B08},
|
||||
{DSI_PKT_SEQ_3_HI, 0x2CC},
|
||||
{DSI_PKT_SEQ_5_LO, 0x3F3B2B08},
|
||||
{DSI_PKT_SEQ_5_HI, 0x2CC},
|
||||
{DSI_PKT_LEN_0_1, 0xCE0000},
|
||||
{DSI_PKT_LEN_2_3, 0x87001A2},
|
||||
{DSI_PKT_LEN_4_5, 0x190},
|
||||
{DSI_PKT_LEN_6_7, 0x190},
|
||||
{DSI_HOST_CONTROL, 0},
|
||||
{0x4F, 0},
|
||||
{0x3C, 0x6070601},
|
||||
{0x3D, 0x40A0E05},
|
||||
{0x3E, 0x30172},
|
||||
{0x3F, 0x190A14},
|
||||
{0x44, 0x20000A40},
|
||||
{0x45, 0x5A2F2000},
|
||||
{0x46, 0},
|
||||
{0x23, 0x40000208},
|
||||
{0x27, 0x40000308},
|
||||
{0x2B, 0x40000308},
|
||||
{0x25, 0x40000308},
|
||||
{0x29, 0x3F3B2B08},
|
||||
{0x2A, 0x2CC},
|
||||
{0x2D, 0x3F3B2B08},
|
||||
{0x2E, 0x2CC},
|
||||
{0x34, 0xCE0000},
|
||||
{0x35, 0x87001A2},
|
||||
{0x36, 0x190},
|
||||
{0x37, 0x190},
|
||||
{0xF, 0},
|
||||
};
|
||||
|
||||
//Clock config.
|
||||
static const cfg_op_t _display_config_6[3] = {
|
||||
{0x34, 0x4810C001}, //CLK_RST_CONTROLLER_PLLD_BASE
|
||||
{0x36, 0x20}, //CLK_RST_CONTROLLER_PLLD_MISC1
|
||||
{0x37, 0x2DFC00} //CLK_RST_CONTROLLER_PLLD_MISC
|
||||
{0x36, 0x20}, //CLK_RST_CONTROLLER_PLLD_MISC1
|
||||
{0x37, 0x2DFC00} //CLK_RST_CONTROLLER_PLLD_MISC
|
||||
};
|
||||
|
||||
//DSI config.
|
||||
static const cfg_op_t _display_config_7[10] = {
|
||||
{DSI_TRIGGER, 0},
|
||||
{DSI_CONTROL, 0},
|
||||
{DSI_SOL_DELAY, 6},
|
||||
{DSI_MAX_THRESHOLD, 0x1E0},
|
||||
{DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE},
|
||||
{DSI_CONTROL, DSI_CONTROL_HS_CLK_CTRL | DSI_CONTROL_FORMAT(3) | DSI_CONTROL_LANES(3) | DSI_CONTROL_VIDEO_ENABLE},
|
||||
{DSI_HOST_CONTROL, DSI_HOST_CONTROL_HS | DSI_HOST_CONTROL_FIFO_SEL| DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC},
|
||||
{DSI_CONTROL, DSI_CONTROL_HS_CLK_CTRL | DSI_CONTROL_FORMAT(3) | DSI_CONTROL_LANES(3) | DSI_CONTROL_VIDEO_ENABLE},
|
||||
{DSI_HOST_CONTROL, DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC},
|
||||
{DSI_HOST_CONTROL, DSI_HOST_CONTROL_HS | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC}
|
||||
{0x13, 0},
|
||||
{0x10, 0},
|
||||
{0x11, 6},
|
||||
{0x12, 0x1E0},
|
||||
{DSI_DSI_POWER_CONTROL, 1},
|
||||
{0x10, 0x103032},
|
||||
{0xF, 0x33},
|
||||
{0x10, 0x103032},
|
||||
{0xF, 3},
|
||||
{0xF, 0x23}
|
||||
};
|
||||
|
||||
//MIPI CAL config.
|
||||
@@ -295,10 +289,10 @@ static const cfg_op_t _display_config_8[6] = {
|
||||
|
||||
//DSI config.
|
||||
static const cfg_op_t _display_config_9[4] = {
|
||||
{DSI_PAD_CONTROL_1, 0},
|
||||
{DSI_PAD_CONTROL_2, 0},
|
||||
{DSI_PAD_CONTROL_3, DSI_PAD_PREEMP_PD_CLK(0x3) | DSI_PAD_PREEMP_PU_CLK(0x3) | DSI_PAD_PREEMP_PD(0x03) | DSI_PAD_PREEMP_PU(0x3)},
|
||||
{DSI_PAD_CONTROL_4, 0}
|
||||
{0x4F, 0},
|
||||
{0x50, 0},
|
||||
{0x51, 0x3333},
|
||||
{0x52, 0}
|
||||
};
|
||||
|
||||
//MIPI CAL config.
|
||||
@@ -323,240 +317,232 @@ static const cfg_op_t _display_config_10[16] = {
|
||||
|
||||
//Display A config.
|
||||
static const cfg_op_t _display_config_11[113] = {
|
||||
{DC_CMD_STATE_ACCESS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
|
||||
{DC_WIN_DV_CONTROL, 0},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
|
||||
/* Setup default YUV colorspace conversion coefficients */
|
||||
{DC_WIN_CSC_YOF, 0xF0},
|
||||
{DC_WIN_CSC_KYRGB, 0x12A},
|
||||
{DC_WIN_CSC_KUR, 0},
|
||||
{DC_WIN_CSC_KVR, 0x198},
|
||||
{DC_WIN_CSC_KUG, 0x39B},
|
||||
{DC_WIN_CSC_KVG, 0x32F},
|
||||
{DC_WIN_CSC_KUB, 0x204},
|
||||
{DC_WIN_CSC_KVB, 0},
|
||||
/* End of color coefficients */
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
|
||||
{DC_WIN_DV_CONTROL, 0},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
|
||||
/* Setup default YUV colorspace conversion coefficients */
|
||||
{DC_WIN_CSC_YOF, 0xF0},
|
||||
{DC_WIN_CSC_KYRGB, 0x12A},
|
||||
{DC_WIN_CSC_KUR, 0},
|
||||
{DC_WIN_CSC_KVR, 0x198},
|
||||
{DC_WIN_CSC_KUG, 0x39B},
|
||||
{DC_WIN_CSC_KVG, 0x32F},
|
||||
{DC_WIN_CSC_KUB, 0x204},
|
||||
{DC_WIN_CSC_KVB, 0},
|
||||
/* End of color coefficients */
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
|
||||
{DC_WIN_DV_CONTROL, 0},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
|
||||
/* Setup default YUV colorspace conversion coefficients */
|
||||
{DC_WIN_CSC_YOF, 0xF0},
|
||||
{DC_WIN_CSC_KYRGB, 0x12A},
|
||||
{DC_WIN_CSC_KUR, 0},
|
||||
{DC_WIN_CSC_KVR, 0x198},
|
||||
{DC_WIN_CSC_KUG, 0x39B},
|
||||
{DC_WIN_CSC_KVG, 0x32F},
|
||||
{DC_WIN_CSC_KUB, 0x204},
|
||||
{DC_WIN_CSC_KVB, 0},
|
||||
/* End of color coefficients */
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_DISP_DISP_COLOR_CONTROL, BASE_COLOR_SIZE_888},
|
||||
{DC_DISP_DISP_INTERFACE_CONTROL, DISP_DATA_FORMAT_DF1P1C},
|
||||
{DC_COM_PIN_OUTPUT_POLARITY(1), 0x1000000},
|
||||
{DC_COM_PIN_OUTPUT_POLARITY(3), 0},
|
||||
{0x40, 0},
|
||||
{0x42, 0x10},
|
||||
{0x700, 0},
|
||||
{0x42, 0x10},
|
||||
{0x70E, 0},
|
||||
{0x700, 0},
|
||||
{0x42, 0x10},
|
||||
{0x42, 0x10},
|
||||
{0x611, 0xF0},
|
||||
{0x612, 0x12A},
|
||||
{0x613, 0},
|
||||
{0x614, 0x198},
|
||||
{0x615, 0x39B},
|
||||
{0x616, 0x32F},
|
||||
{0x617, 0x204},
|
||||
{0x618, 0},
|
||||
{0x42, 0x20},
|
||||
{0x700, 0},
|
||||
{0x42, 0x20},
|
||||
{0x70E, 0},
|
||||
{0x700, 0},
|
||||
{0x42, 0x20},
|
||||
{0x42, 0x20},
|
||||
{0x611, 0xF0},
|
||||
{0x612, 0x12A},
|
||||
{0x613, 0},
|
||||
{0x614, 0x198},
|
||||
{0x615, 0x39B},
|
||||
{0x616, 0x32F},
|
||||
{0x617, 0x204},
|
||||
{0x618, 0},
|
||||
{0x42, 0x40},
|
||||
{0x700, 0},
|
||||
{0x42, 0x40},
|
||||
{0x70E, 0},
|
||||
{0x700, 0},
|
||||
{0x42, 0x40},
|
||||
{0x42, 0x40},
|
||||
{0x611, 0xF0},
|
||||
{0x612, 0x12A},
|
||||
{0x613, 0},
|
||||
{0x614, 0x198},
|
||||
{0x615, 0x39B},
|
||||
{0x616, 0x32F},
|
||||
{0x617, 0x204},
|
||||
{0x618, 0},
|
||||
{0x42, 0x10},
|
||||
{0x700, 0},
|
||||
{0x42, 0x20},
|
||||
{0x700, 0},
|
||||
{0x42, 0x40},
|
||||
{0x700, 0},
|
||||
{0x430, 8},
|
||||
{0x42F, 0},
|
||||
{0x307, 0x1000000},
|
||||
{0x309, 0},
|
||||
{0x4E4, 0},
|
||||
{DC_COM_CRC_CONTROL, 0},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
|
||||
{0x300, 0},
|
||||
{DC_CMD_STATE_CONTROL, 0xF00},
|
||||
{DC_CMD_STATE_CONTROL, 0xF},
|
||||
{0x42, 0x10},
|
||||
{0x716, 0x10000FF},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
|
||||
{0x42, 0x20},
|
||||
{0x716, 0x10000FF},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
|
||||
{0x42, 0x40},
|
||||
{0x716, 0x10000FF},
|
||||
{DC_CMD_DISPLAY_COMMAND_OPTION0, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_DISP_DISP_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_COMMAND, 0},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ},
|
||||
{DC_CMD_STATE_ACCESS, 0},
|
||||
/* Set Display timings */
|
||||
{DC_DISP_DISP_TIMING_OPTIONS, 0},
|
||||
{DC_DISP_REF_TO_SYNC, (1 << 16)}, // h_ref_to_sync = 0, v_ref_to_sync = 1.
|
||||
{DC_DISP_SYNC_WIDTH, 0x10048},
|
||||
{DC_DISP_BACK_PORCH, 0x90048},
|
||||
{DC_DISP_ACTIVE, 0x50002D0},
|
||||
{DC_DISP_FRONT_PORCH, 0xA0088}, // Sources say that this should be above the DC_DISP_ACTIVE cmd.
|
||||
/* End of Display timings */
|
||||
{DC_DISP_SHIFT_CLOCK_OPTIONS, SC1_H_QUALIFIER_NONE | SC0_H_QUALIFIER_NONE},
|
||||
{DC_COM_PIN_OUTPUT_ENABLE(1), 0},
|
||||
{DC_DISP_DATA_ENABLE_OPTIONS, DE_SELECT_ACTIVE | DE_CONTROL_NORMAL},
|
||||
{DC_DISP_DISP_INTERFACE_CONTROL, DISP_DATA_FORMAT_DF1P1C},
|
||||
{DC_DISP_DISP_CLOCK_CONTROL, 0},
|
||||
{DC_CMD_DISPLAY_COMMAND_OPTION0, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_DISP_DISP_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
|
||||
{DC_CMD_STATE_ACCESS, READ_MUX | WRITE_MUX},
|
||||
{DC_DISP_FRONT_PORCH, 0xA0088},
|
||||
{DC_CMD_STATE_ACCESS, 0},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
|
||||
{DC_CMD_GENERAL_INCR_SYNCPT, 0x301},
|
||||
{DC_CMD_GENERAL_INCR_SYNCPT, 0x301},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
|
||||
{DC_CMD_STATE_ACCESS, 0},
|
||||
{DC_DISP_DISP_CLOCK_CONTROL, PIXEL_CLK_DIVIDER_PCD1 | SHIFT_CLK_DIVIDER(4)},
|
||||
{DC_DISP_DISP_COLOR_CONTROL, BASE_COLOR_SIZE_888},
|
||||
{DC_CMD_DISPLAY_COMMAND_OPTION0, 0}
|
||||
{0x31, 0},
|
||||
{0x42, 0x10},
|
||||
{0x700, 0},
|
||||
{0x42, 0x20},
|
||||
{0x700, 0},
|
||||
{0x42, 0x40},
|
||||
{0x700, 0},
|
||||
{0x402, 0},
|
||||
{0x32, 0},
|
||||
{DC_CMD_STATE_CONTROL, 0xF00},
|
||||
{DC_CMD_STATE_CONTROL, 0xF},
|
||||
{0x40, 0},
|
||||
{0x405, 0},
|
||||
{0x406, 0x10000},
|
||||
{0x407, 0x10048},
|
||||
{0x408, 0x90048},
|
||||
{0x409, 0x50002D0},
|
||||
{0x40A, 0xA0088},
|
||||
{0x431, 0x10001},
|
||||
{0x303, 0},
|
||||
{0x432, 5},
|
||||
{0x42F, 0},
|
||||
{0x42E, 0},
|
||||
{0x31, 0},
|
||||
{0x42, 0x10},
|
||||
{0x700, 0},
|
||||
{0x42, 0x20},
|
||||
{0x700, 0},
|
||||
{0x42, 0x40},
|
||||
{0x700, 0},
|
||||
{0x402, 0},
|
||||
{0x32, 0x20},
|
||||
{DC_CMD_STATE_CONTROL, 0x100},
|
||||
{DC_CMD_STATE_CONTROL, 1},
|
||||
{0x40, 5},
|
||||
{0x40A, 0xA0088},
|
||||
{0x40, 0},
|
||||
{DC_CMD_STATE_CONTROL, 0x100},
|
||||
{DC_CMD_STATE_CONTROL, 1},
|
||||
{0, 0x301},
|
||||
{0, 0x301},
|
||||
{DC_CMD_STATE_CONTROL, 0x100},
|
||||
{DC_CMD_STATE_CONTROL, 1},
|
||||
{0x40, 0},
|
||||
{0x42E, 4},
|
||||
{0x430, 8},
|
||||
{0x31, 0}
|
||||
};
|
||||
|
||||
////Display A config.
|
||||
static const cfg_op_t _display_config_12[17] = {
|
||||
{DC_DISP_FRONT_PORCH, 0xA0088},
|
||||
{DC_CMD_INT_MASK, 0},
|
||||
{DC_CMD_STATE_ACCESS, 0},
|
||||
{DC_CMD_INT_ENABLE, 0},
|
||||
{DC_CMD_CONT_SYNCPT_VSYNC, 0},
|
||||
{DC_CMD_DISPLAY_COMMAND, 0},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
|
||||
{DC_CMD_GENERAL_INCR_SYNCPT, 0x301},
|
||||
{DC_CMD_GENERAL_INCR_SYNCPT, 0x301},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
|
||||
{DC_CMD_DISPLAY_POWER_CONTROL, 0},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
|
||||
{0x40A, 0xA0088},
|
||||
{0x38, 0},
|
||||
{0x40, 0},
|
||||
{0x39, 0},
|
||||
{0x28, 0},
|
||||
{0x32, 0},
|
||||
{DC_CMD_STATE_CONTROL, 0x100},
|
||||
{DC_CMD_STATE_CONTROL, 1},
|
||||
{DC_CMD_STATE_CONTROL, 0x100},
|
||||
{DC_CMD_STATE_CONTROL, 1},
|
||||
{0, 0x301},
|
||||
{0, 0x301},
|
||||
{DC_CMD_STATE_CONTROL, 0x100},
|
||||
{DC_CMD_STATE_CONTROL, 1},
|
||||
{0x36, 0},
|
||||
{DC_CMD_STATE_CONTROL, 0x100},
|
||||
{DC_CMD_STATE_CONTROL, 1}
|
||||
};
|
||||
|
||||
//DSI config.
|
||||
static const cfg_op_t _display_config_13[16] = {
|
||||
{DSI_POWER_CONTROL, 0},
|
||||
{DSI_PAD_CONTROL_1, 0},
|
||||
{DSI_PHY_TIMING_0, 0x6070601},
|
||||
{DSI_PHY_TIMING_1, 0x40A0E05},
|
||||
{DSI_PHY_TIMING_2, 0x30109},
|
||||
{DSI_BTA_TIMING, 0x190A14},
|
||||
{DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF) },
|
||||
{DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x765) | DSI_TIMEOUT_TA(0x2000)},
|
||||
{DSI_TO_TALLY, 0},
|
||||
{DSI_HOST_CONTROL, DSI_HOST_CONTROL_CRC_RESET | DSI_HOST_CONTROL_TX_TRIG_HOST | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC},
|
||||
{DSI_CONTROL, DSI_CONTROL_LANES(3) | DSI_CONTROL_HOST_ENABLE},
|
||||
{DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE},
|
||||
{DSI_MAX_THRESHOLD, 0x40},
|
||||
{DSI_TRIGGER, 0},
|
||||
{DSI_TX_CRC, 0},
|
||||
{DSI_INIT_SEQ_CONTROL, 0}
|
||||
{DSI_DSI_POWER_CONTROL, 0},
|
||||
{0x4F, 0},
|
||||
{0x3C, 0x6070601},
|
||||
{0x3D, 0x40A0E05},
|
||||
{0x3E, 0x30109},
|
||||
{0x3F, 0x190A14},
|
||||
{0x44, 0x2000FFFF},
|
||||
{0x45, 0x7652000},
|
||||
{0x46, 0},
|
||||
{0xF, 0x102003},
|
||||
{0x10, 0x31},
|
||||
{DSI_DSI_POWER_CONTROL, 1},
|
||||
{0x12, 0x40},
|
||||
{0x13, 0},
|
||||
{0x14, 0},
|
||||
{0x1A, 0}
|
||||
};
|
||||
|
||||
//DSI config (if ver == 0x10).
|
||||
static const cfg_op_t _display_config_14[22] = {
|
||||
{DSI_WR_DATA, 0x439},
|
||||
{DSI_WR_DATA, 0x9483FFB9},
|
||||
{DSI_TRIGGER, DSI_TRIGGER_HOST},
|
||||
{DSI_WR_DATA, 0x2139},
|
||||
{DSI_WR_DATA, 0x191919D5},
|
||||
{DSI_WR_DATA, 0x19191919},
|
||||
{DSI_WR_DATA, 0x19191919},
|
||||
{DSI_WR_DATA, 0x19191919},
|
||||
{DSI_WR_DATA, 0x19191919},
|
||||
{DSI_WR_DATA, 0x19191919},
|
||||
{DSI_WR_DATA, 0x19191919},
|
||||
{DSI_WR_DATA, 0x19191919},
|
||||
{DSI_WR_DATA, 0x19},
|
||||
{DSI_TRIGGER, DSI_TRIGGER_HOST},
|
||||
{DSI_WR_DATA, 0xB39},
|
||||
{DSI_WR_DATA, 0x4F0F41B1},
|
||||
{DSI_WR_DATA, 0xF179A433},
|
||||
{DSI_WR_DATA, 0x2D81},
|
||||
{DSI_TRIGGER, DSI_TRIGGER_HOST},
|
||||
{DSI_WR_DATA, 0x439},
|
||||
{DSI_WR_DATA, 0xB9},
|
||||
{DSI_TRIGGER, DSI_TRIGGER_HOST}
|
||||
{DSI_DSI_WR_DATA, 0x439},
|
||||
{DSI_DSI_WR_DATA, 0x9483FFB9},
|
||||
{DSI_DSI_TRIGGER, 2},
|
||||
{DSI_DSI_WR_DATA, 0x2139},
|
||||
{DSI_DSI_WR_DATA, 0x191919D5},
|
||||
{DSI_DSI_WR_DATA, 0x19191919},
|
||||
{DSI_DSI_WR_DATA, 0x19191919},
|
||||
{DSI_DSI_WR_DATA, 0x19191919},
|
||||
{DSI_DSI_WR_DATA, 0x19191919},
|
||||
{DSI_DSI_WR_DATA, 0x19191919},
|
||||
{DSI_DSI_WR_DATA, 0x19191919},
|
||||
{DSI_DSI_WR_DATA, 0x19191919},
|
||||
{DSI_DSI_WR_DATA, 0x19},
|
||||
{DSI_DSI_TRIGGER, 2},
|
||||
{DSI_DSI_WR_DATA, 0xB39},
|
||||
{DSI_DSI_WR_DATA, 0x4F0F41B1},
|
||||
{DSI_DSI_WR_DATA, 0xF179A433},
|
||||
{DSI_DSI_WR_DATA, 0x2D81},
|
||||
{DSI_DSI_TRIGGER, 2},
|
||||
{DSI_DSI_WR_DATA, 0x439},
|
||||
{DSI_DSI_WR_DATA, 0xB9},
|
||||
{DSI_DSI_TRIGGER, 2}
|
||||
};
|
||||
|
||||
//Display A config.
|
||||
static const cfg_op_t cfg_display_one_color[8] = {
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, //Enable window A.
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, //Enable window B.
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, //Enable window C.
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, //DSI_ENABLE
|
||||
{DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY} //DISPLAY_CTRL_MODE: continuous display.
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, 0x10}, //Enable window A.
|
||||
{DC_X_WIN_XD_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, 0x20}, //Enable window B.
|
||||
{DC_X_WIN_XD_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, 0x40}, //Enable window C.
|
||||
{DC_X_WIN_XD_WIN_OPTIONS, 0},
|
||||
{DC_DISP_DISP_WIN_OPTIONS, 0x20000000}, //DSI_ENABLE
|
||||
{DC_CMD_DISPLAY_COMMAND, 0x20} //DISPLAY_CTRL_MODE: continuous display.
|
||||
};
|
||||
|
||||
//Display A config.
|
||||
static const cfg_op_t cfg_display_framebuffer[32] = {
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, //Enable window C.
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, //Enable window B.
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, //Enable window A.
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, //DSI_ENABLE
|
||||
{DC_WIN_COLOR_DEPTH, WIN_COLOR_DEPTH_R8G8B8A8}, //T_A8B8G8R8
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_WIN_POSITION, 0}, //(0,0)
|
||||
{DC_WIN_H_INITIAL_DDA, 0},
|
||||
{DC_WIN_V_INITIAL_DDA, 0},
|
||||
{DC_WIN_PRESCALED_SIZE, V_PRESCALED_SIZE(1280) | H_PRESCALED_SIZE(2880)}, //Pre-scaled size: 1280x2880 bytes.
|
||||
{DC_WIN_DDA_INC, V_DDA_INC(0x1000) | H_DDA_INC(0x1000)},
|
||||
{DC_WIN_SIZE, V_SIZE(1280) | H_SIZE(720)}, //Window size: 1280 vertical lines x 720 horizontal pixels.
|
||||
{DC_WIN_LINE_STRIDE, 0x6000C00}, //768*2x768*4 (= 0x600 x 0xC00) bytes, see TRM for alignment requirements.
|
||||
{DC_WIN_BUFFER_CONTROL, 0},
|
||||
{DC_WINBUF_SURFACE_KIND, 0}, //Regular surface.
|
||||
{DC_WINBUF_START_ADDR, 0xC0000000}, //Framebuffer address.
|
||||
{DC_WINBUF_ADDR_H_OFFSET, 0},
|
||||
{DC_WINBUF_ADDR_V_OFFSET, 0},
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, //DSI_ENABLE
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, //DSI_ENABLE
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, //DSI_ENABLE
|
||||
{DC_WIN_WIN_OPTIONS, WIN_ENABLE}, //Enable window AD.
|
||||
{DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY}, //DISPLAY_CTRL_MODE: continuous display.
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE}, //General update; window A update.
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ} //General activation request; window A activation request.
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, 0x40}, //Enable window C.
|
||||
{DC_X_WIN_XD_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, 0x20}, //Enable window B.
|
||||
{DC_X_WIN_XD_WIN_OPTIONS, 0},
|
||||
{DC_CMD_DISPLAY_WINDOW_HEADER, 0x10}, //Enable window A.
|
||||
{DC_X_WIN_XD_WIN_OPTIONS, 0},
|
||||
{DC_DISP_DISP_WIN_OPTIONS, 0x20000000}, //DSI_ENABLE
|
||||
{DC_X_WIN_XD_COLOR_DEPTH, 0xD}, //T_A8B8G8R8
|
||||
{DC_X_WIN_XD_WIN_OPTIONS, 0},
|
||||
{DC_X_WIN_XD_WIN_OPTIONS, 0},
|
||||
{DC_X_WIN_XD_POSITION, 0}, //(0,0)
|
||||
{DC_X_WIN_XD_H_INITIAL_DDA, 0},
|
||||
{DC_X_WIN_XD_V_INITIAL_DDA, 0},
|
||||
{DC_X_WIN_XD_PRESCALED_SIZE, 0x5000B40}, //Pre-scaled size: 1280x2880 bytes (= 0x500 vertical lines x 0xB40 bytes).
|
||||
{DC_X_WIN_XD_DDA_INCREMENT, 0x10001000},
|
||||
{DC_X_WIN_XD_SIZE, 0x50002D0}, //Window size: 1280x720 (= 0x500 vertical lines x 0x2D0 horizontal pixels).
|
||||
{DC_X_WIN_XD_LINE_STRIDE, 0x6000C00}, //768*2x768*4 (= 0x600 x 0xC00) bytes, see TRM for alignment requirements.
|
||||
{0x702, 0},
|
||||
{DC_X_WINBUF_XD_SURFACE_KIND, 0}, //Regular surface.
|
||||
{DC_X_WINBUF_XD_START_ADDR, 0xC0000000}, //Framebuffer address.
|
||||
{DC_X_WINBUF_XD_ADDR_H_OFFSET, 0},
|
||||
{DC_X_WINBUF_XD_ADDR_V_OFFSET, 0},
|
||||
{DC_X_WIN_XD_WIN_OPTIONS, 0},
|
||||
{DC_DISP_DISP_WIN_OPTIONS, 0x20000000}, //DSI_ENABLE
|
||||
{DC_X_WIN_XD_WIN_OPTIONS, 0},
|
||||
{DC_DISP_DISP_WIN_OPTIONS, 0x20000000}, //DSI_ENABLE
|
||||
{DC_X_WIN_XD_WIN_OPTIONS, 0},
|
||||
{DC_DISP_DISP_WIN_OPTIONS, 0x20000000}, //DSI_ENABLE
|
||||
{DC_X_WIN_XD_WIN_OPTIONS, 0x40000000}, //Enable window AD.
|
||||
{DC_CMD_DISPLAY_COMMAND, 0x20}, //DISPLAY_CTRL_MODE: continuous display.
|
||||
{DC_CMD_STATE_CONTROL, 0x300}, //General update; window A update.
|
||||
{DC_CMD_STATE_CONTROL, 3} //General activation request; window A activation request.
|
||||
};
|
||||
|
||||
213
ipl/ff.c
213
ipl/ff.c
@@ -3,7 +3,6 @@
|
||||
/-----------------------------------------------------------------------------/
|
||||
/
|
||||
/ Copyright (C) 2017, ChaN, all right reserved.
|
||||
/ Copyright (c) 2018 naehrwert
|
||||
/
|
||||
/ FatFs module is an open source software. Redistribution and use of FatFs in
|
||||
/ source and binary forms, with or without modification, are permitted provided
|
||||
@@ -23,11 +22,6 @@
|
||||
#include "ff.h" /* Declarations of FatFs API */
|
||||
#include "diskio.h" /* Declarations of device I/O functions */
|
||||
|
||||
#include "gfx.h"
|
||||
extern gfx_ctxt_t gfx_ctxt;
|
||||
extern gfx_con_t gfx_con;
|
||||
#define EFSPRINTF(text, ...) gfx_printf(&gfx_con, "\n\n\n%k[FatFS] Error: "text"%k\n", 0xFF00FFFF, 0xFFFFFFFF)
|
||||
//#define EFSPRINTF(...)
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
|
||||
@@ -3259,7 +3253,6 @@ FRESULT find_volume ( /* FR_OK(0): successful, !=0: any error occurred */
|
||||
stat = disk_status(fs->pdrv);
|
||||
if (!(stat & STA_NOINIT)) { /* and the physical drive is kept initialized */
|
||||
if (!FF_FS_READONLY && mode && (stat & STA_PROTECT)) { /* Check write protection if needed */
|
||||
EFSPRINTF("Write protected!");
|
||||
return FR_WRITE_PROTECTED;
|
||||
}
|
||||
return FR_OK; /* The filesystem object is valid */
|
||||
@@ -3273,11 +3266,9 @@ FRESULT find_volume ( /* FR_OK(0): successful, !=0: any error occurred */
|
||||
fs->pdrv = LD2PD(vol); /* Bind the logical drive and a physical drive */
|
||||
stat = disk_initialize(fs->pdrv); /* Initialize the physical drive */
|
||||
if (stat & STA_NOINIT) { /* Check if the initialization succeeded */
|
||||
EFSPRINTF("Medium not ready or hard error!");
|
||||
return FR_NOT_READY; /* Failed to initialize due to no medium or hard error */
|
||||
}
|
||||
if (!FF_FS_READONLY && mode && (stat & STA_PROTECT)) { /* Check disk write protection if needed */
|
||||
EFSPRINTF("Write protected!");
|
||||
return FR_WRITE_PROTECTED;
|
||||
}
|
||||
#if FF_MAX_SS != FF_MIN_SS /* Get sector size (multiple sector size cfg only) */
|
||||
@@ -3300,14 +3291,8 @@ FRESULT find_volume ( /* FR_OK(0): successful, !=0: any error occurred */
|
||||
fmt = bsect ? check_fs(fs, bsect) : 3; /* Check the partition */
|
||||
} while (LD2PT(vol) == 0 && fmt >= 2 && ++i < 4);
|
||||
}
|
||||
if (fmt == 4) {
|
||||
EFSPRINTF("Disk I/O error - Could not load boot record!");
|
||||
return FR_DISK_ERR; /* An error occured in the disk I/O layer */
|
||||
}
|
||||
if (fmt >= 2) {
|
||||
EFSPRINTF("No FAT/FAT32/exFAT filesystem found!");
|
||||
return FR_NO_FILESYSTEM; /* No FAT volume is found */
|
||||
}
|
||||
if (fmt == 4) return FR_DISK_ERR; /* An error occured in the disk I/O layer */
|
||||
if (fmt >= 2) return FR_NO_FILESYSTEM; /* No FAT volume is found */
|
||||
|
||||
/* An FAT volume is found (bsect). Following code initializes the filesystem object */
|
||||
|
||||
@@ -3316,70 +3301,42 @@ FRESULT find_volume ( /* FR_OK(0): successful, !=0: any error occurred */
|
||||
QWORD maxlba;
|
||||
|
||||
for (i = BPB_ZeroedEx; i < BPB_ZeroedEx + 53 && fs->win[i] == 0; i++) ; /* Check zero filler */
|
||||
if (i < BPB_ZeroedEx + 53) {
|
||||
EFSPRINTF("exFAT - Zero filler check failed!");
|
||||
return FR_NO_FILESYSTEM;
|
||||
}
|
||||
if (i < BPB_ZeroedEx + 53) return FR_NO_FILESYSTEM;
|
||||
|
||||
if (ld_word(fs->win + BPB_FSVerEx) != 0x100) {
|
||||
EFSPRINTF("exFAT - Version check failed!");
|
||||
return FR_NO_FILESYSTEM; /* Check exFAT version (must be version 1.0) */
|
||||
}
|
||||
if (ld_word(fs->win + BPB_FSVerEx) != 0x100) return FR_NO_FILESYSTEM; /* Check exFAT version (must be version 1.0) */
|
||||
|
||||
if (1 << fs->win[BPB_BytsPerSecEx] != SS(fs)) { /* (BPB_BytsPerSecEx must be equal to the physical sector size) */
|
||||
EFSPRINTF("exFAT - Bytes per sector does not match physical sector size!");
|
||||
return FR_NO_FILESYSTEM;
|
||||
}
|
||||
|
||||
maxlba = ld_qword(fs->win + BPB_TotSecEx) + bsect; /* Last LBA + 1 of the volume */
|
||||
if (maxlba >= 0x100000000) {
|
||||
EFSPRINTF("exFAT - Cannot handle volume LBA with 32-bit LBA!");
|
||||
return FR_NO_FILESYSTEM; /* (It cannot be handled in 32-bit LBA) */
|
||||
}
|
||||
if (maxlba >= 0x100000000) return FR_NO_FILESYSTEM; /* (It cannot be handled in 32-bit LBA) */
|
||||
|
||||
fs->fsize = ld_dword(fs->win + BPB_FatSzEx); /* Number of sectors per FAT */
|
||||
|
||||
fs->n_fats = fs->win[BPB_NumFATsEx]; /* Number of FATs */
|
||||
if (fs->n_fats != 1) {
|
||||
EFSPRINTF("exFAT - Multiple or no file allocation tables found!");
|
||||
return FR_NO_FILESYSTEM; /* (Supports only 1 FAT) */
|
||||
}
|
||||
if (fs->n_fats != 1) return FR_NO_FILESYSTEM; /* (Supports only 1 FAT) */
|
||||
|
||||
fs->csize = 1 << fs->win[BPB_SecPerClusEx]; /* Cluster size */
|
||||
if (fs->csize == 0) {
|
||||
EFSPRINTF("exFAT - Cluster size is not between 1KB - 32KB!");
|
||||
return FR_NO_FILESYSTEM; /* (Must be 1..32768) */
|
||||
}
|
||||
if (fs->csize == 0) return FR_NO_FILESYSTEM; /* (Must be 1..32768) */
|
||||
|
||||
nclst = ld_dword(fs->win + BPB_NumClusEx); /* Number of clusters */
|
||||
if (nclst > MAX_EXFAT) {
|
||||
EFSPRINTF("exFAT - Total clusters exceed allowed!");
|
||||
return FR_NO_FILESYSTEM; /* (Too many clusters) */
|
||||
}
|
||||
if (nclst > MAX_EXFAT) return FR_NO_FILESYSTEM; /* (Too many clusters) */
|
||||
fs->n_fatent = nclst + 2;
|
||||
|
||||
/* Boundaries and Limits */
|
||||
fs->volbase = bsect;
|
||||
fs->database = bsect + ld_dword(fs->win + BPB_DataOfsEx);
|
||||
fs->fatbase = bsect + ld_dword(fs->win + BPB_FatOfsEx);
|
||||
if (maxlba < (QWORD)fs->database + nclst * fs->csize) {
|
||||
EFSPRINTF("exFAT - Volume size is lower than required!");
|
||||
return FR_NO_FILESYSTEM; /* (Volume size must not be smaller than the size required) */
|
||||
}
|
||||
if (maxlba < (QWORD)fs->database + nclst * fs->csize) return FR_NO_FILESYSTEM; /* (Volume size must not be smaller than the size requiered) */
|
||||
fs->dirbase = ld_dword(fs->win + BPB_RootClusEx);
|
||||
|
||||
/* Check if bitmap location is in assumption (at the first cluster) */
|
||||
if (move_window(fs, clst2sect(fs, fs->dirbase)) != FR_OK) {
|
||||
EFSPRINTF("exFAT - Bitmap location not at first cluster!");
|
||||
return FR_DISK_ERR;
|
||||
}
|
||||
if (move_window(fs, clst2sect(fs, fs->dirbase)) != FR_OK) return FR_DISK_ERR;
|
||||
for (i = 0; i < SS(fs); i += SZDIRE) {
|
||||
if (fs->win[i] == 0x81 && ld_dword(fs->win + i + 20) == 2) break; /* 81 entry with cluster #2? */
|
||||
}
|
||||
if (i == SS(fs)) {
|
||||
EFSPRINTF("exFAT - Bitmap allocation is missing!");
|
||||
return FR_NO_FILESYSTEM;
|
||||
}
|
||||
if (i == SS(fs)) return FR_NO_FILESYSTEM;
|
||||
#if !FF_FS_READONLY
|
||||
fs->last_clst = fs->free_clst = 0xFFFFFFFF; /* Initialize cluster allocation information */
|
||||
#endif
|
||||
@@ -3387,62 +3344,38 @@ FRESULT find_volume ( /* FR_OK(0): successful, !=0: any error occurred */
|
||||
} else
|
||||
#endif /* FF_FS_EXFAT */
|
||||
{
|
||||
if (ld_word(fs->win + BPB_BytsPerSec) != SS(fs)) {
|
||||
EFSPRINTF("FAT - Bytes per sector does not match physical sector size!");
|
||||
return FR_NO_FILESYSTEM; /* (BPB_BytsPerSec must be equal to the physical sector size) */
|
||||
}
|
||||
if (ld_word(fs->win + BPB_BytsPerSec) != SS(fs)) return FR_NO_FILESYSTEM; /* (BPB_BytsPerSec must be equal to the physical sector size) */
|
||||
|
||||
fasize = ld_word(fs->win + BPB_FATSz16); /* Number of sectors per FAT */
|
||||
if (fasize == 0) fasize = ld_dword(fs->win + BPB_FATSz32);
|
||||
fs->fsize = fasize;
|
||||
|
||||
fs->n_fats = fs->win[BPB_NumFATs]; /* Number of FATs */
|
||||
if (fs->n_fats != 1 && fs->n_fats != 2) {
|
||||
EFSPRINTF("FAT - No or more than 2 file allocation tables found!");
|
||||
return FR_NO_FILESYSTEM; /* (Must be 1 or 2) */
|
||||
}
|
||||
if (fs->n_fats != 1 && fs->n_fats != 2) return FR_NO_FILESYSTEM; /* (Must be 1 or 2) */
|
||||
fasize *= fs->n_fats; /* Number of sectors for FAT area */
|
||||
|
||||
fs->csize = fs->win[BPB_SecPerClus]; /* Cluster size */
|
||||
if (fs->csize == 0 || (fs->csize & (fs->csize - 1))) {
|
||||
EFSPRINTF("FAT - Cluster size is not a power of 2!");
|
||||
return FR_NO_FILESYSTEM; /* (Must be power of 2) */
|
||||
}
|
||||
if (fs->csize == 0 || (fs->csize & (fs->csize - 1))) return FR_NO_FILESYSTEM; /* (Must be power of 2) */
|
||||
|
||||
fs->n_rootdir = ld_word(fs->win + BPB_RootEntCnt); /* Number of root directory entries */
|
||||
if (fs->n_rootdir % (SS(fs) / SZDIRE)) {
|
||||
EFSPRINTF("FAT - Root directory entries are not sector aligned!");
|
||||
return FR_NO_FILESYSTEM; /* (Must be sector aligned) */
|
||||
}
|
||||
if (fs->n_rootdir % (SS(fs) / SZDIRE)) return FR_NO_FILESYSTEM; /* (Must be sector aligned) */
|
||||
|
||||
tsect = ld_word(fs->win + BPB_TotSec16); /* Number of sectors on the volume */
|
||||
if (tsect == 0) tsect = ld_dword(fs->win + BPB_TotSec32);
|
||||
|
||||
nrsv = ld_word(fs->win + BPB_RsvdSecCnt); /* Number of reserved sectors */
|
||||
if (nrsv == 0) {
|
||||
EFSPRINTF("FAT - Zero reserved sectors!");
|
||||
return FR_NO_FILESYSTEM; /* (Must not be 0) */
|
||||
}
|
||||
if (nrsv == 0) return FR_NO_FILESYSTEM; /* (Must not be 0) */
|
||||
|
||||
/* Determine the FAT sub type */
|
||||
sysect = nrsv + fasize + fs->n_rootdir / (SS(fs) / SZDIRE); /* RSV + FAT + DIR */
|
||||
if (tsect < sysect) {
|
||||
EFSPRINTF("FAT - Invalid volume size!");
|
||||
return FR_NO_FILESYSTEM; /* (Invalid volume size) */
|
||||
}
|
||||
if (tsect < sysect) return FR_NO_FILESYSTEM; /* (Invalid volume size) */
|
||||
nclst = (tsect - sysect) / fs->csize; /* Number of clusters */
|
||||
if (nclst == 0) {
|
||||
EFSPRINTF("FAT - Invalid volume size!");
|
||||
return FR_NO_FILESYSTEM; /* (Invalid volume size) */
|
||||
}
|
||||
if (nclst == 0) return FR_NO_FILESYSTEM; /* (Invalid volume size) */
|
||||
fmt = 0;
|
||||
if (nclst <= MAX_FAT32) fmt = FS_FAT32;
|
||||
if (nclst <= MAX_FAT16) fmt = FS_FAT16;
|
||||
if (nclst <= MAX_FAT12) fmt = FS_FAT12;
|
||||
if (fmt == 0) {
|
||||
EFSPRINTF("FAT - Not compatible FAT12/16/32 filesystem!");
|
||||
return FR_NO_FILESYSTEM;
|
||||
}
|
||||
if (fmt == 0) return FR_NO_FILESYSTEM;
|
||||
|
||||
/* Boundaries and Limits */
|
||||
fs->n_fatent = nclst + 2; /* Number of FAT entries */
|
||||
@@ -3450,29 +3383,17 @@ FRESULT find_volume ( /* FR_OK(0): successful, !=0: any error occurred */
|
||||
fs->fatbase = bsect + nrsv; /* FAT start sector */
|
||||
fs->database = bsect + sysect; /* Data start sector */
|
||||
if (fmt == FS_FAT32) {
|
||||
if (ld_word(fs->win + BPB_FSVer32) != 0) {
|
||||
EFSPRINTF("FAT32 - Not a 0.0 revision!");
|
||||
return FR_NO_FILESYSTEM; /* (Must be FAT32 revision 0.0) */
|
||||
}
|
||||
if (fs->n_rootdir != 0) {
|
||||
EFSPRINTF("FAT32 - Root entry sector is not 0!");
|
||||
return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must be 0) */
|
||||
}
|
||||
if (ld_word(fs->win + BPB_FSVer32) != 0) return FR_NO_FILESYSTEM; /* (Must be FAT32 revision 0.0) */
|
||||
if (fs->n_rootdir != 0) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must be 0) */
|
||||
fs->dirbase = ld_dword(fs->win + BPB_RootClus32); /* Root directory start cluster */
|
||||
szbfat = fs->n_fatent * 4; /* (Needed FAT size) */
|
||||
} else {
|
||||
if (fs->n_rootdir == 0) {
|
||||
EFSPRINTF("FAT - Root entry sector is 0!");
|
||||
return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must not be 0) */
|
||||
}
|
||||
if (fs->n_rootdir == 0) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must not be 0) */
|
||||
fs->dirbase = fs->fatbase + fasize; /* Root directory start sector */
|
||||
szbfat = (fmt == FS_FAT16) ? /* (Needed FAT size) */
|
||||
fs->n_fatent * 2 : fs->n_fatent * 3 / 2 + (fs->n_fatent & 1);
|
||||
}
|
||||
if (fs->fsize < (szbfat + (SS(fs) - 1)) / SS(fs)) {
|
||||
EFSPRINTF("FAT - FAT size is not the required size!");
|
||||
return FR_NO_FILESYSTEM; /* (BPB_FATSz must not be less than the size needed) */
|
||||
}
|
||||
if (fs->fsize < (szbfat + (SS(fs) - 1)) / SS(fs)) return FR_NO_FILESYSTEM; /* (BPB_FATSz must not be less than the size needed) */
|
||||
|
||||
#if !FF_FS_READONLY
|
||||
/* Get FSInfo if available */
|
||||
@@ -3505,7 +3426,7 @@ FRESULT find_volume ( /* FR_OK(0): successful, !=0: any error occurred */
|
||||
#if FF_USE_LFN == 1
|
||||
fs->lfnbuf = LfnBuf; /* Static LFN working buffer */
|
||||
#if FF_FS_EXFAT
|
||||
fs->dirbuf = DirBuf; /* Static directory block scratch-pad buffer */
|
||||
fs->dirbuf = DirBuf; /* Static directory block scratchpad buuffer */
|
||||
#endif
|
||||
#endif
|
||||
#if FF_FS_RPATH != 0
|
||||
@@ -3583,10 +3504,7 @@ FRESULT f_mount (
|
||||
|
||||
/* Get logical drive number */
|
||||
vol = get_ldnumber(&rp);
|
||||
if (vol < 0) {
|
||||
EFSPRINTF("Invalid drive!");
|
||||
return FR_INVALID_DRIVE;
|
||||
}
|
||||
if (vol < 0) return FR_INVALID_DRIVE;
|
||||
cfs = FatFs[vol]; /* Pointer to fs object */
|
||||
|
||||
if (cfs) {
|
||||
@@ -3827,14 +3745,8 @@ FRESULT f_read (
|
||||
|
||||
*br = 0; /* Clear read byte counter */
|
||||
res = validate(&fp->obj, &fs); /* Check validity of the file object */
|
||||
if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) {
|
||||
EFSPRINTF("File object Validation!");
|
||||
LEAVE_FF(fs, res); /* Check validity */
|
||||
}
|
||||
if (!(fp->flag & FA_READ)) {
|
||||
EFSPRINTF("Access denied!");
|
||||
LEAVE_FF(fs, FR_DENIED); /* Check access mode */
|
||||
}
|
||||
if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); /* Check validity */
|
||||
if (!(fp->flag & FA_READ)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */
|
||||
remain = fp->obj.objsize - fp->fptr;
|
||||
if (btr > remain) btr = (UINT)remain; /* Truncate btr by remaining bytes */
|
||||
|
||||
@@ -3855,31 +3767,19 @@ FRESULT f_read (
|
||||
clst = get_fat(&fp->obj, fp->clust); /* Follow cluster chain on the FAT */
|
||||
}
|
||||
}
|
||||
if (clst < 2) {
|
||||
EFSPRINTF("Cluster status check or Internal error!");
|
||||
ABORT(fs, FR_INT_ERR);
|
||||
}
|
||||
if (clst == 0xFFFFFFFF) {
|
||||
EFSPRINTF("Disk error (cluster hard error)!");
|
||||
ABORT(fs, FR_DISK_ERR);
|
||||
}
|
||||
if (clst < 2) ABORT(fs, FR_INT_ERR);
|
||||
if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR);
|
||||
fp->clust = clst; /* Update current cluster */
|
||||
}
|
||||
sect = clst2sect(fs, fp->clust); /* Get current sector */
|
||||
if (sect == 0) {
|
||||
EFSPRINTF("Get current sector error!");
|
||||
ABORT(fs, FR_INT_ERR);
|
||||
}
|
||||
if (sect == 0) ABORT(fs, FR_INT_ERR);
|
||||
sect += csect;
|
||||
cc = btr / SS(fs); /* When remaining bytes >= sector size, */
|
||||
if (cc > 0) { /* Read maximum contiguous sectors directly */
|
||||
if (csect + cc > fs->csize) { /* Clip at cluster boundary */
|
||||
cc = fs->csize - csect;
|
||||
}
|
||||
if (disk_read(fs->pdrv, rbuff, sect, cc) != RES_OK) {
|
||||
EFSPRINTF("Read - Low level disk I/O!");
|
||||
ABORT(fs, FR_DISK_ERR);
|
||||
}
|
||||
if (disk_read(fs->pdrv, rbuff, sect, cc) != RES_OK) ABORT(fs, FR_DISK_ERR);
|
||||
#if !FF_FS_READONLY && FF_FS_MINIMIZE <= 2 /* Replace one of the read sectors with cached data if it contains a dirty sector */
|
||||
#if FF_FS_TINY
|
||||
if (fs->wflag && fs->winsect - sect < cc) {
|
||||
@@ -3898,17 +3798,11 @@ FRESULT f_read (
|
||||
if (fp->sect != sect) { /* Load data sector if not in cache */
|
||||
#if !FF_FS_READONLY
|
||||
if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */
|
||||
if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) {
|
||||
EFSPRINTF("Write-back dirty sector cache!");
|
||||
ABORT(fs, FR_DISK_ERR);
|
||||
}
|
||||
if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR);
|
||||
fp->flag &= (BYTE)~FA_DIRTY;
|
||||
}
|
||||
#endif
|
||||
if (disk_read(fs->pdrv, fp->buf, sect, 1) != RES_OK) {
|
||||
EFSPRINTF("Read - Low level disk I/O!\n(fill sector cache)");
|
||||
ABORT(fs, FR_DISK_ERR); /* Fill sector cache */
|
||||
}
|
||||
if (disk_read(fs->pdrv, fp->buf, sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); /* Fill sector cache */
|
||||
}
|
||||
#endif
|
||||
fp->sect = sect;
|
||||
@@ -3950,14 +3844,8 @@ FRESULT f_write (
|
||||
|
||||
*bw = 0; /* Clear write byte counter */
|
||||
res = validate(&fp->obj, &fs); /* Check validity of the file object */
|
||||
if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) {
|
||||
EFSPRINTF("File object Validation!");
|
||||
LEAVE_FF(fs, res); /* Check validity */
|
||||
}
|
||||
if (!(fp->flag & FA_WRITE)) {
|
||||
EFSPRINTF("Access denied!");
|
||||
LEAVE_FF(fs, FR_DENIED); /* Check access mode */
|
||||
}
|
||||
if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); /* Check validity */
|
||||
if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */
|
||||
|
||||
/* Check fptr wrap-around (file size cannot reach 4 GiB at FAT volume) */
|
||||
if ((!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) && (DWORD)(fp->fptr + btw) < (DWORD)fp->fptr) {
|
||||
@@ -3984,18 +3872,9 @@ FRESULT f_write (
|
||||
clst = create_chain(&fp->obj, fp->clust); /* Follow or stretch cluster chain on the FAT */
|
||||
}
|
||||
}
|
||||
if (clst == 0) {
|
||||
EFSPRINTF("Could not allocate a new cluster\n(disk full or low level disk I/O error)!");
|
||||
break; /* Could not allocate a new cluster (disk full) */
|
||||
}
|
||||
if (clst == 1) {
|
||||
EFSPRINTF("Cluster status check or Internal error!");
|
||||
ABORT(fs, FR_INT_ERR);
|
||||
}
|
||||
if (clst == 0xFFFFFFFF) {
|
||||
EFSPRINTF("Disk error (cluster hard error)!");
|
||||
ABORT(fs, FR_DISK_ERR);
|
||||
}
|
||||
if (clst == 0) break; /* Could not allocate a new cluster (disk full) */
|
||||
if (clst == 1) ABORT(fs, FR_INT_ERR);
|
||||
if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR);
|
||||
fp->clust = clst; /* Update current cluster */
|
||||
if (fp->obj.sclust == 0) fp->obj.sclust = clst; /* Set start cluster if the first write */
|
||||
}
|
||||
@@ -4003,28 +3882,19 @@ FRESULT f_write (
|
||||
if (fs->winsect == fp->sect && sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Write-back sector cache */
|
||||
#else
|
||||
if (fp->flag & FA_DIRTY) { /* Write-back sector cache */
|
||||
if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) {
|
||||
EFSPRINTF("Write-back sector cache!");
|
||||
ABORT(fs, FR_DISK_ERR);
|
||||
}
|
||||
if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR);
|
||||
fp->flag &= (BYTE)~FA_DIRTY;
|
||||
}
|
||||
#endif
|
||||
sect = clst2sect(fs, fp->clust); /* Get current sector */
|
||||
if (sect == 0) {
|
||||
EFSPRINTF("Get current sector error!");
|
||||
ABORT(fs, FR_INT_ERR);
|
||||
}
|
||||
if (sect == 0) ABORT(fs, FR_INT_ERR);
|
||||
sect += csect;
|
||||
cc = btw / SS(fs); /* When remaining bytes >= sector size, */
|
||||
if (cc > 0) { /* Write maximum contiguous sectors directly */
|
||||
if (csect + cc > fs->csize) { /* Clip at cluster boundary */
|
||||
cc = fs->csize - csect;
|
||||
}
|
||||
if (disk_write(fs->pdrv, wbuff, sect, cc) != RES_OK) {
|
||||
EFSPRINTF("Write - Low level disk I/O!");
|
||||
ABORT(fs, FR_DISK_ERR);
|
||||
}
|
||||
if (disk_write(fs->pdrv, wbuff, sect, cc) != RES_OK) ABORT(fs, FR_DISK_ERR);
|
||||
#if FF_FS_MINIMIZE <= 2
|
||||
#if FF_FS_TINY
|
||||
if (fs->winsect - sect < cc) { /* Refill sector cache if it gets invalidated by the direct write */
|
||||
@@ -4050,7 +3920,6 @@ FRESULT f_write (
|
||||
if (fp->sect != sect && /* Fill sector cache with file data */
|
||||
fp->fptr < fp->obj.objsize &&
|
||||
disk_read(fs->pdrv, fp->buf, sect, 1) != RES_OK) {
|
||||
EFSPRINTF("Read - Low level disk I/O!\n(Could not fill sector cache with file data)");
|
||||
ABORT(fs, FR_DISK_ERR);
|
||||
}
|
||||
#endif
|
||||
|
||||
102
ipl/gfx.c
102
ipl/gfx.c
@@ -65,7 +65,6 @@ static const u8 _gfx_font[] = {
|
||||
0x00, 0x00, 0x66, 0x3C, 0x18, 0x3C, 0x66, 0x00, 0x00, 0x00, 0x66, 0x66, 0x7C, 0x60, 0x3C, 0x00,
|
||||
0x00, 0x00, 0x7E, 0x30, 0x18, 0x0C, 0x7E, 0x00, 0x00, 0x00, 0x18, 0x08, 0x08, 0x04, 0x08, 0x08,
|
||||
0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00, 0x0C, 0x08, 0x08, 0x10, 0x08, 0x08,
|
||||
0x00, 0x00, 0x00, 0x4c, 0x32, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
void gfx_init_ctxt(gfx_ctxt_t *ctxt, u32 *fb, u32 width, u32 height, u32 stride)
|
||||
@@ -82,21 +81,14 @@ void gfx_clear(gfx_ctxt_t *ctxt, u32 color)
|
||||
ctxt->fb[i] = color;
|
||||
}
|
||||
|
||||
void gfx_con_setfontsz(gfx_con_t *con, u8 font_size)
|
||||
{
|
||||
con->fntsz = font_size;
|
||||
con->fontmult = font_size / 8;
|
||||
}
|
||||
|
||||
void gfx_con_init(gfx_con_t *con, gfx_ctxt_t *ctxt)
|
||||
{
|
||||
con->gfx_ctxt = ctxt;
|
||||
con->x = 0;
|
||||
con->y = 0;
|
||||
con->fgcol = 0xFFCCCCCC;
|
||||
con->fgcol = 0xFFFFFFFF;
|
||||
con->fillbg = 0;
|
||||
con->bgcol = 0xFF1B1B1B;
|
||||
gfx_con_setfontsz(con, 16);
|
||||
con->bgcol = 0xFF000000;
|
||||
}
|
||||
|
||||
void gfx_con_setcol(gfx_con_t *con, u32 fgcol, int fillbg, u32 bgcol)
|
||||
@@ -120,49 +112,31 @@ void gfx_con_setpos(gfx_con_t *con, u32 x, u32 y)
|
||||
|
||||
void gfx_putc(gfx_con_t *con, char c)
|
||||
{
|
||||
if (c >= 32 && c <= 126)
|
||||
if (c >= 32 && c < 128)
|
||||
{
|
||||
u8 *cbuf = (u8 *)&_gfx_font[8 * (c - 32)];
|
||||
u32 *fb = con->gfx_ctxt->fb + con->x + con->y * con->gfx_ctxt->stride;
|
||||
for (u32 i = 0; i < con->fntsz; i+=con->fontmult)
|
||||
for (u32 i = 0; i < 8; i++)
|
||||
{
|
||||
u8 v = *cbuf++;
|
||||
for (u32 k = 0; k < con->fontmult; k++)
|
||||
for (u32 j = 0; j < 8; j++)
|
||||
{
|
||||
for (u32 j = 0; j < con->fntsz; j+=con->fontmult)
|
||||
{
|
||||
if (v & 1)
|
||||
{
|
||||
*fb = con->fgcol;
|
||||
for(u32 l = 0; l < con->fontmult - 1; l++)
|
||||
{
|
||||
fb++;
|
||||
*fb = con->fgcol;
|
||||
}
|
||||
}
|
||||
else if (con->fillbg)
|
||||
{
|
||||
*fb = con->bgcol;
|
||||
for(u32 l = 0; l < con->fontmult - 1; l++)
|
||||
{
|
||||
fb++;
|
||||
*fb = con->bgcol;
|
||||
}
|
||||
}
|
||||
v >>= 1;
|
||||
fb++;
|
||||
}
|
||||
fb += con->gfx_ctxt->stride - con->fntsz;
|
||||
v = *cbuf;
|
||||
if (v & 1)
|
||||
*fb = con->fgcol;
|
||||
else if (con->fillbg)
|
||||
*fb = con->bgcol;
|
||||
v >>= 1;
|
||||
fb++;
|
||||
}
|
||||
fb += con->gfx_ctxt->stride - 8;
|
||||
}
|
||||
con->x += con->fntsz;
|
||||
con->x += 8;
|
||||
}
|
||||
else if (c == '\n')
|
||||
{
|
||||
con->x = 0;
|
||||
con->y += con->fntsz;
|
||||
if (con->y > con->gfx_ctxt->height - con->fntsz)
|
||||
con->y += 8;
|
||||
if (con->y > con->gfx_ctxt->height - 8)
|
||||
con->y = 0;
|
||||
}
|
||||
}
|
||||
@@ -207,13 +181,6 @@ static void _gfx_putn(gfx_con_t *con, u32 v, int base, char fill, int fcnt)
|
||||
gfx_puts(con, p);
|
||||
}
|
||||
|
||||
void gfx_putsep(gfx_con_t *con)
|
||||
{
|
||||
gfx_con_setfontsz(con, 8);
|
||||
gfx_putc(con, '\n');
|
||||
gfx_con_setfontsz(con, 16);
|
||||
}
|
||||
|
||||
void gfx_printf(gfx_con_t *con, const char *fmt, ...)
|
||||
{
|
||||
va_list ap;
|
||||
@@ -287,8 +254,6 @@ void gfx_printf(gfx_con_t *con, const char *fmt, ...)
|
||||
|
||||
void gfx_hexdump(gfx_con_t *con, u32 base, const u8 *buf, u32 len)
|
||||
{
|
||||
u8 prevFontSize = con->fntsz;
|
||||
gfx_con_setfontsz(con, 8);
|
||||
for(u32 i = 0; i < len; i++)
|
||||
{
|
||||
if(i % 0x10 == 0)
|
||||
@@ -299,7 +264,7 @@ void gfx_hexdump(gfx_con_t *con, u32 base, const u8 *buf, u32 len)
|
||||
for(u32 j = 0; j < 0x10; j++)
|
||||
{
|
||||
u8 c = buf[i - 0x10 + j];
|
||||
if(c >= 32 && c <= 126)
|
||||
if(c >= 32 && c < 128)
|
||||
gfx_putc(con, c);
|
||||
else
|
||||
gfx_putc(con, '.');
|
||||
@@ -309,30 +274,8 @@ void gfx_hexdump(gfx_con_t *con, u32 base, const u8 *buf, u32 len)
|
||||
gfx_printf(con, "%08x: ", base + i);
|
||||
}
|
||||
gfx_printf(con, "%02x ", buf[i]);
|
||||
if (i == len - 1)
|
||||
{
|
||||
int ln = len % 0x10 != 0;
|
||||
u32 k = 0x10 - 1;
|
||||
if (ln)
|
||||
{
|
||||
k = len & 0xF - 1;
|
||||
for (u32 j = 0; j < 0x10 - k; j++)
|
||||
gfx_puts(con, " ");
|
||||
}
|
||||
gfx_puts(con, "| ");
|
||||
for(u32 j = 0; j < (ln ? k : k + 1); j++)
|
||||
{
|
||||
u8 c = buf[i - k + j];
|
||||
if(c >= 32 && c <= 126)
|
||||
gfx_putc(con, c);
|
||||
else
|
||||
gfx_putc(con, '.');
|
||||
}
|
||||
gfx_putc(con, '\n');
|
||||
}
|
||||
}
|
||||
gfx_putc(con, '\n');
|
||||
gfx_con_setfontsz(con, prevFontSize);
|
||||
}
|
||||
|
||||
static int abs(int x)
|
||||
@@ -363,16 +306,3 @@ void gfx_line(gfx_ctxt_t *ctxt, int x0, int y0, int x1, int y1, u32 color)
|
||||
if (e2 < dy) { err += dx; y0 += sy; }
|
||||
}
|
||||
}
|
||||
|
||||
void gfx_set_logo(gfx_ctxt_t *ctxt, const u8 *buf)
|
||||
{
|
||||
u32 pos = 0;
|
||||
for (u32 y = 1180; y < 1256; y++)
|
||||
{
|
||||
for (u32 x = 538; x < 696; x++)
|
||||
{
|
||||
ctxt->fb[x + y*ctxt->stride] = (0xFF << 24) | buf[pos] | (buf[pos + 1] << 8) | (buf[pos + 2] << 16);
|
||||
pos+=3;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -35,8 +35,6 @@ typedef struct _gfx_con_t
|
||||
u32 fgcol;
|
||||
int fillbg;
|
||||
u32 bgcol;
|
||||
u32 fntsz;
|
||||
u32 fontmult;
|
||||
} gfx_con_t;
|
||||
|
||||
void gfx_init_ctxt(gfx_ctxt_t *ctxt, u32 *fb, u32 width, u32 height, u32 stride);
|
||||
@@ -45,7 +43,6 @@ void gfx_con_init(gfx_con_t *con, gfx_ctxt_t *ctxt);
|
||||
void gfx_con_setcol(gfx_con_t *con, u32 fgcol, int fillbg, u32 bgcol);
|
||||
void gfx_con_getpos(gfx_con_t *con, u32 *x, u32 *y);
|
||||
void gfx_con_setpos(gfx_con_t *con, u32 x, u32 y);
|
||||
void gfx_con_setfontsz(gfx_con_t *con, u8 font_size);
|
||||
void gfx_putc(gfx_con_t *con, char c);
|
||||
void gfx_puts(gfx_con_t *con, const char *s);
|
||||
void gfx_printf(gfx_con_t *con, const char *fmt, ...);
|
||||
@@ -53,7 +50,5 @@ void gfx_hexdump(gfx_con_t *con, u32 base, const u8 *buf, u32 len);
|
||||
|
||||
void gfx_set_pixel(gfx_ctxt_t *ctxt, u32 x, u32 y, u32 color);
|
||||
void gfx_line(gfx_ctxt_t *ctxt, int x0, int y0, int x1, int y1, u32 color);
|
||||
void gfx_putsep(gfx_con_t *con);
|
||||
void gfx_set_logo(gfx_ctxt_t *ctxt, const u8 *buf);
|
||||
|
||||
#endif
|
||||
|
||||
362
ipl/hos.c
362
ipl/hos.c
@@ -32,21 +32,12 @@
|
||||
#include "pkg2.h"
|
||||
#include "ff.h"
|
||||
|
||||
#include "gfx.h"
|
||||
/*#include "gfx.h"
|
||||
extern gfx_ctxt_t gfx_ctxt;
|
||||
extern gfx_con_t gfx_con;
|
||||
//#define DPRINTF(...) gfx_printf(&gfx_con, __VA_ARGS__)
|
||||
#define DPRINTF(...) gfx_printf(&gfx_con, __VA_ARGS__)*/
|
||||
#define DPRINTF(...)
|
||||
|
||||
enum KB_FIRMWARE_VERSION {
|
||||
KB_FIRMWARE_VERSION_100_200 = 0,
|
||||
KB_FIRMWARE_VERSION_300 = 1,
|
||||
KB_FIRMWARE_VERSION_301 = 2,
|
||||
KB_FIRMWARE_VERSION_400 = 3,
|
||||
KB_FIRMWARE_VERSION_500 = 4,
|
||||
KB_FIRMWARE_VERSION_MAX
|
||||
};
|
||||
|
||||
#define NUM_KEYBLOB_KEYS 5
|
||||
static const u8 keyblob_keyseeds[NUM_KEYBLOB_KEYS][0x10] = {
|
||||
{ 0xDF, 0x20, 0x6F, 0x59, 0x44, 0x54, 0xEF, 0xDC, 0x70, 0x74, 0x48, 0x3B, 0x0D, 0xED, 0x9F, 0xD3 }, //1.0.0
|
||||
@@ -59,19 +50,19 @@ static const u8 keyblob_keyseeds[NUM_KEYBLOB_KEYS][0x10] = {
|
||||
static const u8 cmac_keyseed[0x10] =
|
||||
{ 0x59, 0xC7, 0xFB, 0x6F, 0xBE, 0x9B, 0xBE, 0x87, 0x65, 0x6B, 0x15, 0xC0, 0x53, 0x73, 0x36, 0xA5 };
|
||||
|
||||
static const u8 master_keyseed_retail[0x10] =
|
||||
static const u8 mkey_keyseed_retail[0x10] =
|
||||
{ 0xD8, 0xA2, 0x41, 0x0A, 0xC6, 0xC5, 0x90, 0x01, 0xC6, 0x1D, 0x6A, 0x26, 0x7C, 0x51, 0x3F, 0x3C };
|
||||
|
||||
static const u8 console_keyseed[0x10] =
|
||||
static const u8 ckey_keyseed[0x10] =
|
||||
{ 0x4F, 0x02, 0x5F, 0x0E, 0xB6, 0x6D, 0x11, 0x0E, 0xDC, 0x32, 0x7D, 0x41, 0x86, 0xC2, 0xF4, 0x78 };
|
||||
|
||||
static const u8 key8_keyseed[] =
|
||||
{ 0xFB, 0x8B, 0x6A, 0x9C, 0x79, 0x00, 0xC8, 0x49, 0xEF, 0xD2, 0x4D, 0x85, 0x4D, 0x30, 0xA0, 0xC7 };
|
||||
|
||||
static const u8 master_keyseed_4xx[0x10] =
|
||||
static const u8 new_masterkey_seed[0x10] =
|
||||
{ 0x2D, 0xC1, 0xF4, 0x8D, 0xF3, 0x5B, 0x69, 0x33, 0x42, 0x10, 0xAC, 0x65, 0xDA, 0x90, 0x46, 0x66 };
|
||||
|
||||
static const u8 console_keyseed_4xx[0x10] =
|
||||
static const u8 new_per_console_key[0x10] =
|
||||
{ 0x0C, 0x91, 0x09, 0xDB, 0x93, 0x93, 0x07, 0x81, 0x07, 0x3C, 0xC4, 0x16, 0x22, 0x7C, 0x6C, 0x28 };
|
||||
|
||||
|
||||
@@ -103,27 +94,18 @@ static void _se_lock()
|
||||
}
|
||||
|
||||
// <-- key derivation algorithm
|
||||
int keygen(u8 *keyblob, u32 kb, void *tsec_fw)
|
||||
static int keygen(u8 *keyblob, u32 kb, void *tsec_fw)
|
||||
{
|
||||
u8 tmp[0x10];
|
||||
u8 *tmp = (u8 *)malloc(0x10);
|
||||
|
||||
se_key_acc_ctrl(0x0D, 0x15);
|
||||
se_key_acc_ctrl(0x0E, 0x15);
|
||||
se_key_acc_ctrl(12, 0x15);
|
||||
se_key_acc_ctrl(13, 0x15);
|
||||
|
||||
//Get TSEC key.
|
||||
if (tsec_query(tmp, 1, tsec_fw) < 0)
|
||||
return 0;
|
||||
|
||||
se_aes_key_set(0x0D, tmp, 0x10);
|
||||
|
||||
//Derive keyblob keys from TSEC+SBK.
|
||||
se_aes_crypt_block_ecb(0x0D, 0x00, tmp, keyblob_keyseeds[0]);
|
||||
se_aes_unwrap_key(0x0F, 0x0E, tmp);
|
||||
se_aes_crypt_block_ecb(0xD, 0x00, tmp, keyblob_keyseeds[kb]);
|
||||
se_aes_unwrap_key(0x0D, 0x0E, tmp);
|
||||
|
||||
// Clear SBK
|
||||
se_aes_key_clear(0x0E);
|
||||
se_aes_key_set(13, tmp, 0x10);
|
||||
|
||||
//TODO: verify keyblob CMAC.
|
||||
//se_aes_unwrap_key(11, 13, cmac_keyseed);
|
||||
@@ -131,44 +113,131 @@ int keygen(u8 *keyblob, u32 kb, void *tsec_fw)
|
||||
//if (!memcmp(keyblob, tmp, 0x10))
|
||||
// return 0;
|
||||
|
||||
se_aes_crypt_block_ecb(0x0D, 0, tmp, cmac_keyseed);
|
||||
se_aes_unwrap_key(0x0B, 0x0D, cmac_keyseed);
|
||||
switch(kb) {
|
||||
// 1.0.0~2.0.0 FW
|
||||
case 0: {
|
||||
|
||||
//Decrypt keyblob and set keyslots.
|
||||
se_aes_crypt_ctr(0x0D, keyblob + 0x20, 0x90, keyblob + 0x20, 0x90, keyblob + 0x10);
|
||||
se_aes_key_set(0x0B, keyblob + 0x20 + 0x80, 0x10); // package1 key
|
||||
se_aes_key_set(0x0C, keyblob + 0x20, 0x10);
|
||||
se_aes_key_set(0x0D, keyblob + 0x20, 0x10);
|
||||
//Derive keyblob key from TSEC+SBK.
|
||||
memcpy(tmp, keyblob_keyseeds[kb], 0x10);
|
||||
se_aes_crypt_block_ecb(13, 0, tmp, tmp);
|
||||
se_aes_unwrap_key(13, 14, tmp);
|
||||
se_aes_key_clear(14);
|
||||
|
||||
se_aes_crypt_block_ecb(0x0C, 0, tmp, master_keyseed_retail);
|
||||
se_aes_crypt_ctr(13, keyblob + 0x20, 0x90, keyblob + 0x20, 0x90, keyblob + 0x10);
|
||||
se_aes_key_set(11, keyblob + 0x20 + 0x80, 0x10);
|
||||
se_aes_key_set(12, keyblob + 0x20, 0x10);
|
||||
|
||||
switch (kb) {
|
||||
case KB_FIRMWARE_VERSION_100_200:
|
||||
case KB_FIRMWARE_VERSION_300:
|
||||
case KB_FIRMWARE_VERSION_301:
|
||||
se_aes_unwrap_key(0x0D, 0x0F, console_keyseed);
|
||||
se_aes_unwrap_key(0x0C, 0x0C, master_keyseed_retail);
|
||||
//TODO: for some reason SE likes to hang if we don't execute an operation here.
|
||||
memcpy(tmp, mkey_keyseed_retail, 0x10);
|
||||
se_aes_crypt_block_ecb(12, 0, tmp, tmp);
|
||||
|
||||
//Generate retail master key.
|
||||
memcpy(tmp, mkey_keyseed_retail, 0x10);
|
||||
se_aes_unwrap_key(12, 12, tmp);
|
||||
|
||||
//Generate console specific key.
|
||||
memcpy(tmp, ckey_keyseed, 0x10);
|
||||
se_aes_unwrap_key(13, 13, tmp);
|
||||
|
||||
memcpy(tmp, key8_keyseed, 0x10);
|
||||
se_key_acc_ctrl(8, 0x15);
|
||||
se_aes_unwrap_key(8, 12, tmp);
|
||||
|
||||
se_key_acc_ctrl(12, 0xFF);
|
||||
se_key_acc_ctrl(13, 0xFF);
|
||||
}
|
||||
break;
|
||||
// 3.0.0~3.0.1 FW
|
||||
case 1:
|
||||
case 2: {
|
||||
|
||||
// keyslot 10
|
||||
memcpy(tmp, keyblob_keyseeds[0], 0x10);
|
||||
se_aes_crypt_block_ecb(13, 0, tmp, tmp);
|
||||
se_aes_unwrap_key(10, 14, tmp);
|
||||
|
||||
// keyslot 13
|
||||
memcpy(tmp, keyblob_keyseeds[kb], 0x10);
|
||||
se_aes_crypt_block_ecb(13, 0, tmp, tmp);
|
||||
se_aes_unwrap_key(13, 14, tmp);
|
||||
|
||||
se_aes_key_clear(14);
|
||||
se_aes_key_clear(15);
|
||||
|
||||
se_aes_crypt_ctr(13, keyblob + 0x20, 0x90, keyblob + 0x20, 0x90, keyblob + 0x10);
|
||||
se_aes_key_set(11, keyblob + 0x20 + 0x80, 0x10);
|
||||
se_aes_key_set(12, keyblob + 0x20, 0x10);
|
||||
|
||||
//TODO: for some reason SE likes to hang if we don't execute an operation here.
|
||||
memcpy(tmp, mkey_keyseed_retail, 0x10);
|
||||
se_aes_crypt_block_ecb(12, 0, tmp, tmp);
|
||||
|
||||
//Generate retail master key.
|
||||
memcpy(tmp, mkey_keyseed_retail, 0x10);
|
||||
se_aes_unwrap_key(12, 12, tmp);
|
||||
|
||||
//Generate console specific key.
|
||||
memcpy(tmp, ckey_keyseed, 0x10);
|
||||
se_aes_unwrap_key(13, 10, tmp);
|
||||
se_aes_key_clear(10);
|
||||
|
||||
memcpy(tmp, key8_keyseed, 0x10);
|
||||
se_key_acc_ctrl(8, 0x15);
|
||||
se_aes_unwrap_key(8, 12, tmp);
|
||||
|
||||
se_key_acc_ctrl(12, 0xFF);
|
||||
se_key_acc_ctrl(13, 0xFF);
|
||||
}
|
||||
break;
|
||||
|
||||
case KB_FIRMWARE_VERSION_400:
|
||||
se_aes_unwrap_key(0x0D, 0x0F, console_keyseed_4xx);
|
||||
se_aes_unwrap_key(0x0F, 0x0F, console_keyseed);
|
||||
se_aes_unwrap_key(0x0E, 0x0C, master_keyseed_4xx);
|
||||
se_aes_unwrap_key(0x0C, 0x0C, master_keyseed_retail);
|
||||
break;
|
||||
// 4.0.0~5.0.1 FW
|
||||
case 3:
|
||||
case 4: {
|
||||
se_key_acc_ctrl(14, 0x15);
|
||||
se_key_acc_ctrl(15, 0x15);
|
||||
|
||||
case KB_FIRMWARE_VERSION_500:
|
||||
default:
|
||||
se_aes_unwrap_key(0x0A, 0x0F, console_keyseed_4xx);
|
||||
se_aes_unwrap_key(0x0F, 0x0F, console_keyseed);
|
||||
se_aes_unwrap_key(0x0E, 0x0C, master_keyseed_4xx);
|
||||
se_aes_unwrap_key(0x0C, 0x0C, master_keyseed_retail);
|
||||
// keyslot 15
|
||||
memcpy(tmp, keyblob_keyseeds[0], 0x10);
|
||||
se_aes_crypt_block_ecb(13, 0, tmp, tmp);
|
||||
se_aes_unwrap_key(15, 14, tmp);
|
||||
|
||||
// keyslot 13
|
||||
memcpy(tmp, keyblob_keyseeds[kb], 0x10);
|
||||
se_aes_crypt_block_ecb(13, 0, tmp, tmp);
|
||||
se_aes_unwrap_key(13, 14, tmp);
|
||||
|
||||
se_aes_key_clear(14);
|
||||
|
||||
se_aes_crypt_ctr(13, keyblob + 0x20, 0x90, keyblob + 0x20, 0x90, keyblob + 0x10);
|
||||
se_aes_key_set(11, keyblob + 0x20 + 0x80, 0x10);
|
||||
se_aes_key_set(12, keyblob + 0x20, 0x10);
|
||||
|
||||
//TODO: for some reason SE likes to hang if we don't execute an operation here.
|
||||
memcpy(tmp, mkey_keyseed_retail, 0x10);
|
||||
se_aes_crypt_block_ecb(12, 0, tmp, tmp);
|
||||
|
||||
// keyslot 14
|
||||
memcpy(tmp, new_masterkey_seed, 0x10);
|
||||
se_aes_unwrap_key(14, 12, tmp);
|
||||
|
||||
// keyslot 12
|
||||
memcpy(tmp, mkey_keyseed_retail, 0x10);
|
||||
se_aes_unwrap_key(12, 12, tmp);
|
||||
|
||||
// keyslot 13
|
||||
memcpy(tmp, new_per_console_key, 0x10);
|
||||
se_aes_unwrap_key(13, 15, tmp);
|
||||
|
||||
// keyslot 15
|
||||
memcpy(tmp, ckey_keyseed, 0x10);
|
||||
se_aes_unwrap_key(15, 13, tmp);
|
||||
|
||||
se_key_acc_ctrl(12, 0xFF);
|
||||
se_key_acc_ctrl(15, 0xFF);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
// Package2 key
|
||||
se_key_acc_ctrl(0x08, 0x15);
|
||||
se_aes_unwrap_key(0x08, 0x0C, key8_keyseed);
|
||||
free(tmp);
|
||||
}
|
||||
|
||||
|
||||
@@ -190,9 +259,6 @@ typedef struct _launch_ctxt_t
|
||||
void *kernel;
|
||||
u32 kernel_size;
|
||||
link_t kip1_list;
|
||||
|
||||
u8 *svcperm;
|
||||
u8 *debugmode;
|
||||
} launch_ctxt_t;
|
||||
|
||||
typedef struct _merge_kip_t
|
||||
@@ -216,10 +282,10 @@ static int _read_emmc_pkg1(launch_ctxt_t *ctxt)
|
||||
ctxt->pkg1_id = pkg1_identify(ctxt->pkg1);
|
||||
if (!ctxt->pkg1_id)
|
||||
{
|
||||
gfx_printf(&gfx_con, "%kCould not identify package1,\nVersion (= '%s').%k\n", 0xFF0000FF, (char *)ctxt->pkg1 + 0x10, 0xFFFFFFFF);
|
||||
DPRINTF("%kCould not identify package 1 version (= '%s').%k\n", 0xFF0000FF, (char *)ctxt->pkg1 + 0x10, 0xFFFFFFFF);
|
||||
goto out;
|
||||
}
|
||||
gfx_printf(&gfx_con, "Identified package1 ('%s'),\nKeyblob version %d\n\n", (char *)(ctxt->pkg1 + 0x10), ctxt->pkg1_id->kb);
|
||||
DPRINTF("Identified package1 ('%s'), keyblob version %d\n", (char *)(ctxt->pkg1 + 0x10), ctxt->pkg1_id->kb);
|
||||
|
||||
//Read the correct keyblob.
|
||||
ctxt->keyblob = (u8 *)malloc(NX_EMMC_BLOCKSIZE);
|
||||
@@ -244,7 +310,7 @@ static int _read_emmc_pkg2(launch_ctxt_t *ctxt)
|
||||
//Parse eMMC GPT.
|
||||
LIST_INIT(gpt);
|
||||
nx_emmc_gpt_parse(&gpt, &storage);
|
||||
DPRINTF("Parsed GPT\n");
|
||||
DPRINTF("parsed GPT\n");
|
||||
//Find package2 partition.
|
||||
emmc_part_t *pkg2_part = nx_emmc_part_find(&gpt, "BCPKG2-1-Normal-Main");
|
||||
if (!pkg2_part)
|
||||
@@ -257,10 +323,10 @@ static int _read_emmc_pkg2(launch_ctxt_t *ctxt)
|
||||
u32 *hdr = (u32 *)(tmp + 0x100);
|
||||
u32 pkg2_size = hdr[0] ^ hdr[2] ^ hdr[3];
|
||||
free(tmp);
|
||||
DPRINTF("pkg2 size on emmc is %08X\n", pkg2_size);
|
||||
DPRINTF("pkg2 size on emmc is %08X\n", pkg2_size);
|
||||
//Read in package2.
|
||||
u32 pkg2_size_aligned = ALIGN(pkg2_size, NX_EMMC_BLOCKSIZE);
|
||||
DPRINTF("pkg2 size aligned is %08X\n", pkg2_size_aligned);
|
||||
DPRINTF("pkg2 size aligned is %08X\n", pkg2_size_aligned);
|
||||
ctxt->pkg2 = malloc(pkg2_size_aligned);
|
||||
ctxt->pkg2_size = pkg2_size;
|
||||
nx_emmc_part_read(&storage, pkg2_part, 0x4000 / NX_EMMC_BLOCKSIZE,
|
||||
@@ -318,32 +384,12 @@ static int _config_kip1(launch_ctxt_t *ctxt, const char *value)
|
||||
merge_kip_t *mkip1 = (merge_kip_t *)malloc(sizeof(merge_kip_t));
|
||||
mkip1->kip1 = malloc(f_size(&fp));
|
||||
f_read(&fp, mkip1->kip1, f_size(&fp), NULL);
|
||||
DPRINTF("Loaded kip1 from SD (size %08X)\n", f_size(&fp));
|
||||
DPRINTF("loaded kip from SD (size %08X)\n", f_size(&fp));
|
||||
f_close(&fp);
|
||||
list_append(&ctxt->kip1_list, &mkip1->link);
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int _config_svcperm(launch_ctxt_t *ctxt, const char *value)
|
||||
{
|
||||
if (*(u8 *)value == '1')
|
||||
{
|
||||
DPRINTF("Disabled SVC verification\n");
|
||||
ctxt->svcperm = malloc(1);
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int _config_debugmode(launch_ctxt_t *ctxt, const char *value)
|
||||
{
|
||||
if (*(u8 *)value == '1')
|
||||
{
|
||||
DPRINTF("Enabled Debug mode\n");
|
||||
ctxt->debugmode = malloc(1);
|
||||
}
|
||||
}
|
||||
|
||||
typedef struct _cfg_handler_t
|
||||
{
|
||||
const char *key;
|
||||
@@ -355,8 +401,6 @@ static const cfg_handler_t _config_handlers[] = {
|
||||
{ "secmon", _config_secmon },
|
||||
{ "kernel", _config_kernel },
|
||||
{ "kip1", _config_kip1 },
|
||||
{ "fullsvcperm", _config_svcperm },
|
||||
{ "debugmode", _config_debugmode },
|
||||
{ NULL, NULL },
|
||||
};
|
||||
|
||||
@@ -372,41 +416,39 @@ static int _config(launch_ctxt_t *ctxt, ini_sec_t *cfg)
|
||||
|
||||
int hos_launch(ini_sec_t *cfg)
|
||||
{
|
||||
int bootStatePackage2;
|
||||
int bootStateContinue;
|
||||
launch_ctxt_t ctxt;
|
||||
memset(&ctxt, 0, sizeof(launch_ctxt_t));
|
||||
list_init(&ctxt.kip1_list);
|
||||
|
||||
gfx_clear(&gfx_ctxt, 0xFF1B1B1B);
|
||||
gfx_con_setpos(&gfx_con, 0, 0);
|
||||
|
||||
if (cfg && !_config(&ctxt, cfg))
|
||||
return 0;
|
||||
|
||||
gfx_printf(&gfx_con, "Initializing...\n\n");
|
||||
|
||||
//Read package1 and the correct keyblob.
|
||||
if (!_read_emmc_pkg1(&ctxt))
|
||||
return 0;
|
||||
|
||||
gfx_printf(&gfx_con, "Loaded package1 and keyblob\n");
|
||||
//XXX: remove this once we support 3+.
|
||||
//if (ctxt.pkg1_id->kb > 0)
|
||||
// return 0;
|
||||
|
||||
DPRINTF("loaded pkg1 and keyblob\n");
|
||||
//Generate keys.
|
||||
keygen(ctxt.keyblob, ctxt.pkg1_id->kb, (u8 *)ctxt.pkg1 + ctxt.pkg1_id->tsec_off);
|
||||
DPRINTF("Generated keys\n");
|
||||
DPRINTF("generated keys\n");
|
||||
//Decrypt and unpack package1 if we require parts of it.
|
||||
if (!ctxt.warmboot || !ctxt.secmon)
|
||||
{
|
||||
pkg1_decrypt(ctxt.pkg1_id, ctxt.pkg1);
|
||||
pkg1_unpack((void *)ctxt.pkg1_id->warmboot_base, (void *)ctxt.pkg1_id->secmon_base, ctxt.pkg1_id, ctxt.pkg1);
|
||||
gfx_printf(&gfx_con, "Decrypted and unpacked package1\n");
|
||||
pkg1_unpack((void *)0x8000D000, (void *)ctxt.pkg1_id->secmon_base, ctxt.pkg1_id, ctxt.pkg1);
|
||||
//gfx_hexdump(&gfx_con, 0x8000D000, (void *)0x8000D000, 0x100);
|
||||
//gfx_hexdump(&gfx_con, ctxt.pkg1_id->secmon_base, (void *)ctxt.pkg1_id->secmon_base, 0x100);
|
||||
DPRINTF("decrypted and unpacked pkg1\n");
|
||||
}
|
||||
//Replace 'warmboot.bin' if requested.
|
||||
if (ctxt.warmboot)
|
||||
memcpy((void *)ctxt.pkg1_id->warmboot_base, ctxt.warmboot, ctxt.warmboot_size);
|
||||
//Set warmboot address in PMC if required.
|
||||
if (ctxt.pkg1_id->set_warmboot)
|
||||
PMC(APBDEV_PMC_SCRATCH1) = 0x8000D000;
|
||||
memcpy((void *)0x8000D000, ctxt.warmboot, ctxt.warmboot_size);
|
||||
//Set warmboot address in PMC.
|
||||
PMC(APBDEV_PMC_SCRATCH1) = 0x8000D000;
|
||||
//Replace 'SecureMonitor' if requested.
|
||||
if (ctxt.secmon) {
|
||||
memcpy((void *)ctxt.pkg1_id->secmon_base, ctxt.secmon, ctxt.secmon_size);
|
||||
@@ -415,93 +457,51 @@ int hos_launch(ini_sec_t *cfg)
|
||||
{
|
||||
//Else we patch it to allow for an unsigned package2.
|
||||
patch_t *secmon_patchset = ctxt.pkg1_id->secmon_patchset;
|
||||
//In case a kernel patch option is set. Allows to disable Svc Verififcation or/and enable Debug mode
|
||||
patch_t *kernel_patchset = ctxt.pkg1_id->kernel_patchset;
|
||||
|
||||
if (secmon_patchset != NULL || (kernel_patchset != NULL && (ctxt.svcperm || ctxt.debugmode))) {
|
||||
if (secmon_patchset != NULL)
|
||||
{
|
||||
gfx_printf(&gfx_con, "%kPatching Security Monitor%k\n", 0xFF00BAFF, 0xFFCCCCCC);
|
||||
for (u32 i = 0; secmon_patchset[i].off != 0xFFFFFFFF; i++)
|
||||
*(vu32 *)(ctxt.pkg1_id->secmon_base + secmon_patchset[i].off) = secmon_patchset[i].val;
|
||||
}
|
||||
if (secmon_patchset != NULL) {
|
||||
for (u32 i = 0; secmon_patchset[i].off != 0xFFFFFFFF; i++)
|
||||
*(vu32 *)(ctxt.pkg1_id->secmon_base + secmon_patchset[i].off) = secmon_patchset[i].val;
|
||||
|
||||
gfx_printf(&gfx_con, "Loaded warmboot.bin and secmon\n");
|
||||
|
||||
//Read package2.
|
||||
if (!_read_emmc_pkg2(&ctxt))
|
||||
return 0;
|
||||
DPRINTF("loaded warmboot.bin and secmon\n");
|
||||
|
||||
//Read package2.
|
||||
if (!_read_emmc_pkg2(&ctxt))
|
||||
return 0;
|
||||
|
||||
gfx_printf(&gfx_con, "Read package2\n");
|
||||
//Decrypt package2 and parse KIP1 blobs in INI1 section.
|
||||
pkg2_hdr_t *pkg2_hdr = pkg2_decrypt(ctxt.pkg2);
|
||||
DPRINTF("read pkg2\n");
|
||||
//Decrypt package2 and parse KIP1 blobs in INI1 section.
|
||||
pkg2_hdr_t *pkg2_hdr = pkg2_decrypt(ctxt.pkg2);
|
||||
|
||||
LIST_INIT(kip1_info);
|
||||
pkg2_parse_kips(&kip1_info, pkg2_hdr);
|
||||
LIST_INIT(kip1_info);
|
||||
pkg2_parse_kips(&kip1_info, pkg2_hdr);
|
||||
|
||||
gfx_printf(&gfx_con, "Parsed ini1\n");
|
||||
|
||||
//Use the kernel included in package2 in case we didn't load one already.
|
||||
if (!ctxt.kernel)
|
||||
{
|
||||
ctxt.kernel = pkg2_hdr->data;
|
||||
ctxt.kernel_size = pkg2_hdr->sec_size[PKG2_SEC_KERNEL];
|
||||
|
||||
if (kernel_patchset != NULL && (ctxt.svcperm || ctxt.debugmode))
|
||||
DPRINTF("parsed ini1\n");
|
||||
|
||||
//Use the kernel included in package2 in case we didn't load one already.
|
||||
if (!ctxt.kernel)
|
||||
{
|
||||
gfx_printf(&gfx_con, "%kPatching kernel%k\n", 0xFF00BAFF, 0xFFCCCCCC);
|
||||
if (ctxt.svcperm && kernel_patchset[0].off != 0xFFFFFFFF)
|
||||
*(vu32 *)(ctxt.kernel + kernel_patchset[0].off) = kernel_patchset[0].val;
|
||||
if (ctxt.debugmode && kernel_patchset[1].off != 0xFFFFFFFF)
|
||||
*(vu32 *)(ctxt.kernel + kernel_patchset[1].off) = kernel_patchset[1].val;
|
||||
ctxt.kernel = pkg2_hdr->data;
|
||||
ctxt.kernel_size = pkg2_hdr->sec_size[PKG2_SEC_KERNEL];
|
||||
}
|
||||
}
|
||||
|
||||
//Merge extra KIP1s into loaded ones.
|
||||
gfx_printf(&gfx_con, "%kPatching kernel initial processes%k\n", 0xFF00BAFF, 0xFFCCCCCC);
|
||||
LIST_FOREACH_ENTRY(merge_kip_t, mki, &ctxt.kip1_list, link)
|
||||
pkg2_merge_kip(&kip1_info, (pkg2_kip1_t *)mki->kip1);
|
||||
//Merge extra KIP1s into loaded ones.
|
||||
LIST_FOREACH_ENTRY(merge_kip_t, mki, &ctxt.kip1_list, link)
|
||||
pkg2_merge_kip(&kip1_info, (pkg2_kip1_t *)mki->kip1);
|
||||
|
||||
//Rebuild and encrypt package2.
|
||||
pkg2_build_encrypt((void *)0xA9800000, ctxt.kernel, ctxt.kernel_size, &kip1_info);
|
||||
gfx_printf(&gfx_con, "Rebuilt and loaded package2\n");
|
||||
//Rebuild and encrypt package2.
|
||||
pkg2_build_encrypt((void *)0xA9800000, ctxt.kernel, ctxt.kernel_size, &kip1_info);
|
||||
DPRINTF("rebuilt pkg2\n");
|
||||
} else {
|
||||
//Read package2.
|
||||
if (!_read_emmc_pkg2(&ctxt))
|
||||
return 0;
|
||||
|
||||
gfx_printf(&gfx_con, "Loaded package2\n");
|
||||
DPRINTF("read pkg2\n");
|
||||
memcpy((void *)0xA9800000, ctxt.pkg2, ctxt.pkg2_size);
|
||||
}
|
||||
}
|
||||
// Unmount SD Card
|
||||
f_mount(NULL, "", 1);
|
||||
|
||||
gfx_printf(&gfx_con, "\n%kBooting...%k\n", 0xFF00FF96, 0xFFCCCCCC);
|
||||
|
||||
se_aes_key_clear(0x8);
|
||||
se_aes_key_clear(0xB);
|
||||
|
||||
switch (ctxt.pkg1_id->kb) {
|
||||
case KB_FIRMWARE_VERSION_100_200:
|
||||
case KB_FIRMWARE_VERSION_300:
|
||||
case KB_FIRMWARE_VERSION_301:
|
||||
se_key_acc_ctrl(0xC, 0xFF);
|
||||
se_key_acc_ctrl(0xD, 0xFF);
|
||||
bootStatePackage2 = 2;
|
||||
bootStateContinue = 3;
|
||||
break;
|
||||
default:
|
||||
case KB_FIRMWARE_VERSION_400:
|
||||
case KB_FIRMWARE_VERSION_500:
|
||||
se_key_acc_ctrl(0xC, 0xFF);
|
||||
se_key_acc_ctrl(0xF, 0xFF);
|
||||
bootStatePackage2 = 3;
|
||||
bootStateContinue = 4;
|
||||
break;
|
||||
}
|
||||
|
||||
//Clear 'BootConfig' for retail systems.
|
||||
//Clear 'BootConfig'.
|
||||
memset((void *)0x4003D000, 0, 0x3000);
|
||||
|
||||
//pkg2_decrypt((void *)0xA9800000);
|
||||
@@ -515,7 +515,7 @@ int hos_launch(ini_sec_t *cfg)
|
||||
vu32 *mb_in = (vu32 *)0x40002EF8;
|
||||
vu32 *mb_out = (vu32 *)0x40002EFC;
|
||||
|
||||
*mb_in = bootStatePackage2;
|
||||
*mb_in = 0;
|
||||
*mb_out = 0;
|
||||
|
||||
//Wait for secmon to get ready.
|
||||
@@ -524,10 +524,13 @@ int hos_launch(ini_sec_t *cfg)
|
||||
sleep(1);
|
||||
|
||||
//Signal 'BootConfig'.
|
||||
//*mb_in = 1;
|
||||
//sleep(100);
|
||||
*mb_in = 1;
|
||||
sleep(100);
|
||||
|
||||
//Signal package2 available.
|
||||
*mb_in = 2;
|
||||
sleep(100);
|
||||
|
||||
//TODO: pkg1.1 locks PMC scratches, we can do that too at some point.
|
||||
/*PMC(0x4) = 0x7FFFF3;
|
||||
PMC(0x2C4) = 0xFFFFFFFF;
|
||||
PMC(0x2D8) = 0xFFAFFFFF;
|
||||
@@ -541,7 +544,8 @@ int hos_launch(ini_sec_t *cfg)
|
||||
//display_end();
|
||||
|
||||
//Signal to continue boot.
|
||||
*mb_in = bootStateContinue;
|
||||
*mb_in = 3;
|
||||
sleep(100);
|
||||
|
||||
//Halt ourselves in waitevent state.
|
||||
while (1)
|
||||
|
||||
@@ -21,6 +21,5 @@
|
||||
#include "ini.h"
|
||||
|
||||
int hos_launch(ini_sec_t *cfg);
|
||||
int keygen(u8 *keyblob, u32 kb, void *tsec_fw);
|
||||
|
||||
#endif
|
||||
|
||||
946
ipl/main.c
946
ipl/main.c
File diff suppressed because it is too large
Load Diff
@@ -289,7 +289,6 @@ c : clear by read
|
||||
#define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */
|
||||
#define EXT_CSD_PWR_CL_DDR_200_360 253 /* RO */
|
||||
#define EXT_CSD_FIRMWARE_VERSION 254 /* RO, 8 bytes */
|
||||
#define EXT_CSD_DEVICE_VERSION 262 /* RO, 2 bytes */
|
||||
#define EXT_CSD_PRE_EOL_INFO 267 /* RO */
|
||||
#define EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_A 268 /* RO */
|
||||
#define EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_B 269 /* RO */
|
||||
|
||||
80
ipl/pkg1.c
80
ipl/pkg1.c
@@ -24,74 +24,27 @@
|
||||
#define _BL(a, o) 0x94000000 | (((o) - (a)) >> 2) & 0x3FFFFFF
|
||||
#define _NOP() 0xD503201F
|
||||
|
||||
//#define SM_100_ADR 0x40014020
|
||||
#define SM_100_ADR 0x4002B020
|
||||
|
||||
PATCHSET_DEF(_secmon_1_patchset,
|
||||
//Patch the relocator to be able to run from SM_100_ADR.
|
||||
{ 0x1E0, _ADRP(0, 0x7C013000 - (SM_100_ADR - 0x40)) },
|
||||
//Patch the relocator to be able to run from 0x4002D000.
|
||||
//{ 0x1E0, _ADRP(0, 0x7C013000 - 0x4002D000) }
|
||||
//Patch package2 decryption and signature/hash checks.
|
||||
{ 0x9F0 + 0xADC, _NOP() }, //Header signature.
|
||||
{ 0x9F0 + 0xB8C, _NOP() }, //Version.
|
||||
{ 0x9F0 + 0xBB0, _NOP() } //Sections SHA2.
|
||||
{ 0x9F0 + 0xBB0, _NOP() } //Sections SHA2.
|
||||
);
|
||||
|
||||
PATCHSET_DEF(_secmon_2_patchset,
|
||||
//Patch package2 decryption and signature/hash checks.
|
||||
{ 0xAC8 + 0xAAC, _NOP() }, //Header signature.
|
||||
{ 0xAC8 + 0xB3C, _NOP() }, //Version.
|
||||
{ 0xAC8 + 0xB58, _NOP() } //Sections SHA2.
|
||||
{ 0xAC8 + 0xB58, _NOP() } //Sections SHA2.
|
||||
);
|
||||
|
||||
PATCHSET_DEF(_secmon_3_patchset,
|
||||
//Patch package2 decryption and signature/hash checks.
|
||||
{ 0xAC8 + 0xAB4, _NOP() },
|
||||
{ 0xAC8 + 0xA30, _NOP() }, //Header signature.
|
||||
{ 0xAC8 + 0xAC0, _NOP() }, //Version.
|
||||
{ 0xAC8 + 0xADC, _NOP() } //Sections SHA2.
|
||||
);
|
||||
|
||||
PATCHSET_DEF(_secmon_4_patchset,
|
||||
//Patch package2 decryption and signature/hash checks.
|
||||
{ 0x1218 + 0x6E68, _NOP() }, //Header signature.
|
||||
{ 0x1218 + 0x6E74, _NOP() }, //Version.
|
||||
{ 0x1218 + 0x6FE4, _NOP() }, //Sections SHA2.
|
||||
{ 0x1218 + 0x2DC, _NOP() } //Unknown.
|
||||
);
|
||||
|
||||
PATCHSET_DEF(_secmon_5_patchset,
|
||||
//Patch package2 decryption and signature/hash checks.
|
||||
{ 0x12b0 + 0x4d0, _NOP() },
|
||||
{ 0x12b0 + 0x4dc, _NOP() },
|
||||
{ 0x12b0 + 0x794, _NOP() },
|
||||
{ 0x12b0 + 0xb30, _NOP() }//,
|
||||
//{ 0x12b0 + 0xa18 , _NOP() } // BootConfig Retail Check
|
||||
);
|
||||
|
||||
// Include kernel patches here, so we can utilize pkg1 id
|
||||
PATCHSET_DEF(_kernel_1_patchset,
|
||||
{ 0x3764C, _NOP() }, // Disable SVC verifications
|
||||
{ 0x44074, _MOVZX(8, 1, 0) } // Enable Debug Patch
|
||||
);
|
||||
|
||||
PATCHSET_DEF(_kernel_2_patchset,
|
||||
{ 0x54834, _NOP() }, // Disable SVC verifications
|
||||
{ 0x6086C, _MOVZX(8, 1, 0) } // Enable Debug Patch
|
||||
);
|
||||
|
||||
PATCHSET_DEF(_kernel_3_patchset,
|
||||
{ 0x3BD24, _NOP() }, // Disable SVC verifications
|
||||
{ 0x483FC, _MOVZX(8, 1, 0) } // Enable Debug Patch
|
||||
);
|
||||
|
||||
PATCHSET_DEF(_kernel_4_patchset,
|
||||
{ 0x41EB4, _NOP() }, // Disable SVC verifications
|
||||
{ 0x4EBFC, _MOVZX(8, 1, 0) } // Enable Debug Patch
|
||||
);
|
||||
|
||||
PATCHSET_DEF(_kernel_5_patchset,
|
||||
{ 0x45E6C, _NOP() }, // Disable SVC verifications
|
||||
{ 0x5513C, _MOVZX(8, 1, 0) } // Enable Debug Patch
|
||||
{ 0xAC8 + 0xADC, _NOP() } //Sections SHA2.
|
||||
);
|
||||
|
||||
/*
|
||||
@@ -106,15 +59,26 @@ PATCHSET_DEF(_kernel_5_patchset,
|
||||
*/
|
||||
|
||||
static const pkg1_id_t _pkg1_ids[] = {
|
||||
{ "20161121183008", 0, 0x1900, 0x3FE0, { 2, 1, 0 }, SM_100_ADR, 0x8000D000, 1, _secmon_1_patchset, _kernel_1_patchset }, //1.0.0 (Patched relocator)
|
||||
{ "20170210155124", 0, 0x1900, 0x3FE0, { 0, 1, 2 }, 0x4002D000, 0x8000D000, 1, _secmon_2_patchset, _kernel_2_patchset }, //2.0.0 - 2.3.0
|
||||
{ "20170519101410", 1, 0x1A00, 0x3FE0, { 0, 1, 2 }, 0x4002D000, 0x8000D000, 1, _secmon_3_patchset, _kernel_3_patchset }, //3.0.0
|
||||
{ "20170710161758", 2, 0x1A00, 0x3FE0, { 0, 1, 2 }, 0x4002D000, 0x8000D000, 1, _secmon_3_patchset, _kernel_3_patchset }, //3.0.1 - 3.0.2
|
||||
{ "20170921172629", 3, 0x1800, 0x3FE0, { 1, 2, 0 }, 0x4002B000, 0x4003B000, 0, _secmon_4_patchset, _kernel_4_patchset }, //4.0.0 - 4.1.0
|
||||
{ "20180220163747", 4, 0x1900, 0x3FE0, { 1, 2, 0 }, 0x4002B000, 0x4003B000, 0, _secmon_5_patchset, _kernel_5_patchset }, //5.0.0 - 5.0.2
|
||||
{ "20161121183008", 0, 0x1900, 0x3FE0, { 2, 1, 0 }, 0x40014020, _secmon_1_patchset }, //1.0.0
|
||||
{ "20170210155124", 0, 0x1900, 0x3FE0, { 0, 1, 2 }, 0x4002D000, _secmon_2_patchset }, //2.0.0
|
||||
{ "20170519101410", 1, 0x1A00, 0x3FE0, { 0, 1, 2 }, 0x4002D000, NULL }, //3.0.0
|
||||
{ "20170710161758", 2, 0x1A00, 0x3FE0, { 0, 1, 2 }, 0x4002D000, NULL }, //3.0.1
|
||||
{ "20170921172629", 3, 0x1800, 0x3FE0, { 1, 2, 0 }, 0x4002B000, NULL }, //4.0.0
|
||||
{ "20180220163747", 4, 0x1900, 0x3FE0, { 1, 2, 0 }, 0x4002B000, NULL }, //5.0.0
|
||||
{ NULL, 0, 0, 0, 0 } //End.
|
||||
};
|
||||
|
||||
typedef struct _pk11_hdr_t
|
||||
{
|
||||
u32 magic;
|
||||
u32 wb_size;
|
||||
u32 wb_off;
|
||||
u32 pad;
|
||||
u32 ldr_size;
|
||||
u32 ldr_off;
|
||||
u32 sm_size;
|
||||
u32 sm_off;
|
||||
} pk11_hdr_t;
|
||||
|
||||
const pkg1_id_t *pkg1_identify(u8 *pkg1)
|
||||
{
|
||||
|
||||
15
ipl/pkg1.h
15
ipl/pkg1.h
@@ -39,24 +39,9 @@ typedef struct _pkg1_id_t
|
||||
u32 pkg11_off;
|
||||
u32 sec_map[3];
|
||||
u32 secmon_base;
|
||||
u32 warmboot_base;
|
||||
int set_warmboot;
|
||||
patch_t *secmon_patchset;
|
||||
patch_t *kernel_patchset;
|
||||
} pkg1_id_t;
|
||||
|
||||
typedef struct _pk11_hdr_t
|
||||
{
|
||||
u32 magic;
|
||||
u32 wb_size;
|
||||
u32 wb_off;
|
||||
u32 pad;
|
||||
u32 ldr_size;
|
||||
u32 ldr_off;
|
||||
u32 sm_size;
|
||||
u32 sm_off;
|
||||
} pk11_hdr_t;
|
||||
|
||||
const pkg1_id_t *pkg1_identify(u8 *pkg1);
|
||||
void pkg1_decrypt(const pkg1_id_t *id, u8 *pkg1);
|
||||
void pkg1_unpack(void *warmboot_dst, void *secmon_dst, const pkg1_id_t *id, u8 *pkg1);
|
||||
|
||||
@@ -172,4 +172,3 @@ DPRINTF("INI1 encrypted\n");
|
||||
memset(hdr->ctr, 0 , 0x10);
|
||||
*(u32 *)hdr->ctr = 0x100 + sizeof(pkg2_hdr_t) + kernel_size + ini1_size;
|
||||
}
|
||||
|
||||
|
||||
25
ipl/sd.h
25
ipl/sd.h
@@ -35,11 +35,10 @@
|
||||
#define SD_APP_SEND_SCR 51 /* adtc R1 */
|
||||
|
||||
/* OCR bit definitions */
|
||||
#define SD_OCR_S18R (1 << 24) /* 1.8V switching request */
|
||||
#define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */
|
||||
#define SD_OCR_XPC (1 << 28) /* SDXC power control */
|
||||
#define SD_OCR_CCS (1 << 30) /* Card Capacity Status */
|
||||
#define SD_OCR_VDD_32_33 (1 << 20) /* VDD voltage 3.2 ~ 3.3 */
|
||||
#define SD_OCR_S18R (1 << 24) /* 1.8V switching request */
|
||||
#define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */
|
||||
#define SD_OCR_XPC (1 << 28) /* SDXC power control */
|
||||
#define SD_OCR_CCS (1 << 30) /* Card Capacity Status */
|
||||
|
||||
/*
|
||||
* SD_SWITCH argument format:
|
||||
@@ -65,11 +64,10 @@
|
||||
/*
|
||||
* SCR field definitions
|
||||
*/
|
||||
|
||||
#define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */
|
||||
#define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */
|
||||
#define SCR_SPEC_VER_2 2 /* Implements system specification 2.00-3.0X */
|
||||
#define SD_SCR_BUS_WIDTH_1 (1<<0)
|
||||
#define SD_SCR_BUS_WIDTH_4 (1<<2)
|
||||
|
||||
/*
|
||||
* SD bus widths
|
||||
@@ -77,17 +75,6 @@
|
||||
#define SD_BUS_WIDTH_1 0
|
||||
#define SD_BUS_WIDTH_4 2
|
||||
|
||||
/*
|
||||
* SD bus speeds
|
||||
*/
|
||||
#define UHS_SDR12_BUS_SPEED 0
|
||||
#define HIGH_SPEED_BUS_SPEED 1
|
||||
#define UHS_SDR25_BUS_SPEED 1
|
||||
#define UHS_SDR50_BUS_SPEED 2
|
||||
#define UHS_SDR104_BUS_SPEED 3
|
||||
#define UHS_DDR50_BUS_SPEED 4
|
||||
#define HS400_BUS_SPEED 5
|
||||
|
||||
/*
|
||||
* SD_SWITCH mode
|
||||
*/
|
||||
@@ -103,6 +90,6 @@
|
||||
* SD_SWITCH access modes
|
||||
*/
|
||||
#define SD_SWITCH_ACCESS_DEF 0
|
||||
#define SD_SWITCH_ACCESS_HS 1
|
||||
#define SD_SWITCH_ACCESS_HS 1
|
||||
|
||||
#endif /* LINUX_MMC_SD_H */
|
||||
|
||||
355
ipl/sdmmc.c
355
ipl/sdmmc.c
@@ -165,27 +165,15 @@ static int _sdmmc_storage_readwrite(sdmmc_storage_t *storage, u32 sector, u32 nu
|
||||
while (num_sectors)
|
||||
{
|
||||
u32 blkcnt = 0;
|
||||
//Retry 9 times on error.
|
||||
u32 retries = 10;
|
||||
do
|
||||
{
|
||||
if (_sdmmc_storage_readwrite_ex(storage, &blkcnt, sector, MIN(num_sectors, 0xFFFF), bbuf, is_write))
|
||||
goto out;
|
||||
else
|
||||
retries--;
|
||||
|
||||
sleep(500000);
|
||||
|
||||
} while (retries);
|
||||
return 0;
|
||||
|
||||
out:;
|
||||
//Retry once on error.
|
||||
if (!_sdmmc_storage_readwrite_ex(storage, &blkcnt, sector, MIN(num_sectors, 0xFFFF), bbuf, is_write))
|
||||
if (!_sdmmc_storage_readwrite_ex(storage, &blkcnt, sector, MIN(num_sectors, 0xFFFF), bbuf, is_write))
|
||||
return 0;
|
||||
DPRINTF("readwrite: %08X\n", blkcnt);
|
||||
sector += blkcnt;
|
||||
num_sectors -= blkcnt;
|
||||
bbuf += 512 * blkcnt;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
int sdmmc_storage_read(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf)
|
||||
@@ -199,7 +187,7 @@ int sdmmc_storage_write(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, v
|
||||
}
|
||||
|
||||
/*
|
||||
* MMC specific functions.
|
||||
* MMC specific functions.
|
||||
*/
|
||||
|
||||
static int _mmc_storage_get_op_cond_inner(sdmmc_storage_t *storage, u32 *pout, u32 power)
|
||||
@@ -235,7 +223,7 @@ static int _mmc_storage_get_op_cond(sdmmc_storage_t *storage, u32 power)
|
||||
u32 cond = 0;
|
||||
if (!_mmc_storage_get_op_cond_inner(storage, &cond, power))
|
||||
break;
|
||||
if (cond & MMC_CARD_BUSY)
|
||||
if (cond & 0x80000000)
|
||||
{
|
||||
if (cond & 0x40000000)
|
||||
storage->has_sector_access = 1;
|
||||
@@ -254,76 +242,6 @@ static int _mmc_storage_set_relative_addr(sdmmc_storage_t *storage)
|
||||
return _sdmmc_storage_execute_cmd_type1(storage, MMC_SET_RELATIVE_ADDR, storage->rca << 16, 0, 0x10);
|
||||
}
|
||||
|
||||
static void _mmc_storage_parse_cid(sdmmc_storage_t *storage)
|
||||
{
|
||||
u32 *raw_cid = (u32 *)&(storage->raw_cid);
|
||||
|
||||
switch (storage->csd.mmca_vsn)
|
||||
{
|
||||
case 0: /* MMC v1.0 - v1.2 */
|
||||
case 1: /* MMC v1.4 */
|
||||
storage->cid.prod_name[6] = unstuff_bits(raw_cid, 48, 8);
|
||||
storage->cid.manfid = unstuff_bits(raw_cid, 104, 24);
|
||||
storage->cid.hwrev = unstuff_bits(raw_cid, 44, 4);
|
||||
storage->cid.fwrev = unstuff_bits(raw_cid, 40, 4);
|
||||
storage->cid.serial = unstuff_bits(raw_cid, 16, 24);
|
||||
break;
|
||||
case 2: /* MMC v2.0 - v2.2 */
|
||||
case 3: /* MMC v3.1 - v3.3 */
|
||||
case 4: /* MMC v4 */
|
||||
storage->cid.manfid = unstuff_bits(raw_cid, 120, 8);
|
||||
storage->cid.card_bga = unstuff_bits(raw_cid, 112, 2);
|
||||
storage->cid.oemid = unstuff_bits(raw_cid, 104, 8);
|
||||
storage->cid.prv = unstuff_bits(raw_cid, 48, 8);
|
||||
storage->cid.serial = unstuff_bits(raw_cid, 16, 32);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
storage->cid.prod_name[0] = unstuff_bits(raw_cid, 96, 8);
|
||||
storage->cid.prod_name[1] = unstuff_bits(raw_cid, 88, 8);
|
||||
storage->cid.prod_name[2] = unstuff_bits(raw_cid, 80, 8);
|
||||
storage->cid.prod_name[3] = unstuff_bits(raw_cid, 72, 8);
|
||||
storage->cid.prod_name[4] = unstuff_bits(raw_cid, 64, 8);
|
||||
storage->cid.prod_name[5] = unstuff_bits(raw_cid, 56, 8);
|
||||
|
||||
storage->cid.month = unstuff_bits(raw_cid, 12, 4);
|
||||
storage->cid.year = unstuff_bits(raw_cid, 8, 4) + 1997;
|
||||
if (storage->ext_csd.rev >= 5)
|
||||
{
|
||||
if (storage->cid.year < 2010)
|
||||
storage->cid.year += 16;
|
||||
}
|
||||
}
|
||||
|
||||
static void _mmc_storage_parse_csd(sdmmc_storage_t *storage)
|
||||
{
|
||||
u32 *raw_csd = (u32 *)&(storage->raw_csd);
|
||||
|
||||
storage->csd.mmca_vsn = unstuff_bits(raw_csd, 122, 4);
|
||||
storage->csd.structure = unstuff_bits(raw_csd, 126, 2);
|
||||
storage->csd.cmdclass = unstuff_bits(raw_csd, 84, 12);
|
||||
storage->csd.read_blkbits = unstuff_bits(raw_csd, 80, 4);
|
||||
storage->csd.capacity = (1 + unstuff_bits(raw_csd, 62, 12)) << (unstuff_bits(raw_csd, 47, 3) + 2);
|
||||
}
|
||||
|
||||
static int _mmc_storage_parse_ext_csd(sdmmc_storage_t *storage, u8 *buf)
|
||||
{
|
||||
storage->ext_csd.rev = buf[EXT_CSD_REV];
|
||||
storage->ext_csd.ext_struct = buf[EXT_CSD_STRUCTURE];
|
||||
storage->ext_csd.card_type = buf[EXT_CSD_CARD_TYPE];
|
||||
storage->ext_csd.dev_version = *(u16 *)&buf[EXT_CSD_DEVICE_VERSION];
|
||||
storage->ext_csd.boot_mult = buf[EXT_CSD_BOOT_MULT];
|
||||
storage->ext_csd.rpmb_mult = buf[EXT_CSD_RPMB_MULT];
|
||||
storage->ext_csd.sectors = *(u32 *)&buf[EXT_CSD_SEC_CNT];
|
||||
storage->ext_csd.bkops = buf[EXT_CSD_BKOPS_SUPPORT];
|
||||
storage->ext_csd.bkops_en = buf[EXT_CSD_BKOPS_EN];
|
||||
storage->ext_csd.bkops_status = buf[EXT_CSD_BKOPS_STATUS];
|
||||
|
||||
storage->sec_cnt = *(u32 *)&buf[EXT_CSD_SEC_CNT];
|
||||
}
|
||||
|
||||
static int _mmc_storage_get_ext_csd(sdmmc_storage_t *storage, void *buf)
|
||||
{
|
||||
sdmmc_cmd_t cmdbuf;
|
||||
@@ -342,8 +260,6 @@ static int _mmc_storage_get_ext_csd(sdmmc_storage_t *storage, void *buf)
|
||||
|
||||
u32 tmp = 0;
|
||||
sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1);
|
||||
_mmc_storage_parse_ext_csd(storage, buf);
|
||||
|
||||
return _sdmmc_storage_check_result(tmp);
|
||||
}
|
||||
|
||||
@@ -472,7 +388,7 @@ int sdmmc_storage_init_mmc(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32
|
||||
return 0;
|
||||
DPRINTF("[mmc] got op cond\n");
|
||||
|
||||
if (!_sdmmc_storage_get_cid(storage, storage->raw_cid))
|
||||
if (!_sdmmc_storage_get_cid(storage, storage->cid))
|
||||
return 0;
|
||||
DPRINTF("[mmc] got cid\n");
|
||||
|
||||
@@ -480,10 +396,9 @@ int sdmmc_storage_init_mmc(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32
|
||||
return 0;
|
||||
DPRINTF("[mmc] set relative addr\n");
|
||||
|
||||
if (!_sdmmc_storage_get_csd(storage, storage->raw_csd))
|
||||
if (!_sdmmc_storage_get_csd(storage, storage->csd))
|
||||
return 0;
|
||||
DPRINTF("[mmc] got csd\n");
|
||||
_mmc_storage_parse_csd(storage);
|
||||
|
||||
if (!sdmmc_setup_clock(storage->sdmmc, 1))
|
||||
return 0;
|
||||
@@ -497,7 +412,7 @@ int sdmmc_storage_init_mmc(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32
|
||||
return 0;
|
||||
DPRINTF("[mmc] set blocklen to 512\n");
|
||||
|
||||
u32 *csd = (u32 *)storage->raw_csd;
|
||||
u32 *csd = (u32 *)storage->csd;
|
||||
//Check system specification version, only version 4.0 and later support below features.
|
||||
if (unstuff_bits(csd, 122, 4) < CSD_SPEC_VER_4)
|
||||
{
|
||||
@@ -515,28 +430,23 @@ int sdmmc_storage_init_mmc(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32
|
||||
free(ext_csd);
|
||||
return 0;
|
||||
}
|
||||
free(ext_csd);
|
||||
DPRINTF("[mmc] got ext_csd\n");
|
||||
_mmc_storage_parse_cid(storage); //This needs to be after csd and ext_csd
|
||||
//gfx_hexdump(&gfx_con, 0, ext_csd, 512);
|
||||
|
||||
/* When auto BKOPS is enabled the mmc device should be powered all the time until we disable this and check status.
|
||||
Disable it for now until BKOPS disable added to power down sequence at sdmmc_storage_end().
|
||||
Additionally this works only when we put the device in idle mode which we don't after enabling it. */
|
||||
if (storage->ext_csd.bkops & 0x1 && !(storage->ext_csd.bkops_en & EXT_CSD_BKOPS_LEVEL_2) && 0)
|
||||
{
|
||||
_mmc_storage_enable_bkops(storage);
|
||||
DPRINTF("[mmc] BKOPS enabled\n");
|
||||
}
|
||||
else
|
||||
DPRINTF("[mmc] BKOPS disabled\n");
|
||||
storage->sec_cnt = *(u32 *)&ext_csd[EXT_CSD_SEC_CNT];
|
||||
|
||||
if (!_mmc_storage_enable_highspeed(storage, storage->ext_csd.card_type, type))
|
||||
if (storage->cid[0xE] == 0x11 && ext_csd[EXT_CSD_BKOPS_EN] & EXT_CSD_BKOPS_LEVEL_2)
|
||||
_mmc_storage_enable_bkops(storage);
|
||||
|
||||
if (!_mmc_storage_enable_highspeed(storage, ext_csd[EXT_CSD_CARD_TYPE], type))
|
||||
{
|
||||
free(ext_csd);
|
||||
return 0;
|
||||
DPRINTF("[mmc] switched to highspeed mode\n");
|
||||
}
|
||||
DPRINTF("[mmc] switched to possible highspeed mode\n");
|
||||
|
||||
sdmmc_sd_clock_ctrl(storage->sdmmc, 1);
|
||||
|
||||
free(ext_csd);
|
||||
return 1;
|
||||
}
|
||||
|
||||
@@ -574,26 +484,21 @@ static int _sd_storage_send_if_cond(sdmmc_storage_t *storage)
|
||||
sdmmc_cmd_t cmdbuf;
|
||||
sdmmc_init_cmd(&cmdbuf, SD_SEND_IF_COND, 0x1AA, SDMMC_RSP_TYPE_5, 0);
|
||||
if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, 0, 0))
|
||||
return 1; // The SD Card is version 1.X
|
||||
return 0;
|
||||
|
||||
//TODO: we may have received a timeout error in the above request, which indicates a version 1 card.
|
||||
|
||||
u32 resp = 0;
|
||||
if (!sdmmc_get_rsp(storage->sdmmc, &resp, 4, SDMMC_RSP_TYPE_5))
|
||||
return 2;
|
||||
return 0;
|
||||
|
||||
return (resp & 0xFF) == 0xAA ? 0 : 2;
|
||||
return (resp & 0xFF) == 0xAA ? 1 : 0;
|
||||
}
|
||||
|
||||
static int _sd_storage_get_op_cond_once(sdmmc_storage_t *storage, u32 *cond, int is_version_1, int supports_low_voltage)
|
||||
{
|
||||
sdmmc_cmd_t cmdbuf;
|
||||
// Support for Current > 150mA
|
||||
u32 arg = (~is_version_1 & 1) ? SD_OCR_XPC : 0;
|
||||
// Support for handling block-addressed SDHC cards
|
||||
arg |= (~is_version_1 & 1) ? SD_OCR_CCS : 0;
|
||||
// Support for 1.8V
|
||||
arg |= (supports_low_voltage & ~is_version_1 & 1) ? SD_OCR_S18R : 0;
|
||||
// This is needed for most cards. Do not set bit7 even if 1.8V is supported.
|
||||
arg |= SD_OCR_VDD_32_33;
|
||||
u32 arg = (((~is_version_1 & 1) << 28) & 0xBFFFFFFF | ((~is_version_1 & 1) << 30)) & 0xFEFFFFFF | ((supports_low_voltage & ~is_version_1 & 1) << 24) | 0x100000;
|
||||
sdmmc_init_cmd(&cmdbuf, SD_APP_OP_COND, arg, SDMMC_RSP_TYPE_3, 0);
|
||||
if (!_sd_storage_execute_app_cmd(storage, 0x10, is_version_1 ? 0x400000 : 0, &cmdbuf, 0, 0))
|
||||
return 0;
|
||||
@@ -609,15 +514,16 @@ static int _sd_storage_get_op_cond(sdmmc_storage_t *storage, int is_version_1, i
|
||||
u32 cond = 0;
|
||||
if (!_sd_storage_get_op_cond_once(storage, &cond, is_version_1, supports_low_voltage))
|
||||
break;
|
||||
if (cond & MMC_CARD_BUSY)
|
||||
if (cond & 0x80000000)
|
||||
{
|
||||
if (cond & SD_OCR_CCS)
|
||||
if (cond & 0x40000000)
|
||||
storage->has_sector_access = 1;
|
||||
|
||||
if (cond & SD_ROCR_S18A && supports_low_voltage)
|
||||
// TODO: Some SD Card incorrectly report low voltage support
|
||||
// Disable it for now
|
||||
if (cond & 0x1000000 && supports_low_voltage)
|
||||
{
|
||||
//The low voltage regulator configuration is valid for SDMMC1 only.
|
||||
if (storage->sdmmc->id == SDMMC_1 &&
|
||||
if (storage->sdmmc->id == SDMMC_1 &&
|
||||
_sdmmc_storage_execute_cmd_type1(storage, SD_SWITCH_VOLTAGE, 0, 0, R1_STATE_READY))
|
||||
{
|
||||
if (!sdmmc_enable_low_voltage(storage->sdmmc))
|
||||
@@ -668,24 +574,7 @@ static int _sd_storage_get_rca(sdmmc_storage_t *storage)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void _sd_storage_parse_scr(sdmmc_storage_t *storage)
|
||||
{
|
||||
// unstuff_bits can parse only 4 u32
|
||||
u32 resp[4];
|
||||
|
||||
resp[3] = *(u32 *)&storage->raw_scr[4];
|
||||
resp[2] = *(u32 *)&storage->raw_scr[0];
|
||||
|
||||
storage->scr.sda_vsn = unstuff_bits(resp, 56, 4);
|
||||
storage->scr.bus_widths = unstuff_bits(resp, 48, 4);
|
||||
if (storage->scr.sda_vsn == SCR_SPEC_VER_2)
|
||||
/* Check if Physical Layer Spec v3.0 is supported */
|
||||
storage->scr.sda_spec3 = unstuff_bits(resp, 47, 1);
|
||||
if (storage->scr.sda_spec3)
|
||||
storage->scr.cmds = unstuff_bits(resp, 32, 2);
|
||||
}
|
||||
|
||||
int _sd_storage_get_scr(sdmmc_storage_t *storage, u8 *buf)
|
||||
int _sd_storage_get_scr(sdmmc_storage_t *storage, void *buf)
|
||||
{
|
||||
sdmmc_cmd_t cmdbuf;
|
||||
sdmmc_init_cmd(&cmdbuf, SD_APP_SEND_SCR, 0, SDMMC_RSP_TYPE_1, 0);
|
||||
@@ -703,17 +592,6 @@ int _sd_storage_get_scr(sdmmc_storage_t *storage, u8 *buf)
|
||||
|
||||
u32 tmp = 0;
|
||||
sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1);
|
||||
//Prepare buffer for unstuff_bits
|
||||
for (int i = 0; i < 8; i+=4)
|
||||
{
|
||||
storage->raw_scr[i + 3] = buf[i];
|
||||
storage->raw_scr[i + 2] = buf[i + 1];
|
||||
storage->raw_scr[i + 1] = buf[i + 2];
|
||||
storage->raw_scr[i] = buf[i + 3];
|
||||
}
|
||||
_sd_storage_parse_scr(storage);
|
||||
//gfx_hexdump(&gfx_con, 0, storage->raw_scr, 8);
|
||||
|
||||
return _sdmmc_storage_check_result(tmp);
|
||||
}
|
||||
|
||||
@@ -795,7 +673,7 @@ int _sd_storage_enable_highspeed_low_volt(sdmmc_storage_t *storage, u32 type, u8
|
||||
if (buf[13] & 8)
|
||||
{
|
||||
type = 11;
|
||||
hs_type = UHS_SDR104_BUS_SPEED;
|
||||
hs_type = 3;
|
||||
break;
|
||||
}
|
||||
//Fall through.
|
||||
@@ -803,7 +681,7 @@ int _sd_storage_enable_highspeed_low_volt(sdmmc_storage_t *storage, u32 type, u8
|
||||
if (!(buf[13] & 4))
|
||||
return 0;
|
||||
type = 10;
|
||||
hs_type = UHS_SDR50_BUS_SPEED;
|
||||
hs_type = 2;
|
||||
break;
|
||||
default:
|
||||
return 0;
|
||||
@@ -834,130 +712,8 @@ int _sd_storage_enable_highspeed_high_volt(sdmmc_storage_t *storage, u8 *buf)
|
||||
return sdmmc_setup_clock(storage->sdmmc, 7);
|
||||
}
|
||||
|
||||
static void _sd_storage_parse_ssr(sdmmc_storage_t *storage)
|
||||
{
|
||||
// unstuff_bits supports only 4 u32 so break into 2 x 16byte groups
|
||||
u32 raw_ssr1[4];
|
||||
u32 raw_ssr2[4];
|
||||
|
||||
raw_ssr1[3] = *(u32 *)&storage->raw_ssr[12];
|
||||
raw_ssr1[2] = *(u32 *)&storage->raw_ssr[8];
|
||||
raw_ssr1[1] = *(u32 *)&storage->raw_ssr[4];
|
||||
raw_ssr1[0] = *(u32 *)&storage->raw_ssr[0];
|
||||
|
||||
raw_ssr2[3] = *(u32 *)&storage->raw_ssr[28];
|
||||
raw_ssr2[2] = *(u32 *)&storage->raw_ssr[24];
|
||||
raw_ssr2[1] = *(u32 *)&storage->raw_ssr[20];
|
||||
raw_ssr2[0] = *(u32 *)&storage->raw_ssr[16];
|
||||
|
||||
storage->ssr.bus_width = unstuff_bits(raw_ssr1, 510 - 384, 2) & SD_BUS_WIDTH_4 ? 4 : 1;
|
||||
switch(unstuff_bits(raw_ssr1, 440 - 384, 8))
|
||||
{
|
||||
case 0:
|
||||
storage->ssr.speed_class = 0;
|
||||
break;
|
||||
case 1:
|
||||
storage->ssr.speed_class = 2;
|
||||
break;
|
||||
case 2:
|
||||
storage->ssr.speed_class = 4;
|
||||
break;
|
||||
case 3:
|
||||
storage->ssr.speed_class = 6;
|
||||
break;
|
||||
case 4:
|
||||
storage->ssr.speed_class = 10;
|
||||
break;
|
||||
default:
|
||||
storage->ssr.speed_class = unstuff_bits(raw_ssr1, 440 - 384, 8);
|
||||
break;
|
||||
}
|
||||
storage->ssr.uhs_grade = unstuff_bits(raw_ssr1, 396 - 384, 4);
|
||||
storage->ssr.video_class = unstuff_bits(raw_ssr1, 384 - 384, 8);
|
||||
|
||||
storage->ssr.app_class = unstuff_bits(raw_ssr2, 336 - 256, 4);
|
||||
}
|
||||
|
||||
static int _sd_storage_get_ssr(sdmmc_storage_t *storage, u8 *buf)
|
||||
{
|
||||
sdmmc_cmd_t cmdbuf;
|
||||
sdmmc_init_cmd(&cmdbuf, SD_APP_SD_STATUS, 0, SDMMC_RSP_TYPE_1, 0);
|
||||
|
||||
sdmmc_req_t reqbuf;
|
||||
reqbuf.buf = buf;
|
||||
reqbuf.blksize = 64;
|
||||
reqbuf.num_sectors = 1;
|
||||
reqbuf.is_write = 0;
|
||||
reqbuf.is_multi_block = 0;
|
||||
reqbuf.is_auto_cmd12 = 0;
|
||||
|
||||
if (!(storage->csd.cmdclass & CCC_APP_SPEC)) {
|
||||
DPRINTF("[sd] ssr: Card lacks mandatory SD Status function\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (!_sd_storage_execute_app_cmd(storage, R1_STATE_TRAN, 0, &cmdbuf, &reqbuf, 0))
|
||||
return 0;
|
||||
|
||||
u32 tmp = 0;
|
||||
sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1);
|
||||
//Prepare buffer for unstuff_bits
|
||||
for (int i = 0; i < 64; i+=4)
|
||||
{
|
||||
storage->raw_ssr[i + 3] = buf[i];
|
||||
storage->raw_ssr[i + 2] = buf[i + 1];
|
||||
storage->raw_ssr[i + 1] = buf[i + 2];
|
||||
storage->raw_ssr[i] = buf[i + 3];
|
||||
}
|
||||
_sd_storage_parse_ssr(storage);
|
||||
//gfx_hexdump(&gfx_con, 0, storage->raw_ssr, 64);
|
||||
|
||||
return _sdmmc_storage_check_result(tmp);
|
||||
}
|
||||
|
||||
static void _sd_storage_parse_cid(sdmmc_storage_t *storage)
|
||||
{
|
||||
u32 *raw_cid = (u32 *)&(storage->raw_cid);
|
||||
|
||||
storage->cid.manfid = unstuff_bits(raw_cid, 120, 8);
|
||||
storage->cid.oemid = unstuff_bits(raw_cid, 104, 16);
|
||||
storage->cid.prod_name[0] = unstuff_bits(raw_cid, 96, 8);
|
||||
storage->cid.prod_name[1] = unstuff_bits(raw_cid, 88, 8);
|
||||
storage->cid.prod_name[2] = unstuff_bits(raw_cid, 80, 8);
|
||||
storage->cid.prod_name[3] = unstuff_bits(raw_cid, 72, 8);
|
||||
storage->cid.prod_name[4] = unstuff_bits(raw_cid, 64, 8);
|
||||
storage->cid.hwrev = unstuff_bits(raw_cid, 60, 4);
|
||||
storage->cid.fwrev = unstuff_bits(raw_cid, 56, 4);
|
||||
storage->cid.serial = unstuff_bits(raw_cid, 24, 32);
|
||||
storage->cid.month = unstuff_bits(raw_cid, 8, 4);
|
||||
storage->cid.year = unstuff_bits(raw_cid, 12, 8) + 2000;
|
||||
}
|
||||
|
||||
static void _sd_storage_parse_csd(sdmmc_storage_t *storage)
|
||||
{
|
||||
u32 *raw_csd = (u32 *)&(storage->raw_csd);
|
||||
|
||||
storage->csd.structure = unstuff_bits(raw_csd, 126, 2);
|
||||
storage->csd.cmdclass = unstuff_bits(raw_csd, 84, 12);
|
||||
storage->csd.read_blkbits = unstuff_bits(raw_csd, 80, 4);
|
||||
storage->csd.write_protect = unstuff_bits(raw_csd, 12, 2);
|
||||
switch(storage->csd.structure)
|
||||
{
|
||||
case 0:
|
||||
storage->csd.capacity = (1 + unstuff_bits(raw_csd, 62, 12)) << (unstuff_bits(raw_csd, 47, 3) + 2);
|
||||
break;
|
||||
case 1:
|
||||
storage->csd.c_size = (1 + unstuff_bits(raw_csd, 48, 22));
|
||||
storage->csd.capacity = storage->csd.c_size << 10;
|
||||
storage->csd.read_blkbits = 9;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32 bus_width, u32 type)
|
||||
{
|
||||
int is_version_1 = 0;
|
||||
|
||||
memset(storage, 0, sizeof(sdmmc_storage_t));
|
||||
storage->sdmmc = sdmmc;
|
||||
|
||||
@@ -971,40 +727,47 @@ int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32
|
||||
return 0;
|
||||
DPRINTF("[sd] went to idle state\n");
|
||||
|
||||
is_version_1 = _sd_storage_send_if_cond(storage);
|
||||
if (is_version_1 == 2)
|
||||
if (!_sd_storage_send_if_cond(storage))
|
||||
return 0;
|
||||
DPRINTF("[sd] after send if cond\n");
|
||||
|
||||
if (!_sd_storage_get_op_cond(storage, is_version_1, bus_width == SDMMC_BUS_WIDTH_4 && type == 11))
|
||||
//TODO: use correct version here -----v
|
||||
if (!_sd_storage_get_op_cond(storage, 0, bus_width == SDMMC_BUS_WIDTH_4 && (type | 1) == 11))
|
||||
return 0;
|
||||
DPRINTF("[sd] got op cond\n");
|
||||
|
||||
if (!_sdmmc_storage_get_cid(storage, storage->raw_cid))
|
||||
if (!_sdmmc_storage_get_cid(storage, storage->cid))
|
||||
return 0;
|
||||
DPRINTF("[sd] got cid\n");
|
||||
_sd_storage_parse_cid(storage);
|
||||
|
||||
if (!_sd_storage_get_rca(storage))
|
||||
return 0;
|
||||
DPRINTF("[sd] got rca (= %04X)\n", storage->rca);
|
||||
|
||||
if (!_sdmmc_storage_get_csd(storage, storage->raw_csd))
|
||||
if (!_sdmmc_storage_get_csd(storage, storage->csd))
|
||||
return 0;
|
||||
DPRINTF("[sd] got csd\n");
|
||||
|
||||
//Parse CSD.
|
||||
_sd_storage_parse_csd(storage);
|
||||
switch (storage->csd.structure)
|
||||
u32 *csd = (u32 *)storage->csd;
|
||||
u32 csd_struct = unstuff_bits(csd, 126, 2);
|
||||
switch (csd_struct)
|
||||
{
|
||||
case 0:
|
||||
storage->sec_cnt = storage->csd.capacity;
|
||||
storage->sec_cnt = (1 + unstuff_bits(csd, 62, 12)) << (unstuff_bits(csd, 47, 3) + 2);
|
||||
break;
|
||||
case 1:
|
||||
storage->sec_cnt = storage->csd.c_size << 10;
|
||||
storage->sec_cnt = (1 + unstuff_bits(csd, 48, 22)) << 10;
|
||||
break;
|
||||
case 2:
|
||||
storage->sec_cnt = (1 + unstuff_bits(csd, 48, 22)) << 10;
|
||||
break;
|
||||
default:
|
||||
DPRINTF("[sd] Unknown CSD structure %d\n", storage->csd.structure);
|
||||
DPRINTF("[sd] Unknown CSD structure %d\n", csd_struct);
|
||||
//TODO: I've encountered this with one of my SD cards, but
|
||||
// according to the spec only version 0 and 1 are
|
||||
// supposed to be in use (mine was version 2).
|
||||
//return 0;
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -1031,11 +794,11 @@ int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32
|
||||
u8 *buf = (u8 *)malloc(512);
|
||||
if (!_sd_storage_get_scr(storage, buf))
|
||||
return 0;
|
||||
//gfx_hexdump(&gfx_con, 0, storage->raw_scr, 8);
|
||||
memcpy(storage->scr, buf, 8);
|
||||
DPRINTF("[sd] got scr\n");
|
||||
|
||||
// Check if card supports a wider bus and if it's not SD Version 1.X
|
||||
if (bus_width == SDMMC_BUS_WIDTH_4 && (storage->scr.bus_widths & 4) && (storage->scr.sda_vsn & 0xF))
|
||||
// Check if card supports a wider bus and if it's not SD Version 1.0
|
||||
if (bus_width == SDMMC_BUS_WIDTH_4 && storage->scr[1] & 4 && (storage->scr[0] & 0xF))
|
||||
{
|
||||
if (!_sd_storage_execute_app_cmd_type1(storage, &tmp, SD_APP_SET_BUS_WIDTH, SD_BUS_WIDTH_4, 0, R1_STATE_TRAN))
|
||||
{
|
||||
@@ -1057,7 +820,7 @@ int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32
|
||||
}
|
||||
DPRINTF("[sd] enabled highspeed (low voltage)\n");
|
||||
}
|
||||
else if (type != 6 && (storage->scr.sda_vsn & 0xF) != 0)
|
||||
else if (type != 6 && (storage->scr[0] & 0xF) != 0)
|
||||
{
|
||||
if (!_sd_storage_enable_highspeed_high_volt(storage, buf))
|
||||
{
|
||||
@@ -1069,10 +832,6 @@ int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32
|
||||
|
||||
sdmmc_sd_clock_ctrl(sdmmc, 1);
|
||||
|
||||
// Parse additional card info from sd status
|
||||
if (_sd_storage_get_ssr(storage, buf))
|
||||
DPRINTF("[sd] got sd status\n");
|
||||
|
||||
free(buf);
|
||||
return 1;
|
||||
}
|
||||
@@ -1089,7 +848,7 @@ int _gc_storage_custom_cmd(sdmmc_storage_t *storage, void *buf)
|
||||
|
||||
sdmmc_req_t reqbuf;
|
||||
reqbuf.buf = buf;
|
||||
reqbuf.blksize = 64;
|
||||
reqbuf.blksize = 0x40;
|
||||
reqbuf.num_sectors = 1;
|
||||
reqbuf.is_write = 1;
|
||||
reqbuf.is_multi_block = 0;
|
||||
|
||||
71
ipl/sdmmc.h
71
ipl/sdmmc.h
@@ -20,65 +20,6 @@
|
||||
#include "types.h"
|
||||
#include "sdmmc_driver.h"
|
||||
|
||||
typedef struct _mmc_cid
|
||||
{
|
||||
u32 manfid;
|
||||
u8 prod_name[8];
|
||||
u8 card_bga;
|
||||
u8 prv;
|
||||
u32 serial;
|
||||
u16 oemid;
|
||||
u16 year;
|
||||
u8 hwrev;
|
||||
u8 fwrev;
|
||||
u8 month;
|
||||
} mmc_cid_t;
|
||||
|
||||
typedef struct _mmc_csd
|
||||
{
|
||||
u8 structure;
|
||||
u8 mmca_vsn;
|
||||
u16 cmdclass;
|
||||
u32 c_size;
|
||||
u32 r2w_factor;
|
||||
u32 max_dtr;
|
||||
u32 erase_size; /* In sectors */
|
||||
u32 read_blkbits;
|
||||
u32 write_blkbits;
|
||||
u32 capacity;
|
||||
u8 write_protect;
|
||||
} mmc_csd_t;
|
||||
|
||||
typedef struct _mmc_ext_csd
|
||||
{
|
||||
u8 rev;
|
||||
u32 sectors;
|
||||
int bkops; /* background support bit */
|
||||
int bkops_en; /* manual bkops enable bit */
|
||||
u8 ext_struct; /* 194 */
|
||||
u8 card_type; /* 196 */
|
||||
u8 bkops_status; /* 246 */
|
||||
u16 dev_version;
|
||||
u8 boot_mult;
|
||||
u8 rpmb_mult;
|
||||
} mmc_ext_csd_t;
|
||||
|
||||
typedef struct _sd_scr
|
||||
{
|
||||
u8 sda_vsn;
|
||||
u8 sda_spec3;
|
||||
u8 bus_widths;
|
||||
u8 cmds;
|
||||
} sd_scr_t;
|
||||
|
||||
typedef struct _sd_ssr {
|
||||
u8 bus_width;
|
||||
u8 speed_class;
|
||||
u8 uhs_grade;
|
||||
u8 video_class;
|
||||
u8 app_class;
|
||||
} sd_ssr_t;
|
||||
|
||||
/*! SDMMC storage context. */
|
||||
typedef struct _sdmmc_storage_t
|
||||
{
|
||||
@@ -88,15 +29,9 @@ typedef struct _sdmmc_storage_t
|
||||
u32 sec_cnt;
|
||||
int is_low_voltage;
|
||||
u32 partition;
|
||||
u8 raw_cid[0x10];
|
||||
u8 raw_csd[0x10];
|
||||
u8 raw_scr[8];
|
||||
u8 raw_ssr[0x40];
|
||||
mmc_cid_t cid;
|
||||
mmc_csd_t csd;
|
||||
mmc_ext_csd_t ext_csd;
|
||||
sd_scr_t scr;
|
||||
sd_ssr_t ssr;
|
||||
u8 cid[0x10];
|
||||
u8 csd[0x10];
|
||||
u8 scr[8];
|
||||
} sdmmc_storage_t;
|
||||
|
||||
int sdmmc_storage_end(sdmmc_storage_t *storage);
|
||||
|
||||
@@ -204,34 +204,32 @@ int sdmmc_setup_clock(sdmmc_t *sdmmc, u32 type)
|
||||
case 1:
|
||||
case 5:
|
||||
case 6:
|
||||
sdmmc->regs->hostctl &= 0xFB; //Should this be 0xFFFB (~4) ?
|
||||
sdmmc->regs->hostctl2 &= SDHCI_CTRL_VDD_330;
|
||||
sdmmc->regs->hostctl &= 0xFB;
|
||||
sdmmc->regs->hostctl2 &= 0xFFF7;
|
||||
break;
|
||||
case 2:
|
||||
case 7:
|
||||
sdmmc->regs->hostctl |= 4;
|
||||
sdmmc->regs->hostctl2 &= SDHCI_CTRL_VDD_330;
|
||||
sdmmc->regs->hostctl |= 4;
|
||||
sdmmc->regs->hostctl2 &= 0xFFF7;
|
||||
break;
|
||||
case 3:
|
||||
case 11:
|
||||
case 13:
|
||||
case 14:
|
||||
sdmmc->regs->hostctl2 = (sdmmc->regs->hostctl2 & SDHCI_CTRL_UHS_MASK) | UHS_SDR104_BUS_SPEED;
|
||||
sdmmc->regs->hostctl2 |= SDHCI_CTRL_VDD_180;
|
||||
sdmmc->regs->hostctl2 = (sdmmc->regs->hostctl2 & 0xFFF8) | 3;
|
||||
sdmmc->regs->hostctl2 |= 8;
|
||||
break;
|
||||
case 4:
|
||||
//Non standard
|
||||
sdmmc->regs->hostctl2 = (sdmmc->regs->hostctl2 & SDHCI_CTRL_UHS_MASK) | HS400_BUS_SPEED;
|
||||
sdmmc->regs->hostctl2 |= SDHCI_CTRL_VDD_180;
|
||||
sdmmc->regs->hostctl2 = (sdmmc->regs->hostctl2 & 0xFFF8) | 5;
|
||||
sdmmc->regs->hostctl2 |= 8;
|
||||
break;
|
||||
case 8:
|
||||
sdmmc->regs->hostctl2 = (sdmmc->regs->hostctl2 & SDHCI_CTRL_UHS_MASK) | UHS_SDR12_BUS_SPEED;
|
||||
sdmmc->regs->hostctl2 |= SDHCI_CTRL_VDD_180;
|
||||
sdmmc->regs->hostctl2 = sdmmc->regs->hostctl2 & 0xFFF8;
|
||||
sdmmc->regs->hostctl2 |= 8;
|
||||
break;
|
||||
case 10:
|
||||
//T210 Errata for SDR50, the host must be set to SDR104.
|
||||
sdmmc->regs->hostctl2 = (sdmmc->regs->hostctl2 & SDHCI_CTRL_UHS_MASK) | UHS_SDR104_BUS_SPEED;
|
||||
sdmmc->regs->hostctl2 |= SDHCI_CTRL_VDD_180;
|
||||
sdmmc->regs->hostctl2 = (sdmmc->regs->hostctl2 & 0xFFF8) | 2;
|
||||
sdmmc->regs->hostctl2 |= 8;
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -306,30 +304,10 @@ static int _sdmmc_cache_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 size, u32 type)
|
||||
case SDMMC_RSP_TYPE_2:
|
||||
if (size < 0x10)
|
||||
return 0;
|
||||
// CRC is stripped, so shifting is needed.
|
||||
u32 tempreg;
|
||||
for (int i = 0; i < 4; i++)
|
||||
{
|
||||
switch(i)
|
||||
{
|
||||
case 0:
|
||||
tempreg = sdmmc->regs->rspreg3;
|
||||
break;
|
||||
case 1:
|
||||
tempreg = sdmmc->regs->rspreg2;
|
||||
break;
|
||||
case 2:
|
||||
tempreg = sdmmc->regs->rspreg1;
|
||||
break;
|
||||
case 3:
|
||||
tempreg = sdmmc->regs->rspreg0;
|
||||
break;
|
||||
}
|
||||
rsp[i] = tempreg << 8;
|
||||
|
||||
if (i != 0)
|
||||
rsp[i - 1] |= (tempreg >> 24) & 0xFF;
|
||||
}
|
||||
rsp[0] = sdmmc->regs->rspreg0;
|
||||
rsp[1] = sdmmc->regs->rspreg1;
|
||||
rsp[2] = sdmmc->regs->rspreg2;
|
||||
rsp[3] = sdmmc->regs->rspreg3;
|
||||
break;
|
||||
default:
|
||||
return 0;
|
||||
@@ -553,16 +531,16 @@ int sdmmc_config_tuning(sdmmc_t *sdmmc, u32 type, u32 cmd)
|
||||
sdmmc->regs->field_1C0 = (sdmmc->regs->field_1C0 & 0xFFFF1FFF) | flag;
|
||||
sdmmc->regs->field_1C0 = (sdmmc->regs->field_1C0 & 0xFFFFE03F) | 0x40;
|
||||
sdmmc->regs->field_1C0 |= 0x20000;
|
||||
sdmmc->regs->hostctl2 |= SDHCI_CTRL_EXEC_TUNING;
|
||||
sdmmc->regs->hostctl2 |= 0x40;
|
||||
|
||||
for (u32 i = 0; i < max; i++)
|
||||
{
|
||||
_sdmmc_config_tuning_once(sdmmc, cmd);
|
||||
if (!(sdmmc->regs->hostctl2 & SDHCI_CTRL_EXEC_TUNING))
|
||||
if (!(sdmmc->regs->hostctl2 & 0x40))
|
||||
break;
|
||||
}
|
||||
|
||||
if (sdmmc->regs->hostctl2 & SDHCI_CTRL_TUNED_CLK)
|
||||
if (sdmmc->regs->hostctl2 & 0x80)
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
@@ -579,14 +557,14 @@ static int _sdmmc_enable_internal_clock(sdmmc_t *sdmmc)
|
||||
return 0;
|
||||
}
|
||||
|
||||
sdmmc->regs->hostctl2 &= ~SDHCI_CTRL_PRESET_VAL_EN;
|
||||
sdmmc->regs->clkcon &= ~TEGRA_MMC_CLKCON_CLKGEN_SELECT;
|
||||
sdmmc->regs->hostctl2 |= SDHCI_HOST_VERSION_4_EN;
|
||||
sdmmc->regs->hostctl2 &= 0x7FFF;
|
||||
sdmmc->regs->clkcon &= ~TEGRA_MMC_CLKCON_CLKGEN_SELECT;
|
||||
sdmmc->regs->hostctl2 |= 0x1000;
|
||||
|
||||
if (!(sdmmc->regs->capareg & 0x10000000))
|
||||
return 0;
|
||||
|
||||
sdmmc->regs->hostctl2 |= SDHCI_ADDRESSING_64BIT_EN;
|
||||
sdmmc->regs->hostctl2 |= 0x2000;
|
||||
sdmmc->regs->hostctl &= 0xE7;
|
||||
sdmmc->regs->timeoutcon = (sdmmc->regs->timeoutcon & 0xF0) | 0xE;
|
||||
|
||||
@@ -1078,7 +1056,7 @@ int sdmmc_enable_low_voltage(sdmmc_t *sdmmc)
|
||||
_sdmmc_get_clkcon(sdmmc);
|
||||
sleep(5000);
|
||||
|
||||
if (sdmmc->regs->hostctl2 & SDHCI_CTRL_VDD_180)
|
||||
if (sdmmc->regs->hostctl2 & 8)
|
||||
{
|
||||
sdmmc->regs->clkcon |= TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE;
|
||||
_sdmmc_get_clkcon(sdmmc);
|
||||
|
||||
@@ -45,28 +45,9 @@
|
||||
#define SDMMC_RSP_TYPE_5 5
|
||||
|
||||
/*! SDMMC mask interrupt status. */
|
||||
#define SDMMC_MASKINT_MASKED 0
|
||||
#define SDMMC_MASKINT_MASKED 0
|
||||
#define SDMMC_MASKINT_NOERROR -1
|
||||
#define SDMMC_MASKINT_ERROR -2
|
||||
|
||||
/*! SDMMC host control 2 */
|
||||
#define SDHCI_CTRL_UHS_MASK 0xFFF8
|
||||
#define SDHCI_CTRL_VDD_330 0xFFF7
|
||||
#define SDHCI_CTRL_VDD_180 8
|
||||
#define SDHCI_CTRL_EXEC_TUNING 0x40
|
||||
#define SDHCI_CTRL_TUNED_CLK 0x80
|
||||
#define SDHCI_HOST_VERSION_4_EN 0x1000
|
||||
#define SDHCI_ADDRESSING_64BIT_EN 0x2000
|
||||
#define SDHCI_CTRL_PRESET_VAL_EN 0x8000
|
||||
|
||||
/*! SD bus speeds. */
|
||||
#define UHS_SDR12_BUS_SPEED 0
|
||||
#define HIGH_SPEED_BUS_SPEED 1
|
||||
#define UHS_SDR25_BUS_SPEED 1
|
||||
#define UHS_SDR50_BUS_SPEED 2
|
||||
#define UHS_SDR104_BUS_SPEED 3
|
||||
#define UHS_DDR50_BUS_SPEED 4
|
||||
#define HS400_BUS_SPEED 5
|
||||
#define SDMMC_MASKINT_ERROR -2
|
||||
|
||||
/*! Helper for SWITCH command argument. */
|
||||
#define SDMMC_SWITCH(mode, index, value) (((mode) << 24) | ((index) << 16) | ((value) << 8))
|
||||
|
||||
@@ -23,7 +23,7 @@
|
||||
*/
|
||||
void sdram_lp0_save_params(const void *params)
|
||||
{
|
||||
struct sdram_params *sdram = (struct sdram_params *)params;
|
||||
const struct sdram_params *sdram = (const struct sdram_params *)params;
|
||||
struct tegra_pmc_regs *pmc = (struct tegra_pmc_regs *)PMC_BASE;
|
||||
|
||||
#define pack(src, src_bits, dst, dst_bits) { \
|
||||
@@ -44,78 +44,6 @@ void sdram_lp0_save_params(const void *params)
|
||||
/* 32 bits version c macro */
|
||||
#define c32(value, pmcreg) pmc->pmcreg = value
|
||||
|
||||
//TODO: pkg1.1 reads them from MC.
|
||||
sdram->McGeneralizedCarveout1Bom = 0;
|
||||
sdram->McGeneralizedCarveout1BomHi = 0;
|
||||
sdram->McGeneralizedCarveout1Size128kb = 0;
|
||||
sdram->McGeneralizedCarveout1Access0 = 0;
|
||||
sdram->McGeneralizedCarveout1Access1 = 0;
|
||||
sdram->McGeneralizedCarveout1Access2 = 0;
|
||||
sdram->McGeneralizedCarveout1Access3 = 0;
|
||||
sdram->McGeneralizedCarveout1Access4 = 0;
|
||||
sdram->McGeneralizedCarveout1ForceInternalAccess0 = 0;
|
||||
sdram->McGeneralizedCarveout1ForceInternalAccess1 = 0;
|
||||
sdram->McGeneralizedCarveout1ForceInternalAccess2 = 0;
|
||||
sdram->McGeneralizedCarveout1ForceInternalAccess3 = 0;
|
||||
sdram->McGeneralizedCarveout1ForceInternalAccess4 = 0;
|
||||
sdram->McGeneralizedCarveout1Cfg0 = 0;
|
||||
sdram->McGeneralizedCarveout2Bom = 0x80020000;
|
||||
sdram->McGeneralizedCarveout2BomHi = 0;
|
||||
sdram->McGeneralizedCarveout2Size128kb = 2;
|
||||
sdram->McGeneralizedCarveout2Access0 = 0;
|
||||
sdram->McGeneralizedCarveout2Access1 = 0;
|
||||
sdram->McGeneralizedCarveout2Access2 = 0x3000000;
|
||||
sdram->McGeneralizedCarveout2Access3 = 0;
|
||||
sdram->McGeneralizedCarveout2Access4 = 0x300;
|
||||
sdram->McGeneralizedCarveout2ForceInternalAccess0 = 0;
|
||||
sdram->McGeneralizedCarveout2ForceInternalAccess1 = 0;
|
||||
sdram->McGeneralizedCarveout2ForceInternalAccess2 = 0;
|
||||
sdram->McGeneralizedCarveout2ForceInternalAccess3 = 0;
|
||||
sdram->McGeneralizedCarveout2ForceInternalAccess4 = 0;
|
||||
sdram->McGeneralizedCarveout2Cfg0 = 0x440167E;
|
||||
sdram->McGeneralizedCarveout3Bom = 0;
|
||||
sdram->McGeneralizedCarveout3BomHi = 0;
|
||||
sdram->McGeneralizedCarveout3Size128kb = 0;
|
||||
sdram->McGeneralizedCarveout3Access0 = 0;
|
||||
sdram->McGeneralizedCarveout3Access1 = 0;
|
||||
sdram->McGeneralizedCarveout3Access2 = 0x3000000;
|
||||
sdram->McGeneralizedCarveout3Access3 = 0;
|
||||
sdram->McGeneralizedCarveout3Access4 = 0x300;
|
||||
sdram->McGeneralizedCarveout3ForceInternalAccess0 = 0;
|
||||
sdram->McGeneralizedCarveout3ForceInternalAccess1 = 0;
|
||||
sdram->McGeneralizedCarveout3ForceInternalAccess2 = 0;
|
||||
sdram->McGeneralizedCarveout3ForceInternalAccess3 = 0;
|
||||
sdram->McGeneralizedCarveout3ForceInternalAccess4 = 0;
|
||||
sdram->McGeneralizedCarveout3Cfg0 = 0x4401E7E;
|
||||
sdram->McGeneralizedCarveout4Bom = 0;
|
||||
sdram->McGeneralizedCarveout4BomHi = 0;
|
||||
sdram->McGeneralizedCarveout4Size128kb = 0;
|
||||
sdram->McGeneralizedCarveout4Access0 = 0;
|
||||
sdram->McGeneralizedCarveout4Access1 = 0;
|
||||
sdram->McGeneralizedCarveout4Access2 = 0;
|
||||
sdram->McGeneralizedCarveout4Access3 = 0;
|
||||
sdram->McGeneralizedCarveout4Access4 = 0;
|
||||
sdram->McGeneralizedCarveout4ForceInternalAccess0 = 0;
|
||||
sdram->McGeneralizedCarveout4ForceInternalAccess1 = 0;
|
||||
sdram->McGeneralizedCarveout4ForceInternalAccess2 = 0;
|
||||
sdram->McGeneralizedCarveout4ForceInternalAccess3 = 0;
|
||||
sdram->McGeneralizedCarveout4ForceInternalAccess4 = 0;
|
||||
sdram->McGeneralizedCarveout4Cfg0 = 0x8F;
|
||||
sdram->McGeneralizedCarveout5Bom = 0;
|
||||
sdram->McGeneralizedCarveout5BomHi = 0;
|
||||
sdram->McGeneralizedCarveout5Size128kb = 0;
|
||||
sdram->McGeneralizedCarveout5Access0 = 0;
|
||||
sdram->McGeneralizedCarveout5Access1 = 0;
|
||||
sdram->McGeneralizedCarveout5Access2 = 0;
|
||||
sdram->McGeneralizedCarveout5Access3 = 0;
|
||||
sdram->McGeneralizedCarveout5Access4 = 0;
|
||||
sdram->McGeneralizedCarveout5ForceInternalAccess0 = 0;
|
||||
sdram->McGeneralizedCarveout5ForceInternalAccess1 = 0;
|
||||
sdram->McGeneralizedCarveout5ForceInternalAccess2 = 0;
|
||||
sdram->McGeneralizedCarveout5ForceInternalAccess3 = 0;
|
||||
sdram->McGeneralizedCarveout5ForceInternalAccess4 = 0;
|
||||
sdram->McGeneralizedCarveout5Cfg0 = 0x8F;
|
||||
|
||||
s(EmcClockSource, 7:0, scratch6, 15:8);
|
||||
s(EmcClockSourceDll, 7:0, scratch6, 23:16);
|
||||
s(EmcClockSource, 31:29, scratch6, 26:24);
|
||||
@@ -787,8 +715,7 @@ void sdram_lp0_save_params(const void *params)
|
||||
s32(EmcBctSpare5, scratch42);
|
||||
s32(EmcBctSpare4, scratch44);
|
||||
s32(SwizzleRankByteEncode, scratch45);
|
||||
//s32(EmcBctSpare2, scratch46);
|
||||
pmc->scratch46 = 0x40000DD8;
|
||||
s32(EmcBctSpare2, scratch46);
|
||||
s32(EmcBctSpare1, scratch47);
|
||||
s32(EmcBctSpare0, scratch48);
|
||||
s32(EmcBctSpare9, scratch50);
|
||||
@@ -1077,6 +1004,11 @@ void sdram_lp0_save_params(const void *params)
|
||||
s32(McGeneralizedCarveout5ForceInternalAccess2, secure_scratch106);
|
||||
s32(McGeneralizedCarveout5ForceInternalAccess3, secure_scratch107);
|
||||
|
||||
/* Locking PMC secure scratch register (8 ~ 15) for writing */
|
||||
//c(0x5555, sec_disable2, 15:0);
|
||||
/* Locking PMC secure scratch register (4~ 7) for both reading and writing */
|
||||
//c(0xff, sec_disable, 19:12);
|
||||
|
||||
c32(0, scratch2);
|
||||
s(PllMInputDivider, 7:0, scratch2, 7:0);
|
||||
s(PllMFeedbackDivider, 7:0, scratch2, 15:8);
|
||||
|
||||
@@ -262,7 +262,7 @@ struct sdram_params {
|
||||
/* Specifies the value for EMC_PUTERM_WIDTH */
|
||||
u32 EmcPutermWidth;
|
||||
/* Specifies the value for EMC_PUTERM_ADJ */
|
||||
////u32 EmcPutermAdj;
|
||||
u32 EmcPutermAdj;
|
||||
|
||||
/* Specifies the value for EMC_QRST */
|
||||
u32 EmcQRst;
|
||||
@@ -647,7 +647,7 @@ struct sdram_params {
|
||||
u32 EmcAcpdControl;
|
||||
|
||||
/* Specifies the value for EMC_SWIZZLE_RANK0_BYTE_CFG */
|
||||
////u32 EmcSwizzleRank0ByteCfg;
|
||||
u32 EmcSwizzleRank0ByteCfg;
|
||||
/* Specifies the value for EMC_SWIZZLE_RANK0_BYTE0 */
|
||||
u32 EmcSwizzleRank0Byte0;
|
||||
/* Specifies the value for EMC_SWIZZLE_RANK0_BYTE1 */
|
||||
@@ -657,7 +657,7 @@ struct sdram_params {
|
||||
/* Specifies the value for EMC_SWIZZLE_RANK0_BYTE3 */
|
||||
u32 EmcSwizzleRank0Byte3;
|
||||
/* Specifies the value for EMC_SWIZZLE_RANK1_BYTE_CFG */
|
||||
////u32 EmcSwizzleRank1ByteCfg;
|
||||
u32 EmcSwizzleRank1ByteCfg;
|
||||
/* Specifies the value for EMC_SWIZZLE_RANK1_BYTE0 */
|
||||
u32 EmcSwizzleRank1Byte0;
|
||||
/* Specifies the value for EMC_SWIZZLE_RANK1_BYTE1 */
|
||||
|
||||
10
ipl/se.c
10
ipl/se.c
@@ -67,7 +67,7 @@ static int _se_wait()
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int _se_execute(u32 op, void *dst, u32 dst_size, const void *src, u32 src_size)
|
||||
static int _se_execute(u32 op, void *dst, u32 dst_size, void *src, u32 src_size)
|
||||
{
|
||||
se_ll_t *ll_dst = NULL, *ll_src = NULL;
|
||||
|
||||
@@ -99,7 +99,7 @@ static int _se_execute(u32 op, void *dst, u32 dst_size, const void *src, u32 src
|
||||
return res;
|
||||
}
|
||||
|
||||
static int _se_execute_one_block(u32 op, void *dst, u32 dst_size, const void *src, u32 src_size)
|
||||
static int _se_execute_one_block(u32 op, void *dst, u32 dst_size, void *src, u32 src_size)
|
||||
{
|
||||
u8 *block = (u8 *)malloc(0x10);
|
||||
memset(block, 0, 0x10);
|
||||
@@ -156,7 +156,7 @@ void se_aes_key_clear(u32 ks)
|
||||
}
|
||||
}
|
||||
|
||||
int se_aes_unwrap_key(u32 ks_dst, u32 ks_src, const void *input)
|
||||
int se_aes_unwrap_key(u32 ks_dst, u32 ks_src, void *input)
|
||||
{
|
||||
SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_DEC_ALG(ALG_AES_DEC) | SE_CONFIG_DST(DST_KEYTAB);
|
||||
SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_KEY_INDEX(ks_src) | SE_CRYPTO_CORE_SEL(CORE_DECRYPT);
|
||||
@@ -164,7 +164,7 @@ int se_aes_unwrap_key(u32 ks_dst, u32 ks_src, const void *input)
|
||||
return _se_execute(OP_START, NULL, 0, input, 0x10);
|
||||
}
|
||||
|
||||
int se_aes_crypt_block_ecb(u32 ks, u32 enc, void *dst, const void *src)
|
||||
int se_aes_crypt_block_ecb(u32 ks, u32 enc, void *dst, void *src)
|
||||
{
|
||||
if (enc)
|
||||
{
|
||||
@@ -180,7 +180,7 @@ int se_aes_crypt_block_ecb(u32 ks, u32 enc, void *dst, const void *src)
|
||||
return _se_execute(OP_START, dst, 0x10, src, 0x10);
|
||||
}
|
||||
|
||||
int se_aes_crypt_ctr(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_size, void *ctr)
|
||||
int se_aes_crypt_ctr(u32 ks, void *dst, u32 dst_size, void *src, u32 src_size, void *ctr)
|
||||
{
|
||||
SE(SE_SPARE_0_REG_OFFSET) = 1;
|
||||
SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_ENC_ALG(ALG_AES_ENC) | SE_CONFIG_DST(DST_MEMORY);
|
||||
|
||||
6
ipl/se.h
6
ipl/se.h
@@ -23,8 +23,8 @@ void se_rsa_acc_ctrl(u32 rs, u32 flags);
|
||||
void se_key_acc_ctrl(u32 ks, u32 flags);
|
||||
void se_aes_key_set(u32 ks, void *key, u32 size);
|
||||
void se_aes_key_clear(u32 ks);
|
||||
int se_aes_unwrap_key(u32 ks_dst, u32 ks_src, const void *input);
|
||||
int se_aes_crypt_block_ecb(u32 ks, u32 enc, void *dst, const void *src);
|
||||
int se_aes_crypt_ctr(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_size, void *ctr);
|
||||
int se_aes_unwrap_key(u32 ks_dst, u32 ks_src, void *input);
|
||||
int se_aes_crypt_block_ecb(u32 ks, u32 enc, void *dst, void *src);
|
||||
int se_aes_crypt_ctr(u32 ks, void *dst, u32 dst_size, void *src, u32 src_size, void *ctr);
|
||||
|
||||
#endif
|
||||
|
||||
73
ipl/tui.c
73
ipl/tui.c
@@ -17,9 +17,7 @@
|
||||
#include "tui.h"
|
||||
#include "btn.h"
|
||||
|
||||
extern u8 *Kc_HEKATE_LOGO;
|
||||
|
||||
void tui_pbar(gfx_con_t *con, int x, int y, u32 val, u32 fgcol, u32 bgcol)
|
||||
void tui_pbar(gfx_con_t *con, int x, int y, u32 val)
|
||||
{
|
||||
u32 cx, cy;
|
||||
|
||||
@@ -27,14 +25,14 @@ void tui_pbar(gfx_con_t *con, int x, int y, u32 val, u32 fgcol, u32 bgcol)
|
||||
|
||||
gfx_con_setpos(con, x, y);
|
||||
|
||||
gfx_printf(con, "%k[%3d%%]%k", fgcol, val, 0xFFCCCCCC);
|
||||
gfx_printf(con, "[%3d%%]", val);
|
||||
|
||||
x += 7 * con->fntsz;
|
||||
x += 7 * 8;
|
||||
|
||||
for (int i = 0; i < con->fontmult * 6; i++)
|
||||
for (int i = 0; i < 6; i++)
|
||||
{
|
||||
gfx_line(con->gfx_ctxt, x, y + i + 1, x + 3 * val, y + i + 1, fgcol);
|
||||
gfx_line(con->gfx_ctxt, x + 3 * val, y + i + 1, x + 3 * 100, y + i + 1, bgcol);
|
||||
gfx_line(con->gfx_ctxt, x, y + i + 1, x + 3 * val, y + i + 1, 0xFFFFFFFF);
|
||||
gfx_line(con->gfx_ctxt, x + 3 * val, y + i + 1, x + 3 * 100, y + i + 1, 0xFF888888);
|
||||
}
|
||||
|
||||
gfx_con_setpos(con, cx, cy);
|
||||
@@ -43,70 +41,37 @@ void tui_pbar(gfx_con_t *con, int x, int y, u32 val, u32 fgcol, u32 bgcol)
|
||||
void *tui_do_menu(gfx_con_t *con, menu_t *menu)
|
||||
{
|
||||
int idx = 0, cnt;
|
||||
int prev_idx = 0;
|
||||
|
||||
gfx_clear(con->gfx_ctxt, 0xFF1B1B1B);
|
||||
gfx_set_logo(con->gfx_ctxt, Kc_HEKATE_LOGO);
|
||||
gfx_clear(con->gfx_ctxt, 0xFF000000);
|
||||
|
||||
while (1)
|
||||
{
|
||||
gfx_con_setcol(con, 0xFFCCCCCC, 1, 0xFF1B1B1B);
|
||||
gfx_con_setcol(con, 0xFFFFFFFF, 1, 0xFF000000);
|
||||
gfx_con_setpos(con, menu->x, menu->y);
|
||||
gfx_printf(con, "[%s]\n\n", menu->caption);
|
||||
|
||||
// Skip caption or seperator lines selection
|
||||
while (menu->ents[idx].type == MENT_CAPTION ||
|
||||
menu->ents[idx].type == MENT_CHGLINE)
|
||||
{
|
||||
if (prev_idx <= idx || (!idx && prev_idx == cnt - 1))
|
||||
{
|
||||
idx++;
|
||||
if (idx > (cnt - 1))
|
||||
{
|
||||
idx = 0;
|
||||
prev_idx = 0;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
idx--;
|
||||
if (idx < 0)
|
||||
{
|
||||
idx = cnt - 1;
|
||||
prev_idx = cnt;
|
||||
}
|
||||
}
|
||||
}
|
||||
prev_idx = idx;
|
||||
|
||||
// Draw the menu
|
||||
for (cnt = 0; menu->ents[cnt].type != MENT_END; cnt++)
|
||||
{
|
||||
if (cnt == idx)
|
||||
gfx_con_setcol(con, 0xFF1B1B1B, 1, 0xFFCCCCCC);
|
||||
gfx_con_setcol(con, 0xFF000000, 1, 0xFFCCCCCC);
|
||||
else
|
||||
gfx_con_setcol(con, 0xFFCCCCCC, 1, 0xFF1B1B1B);
|
||||
if (cnt != idx && menu->ents[cnt].type == MENT_CAPTION)
|
||||
gfx_printf(con, "%k %s", menu->ents[cnt].color, menu->ents[cnt].caption);
|
||||
else
|
||||
gfx_printf(con, " %s", menu->ents[cnt].caption);
|
||||
gfx_con_setcol(con, 0xFFFFFFFF, 1, 0xFF000000);
|
||||
con->x += 8;
|
||||
gfx_printf(con, "%s", menu->ents[cnt].caption);
|
||||
if(menu->ents[cnt].type == MENT_MENU)
|
||||
gfx_printf(con, "%k...", 0xFFEE9900);
|
||||
gfx_printf(con, " \n");
|
||||
gfx_putc(con, '\n');
|
||||
}
|
||||
gfx_con_setcol(con, 0xFFCCCCCC, 1, 0xFF1B1B1B);
|
||||
|
||||
gfx_con_setcol(con, 0xFFFFFFFF, 1, 0xFF000000);
|
||||
gfx_putc(con, '\n');
|
||||
|
||||
u32 btn = btn_wait();
|
||||
|
||||
if (btn & BTN_VOL_DOWN && idx < (cnt - 1))
|
||||
if (btn & BTN_VOL_DOWN && idx < cnt - 1)
|
||||
idx++;
|
||||
else if (btn & BTN_VOL_DOWN && idx == (cnt - 1))
|
||||
idx = 0;
|
||||
if (btn & BTN_VOL_UP && idx > 0)
|
||||
idx--;
|
||||
else if (btn & BTN_VOL_UP && idx == 0)
|
||||
idx = cnt - 1;
|
||||
if (btn & BTN_POWER)
|
||||
{
|
||||
ment_t *ent = &menu->ents[idx];
|
||||
@@ -124,12 +89,8 @@ void *tui_do_menu(gfx_con_t *con, menu_t *menu)
|
||||
case MENT_BACK:
|
||||
return NULL;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
gfx_con_setfontsz(con, 16);
|
||||
gfx_clear(con->gfx_ctxt, 0xFF1B1B1B);
|
||||
gfx_set_logo(con->gfx_ctxt, Kc_HEKATE_LOGO);
|
||||
gfx_clear(con->gfx_ctxt, 0xFF000000);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
21
ipl/tui.h
21
ipl/tui.h
@@ -20,19 +20,16 @@
|
||||
#include "types.h"
|
||||
#include "gfx.h"
|
||||
|
||||
#define MENT_END 0
|
||||
#define MENT_END 0
|
||||
#define MENT_HANDLER 1
|
||||
#define MENT_MENU 2
|
||||
#define MENT_CHOICE 3
|
||||
#define MENT_BACK 4
|
||||
#define MENT_CAPTION 5
|
||||
#define MENT_CHGLINE 6
|
||||
#define MENT_MENU 2
|
||||
#define MENT_CHOICE 3
|
||||
#define MENT_BACK 4
|
||||
|
||||
typedef struct _ment_t
|
||||
{
|
||||
u32 type;
|
||||
const char *caption;
|
||||
u32 color;
|
||||
void *data;
|
||||
union
|
||||
{
|
||||
@@ -50,14 +47,12 @@ typedef struct _menu_t
|
||||
} menu_t;
|
||||
|
||||
#define MDEF_END() {MENT_END}
|
||||
#define MDEF_HANDLER(caption, _handler) { MENT_HANDLER, caption, 0, NULL, { .handler = _handler } }
|
||||
#define MDEF_HANDLER_EX(caption, data, _handler) { MENT_HANDLER, caption, 0, data, { .handler = _handler } }
|
||||
#define MDEF_MENU(caption, _menu) { MENT_MENU, caption, 0, NULL, { .menu = _menu } }
|
||||
#define MDEF_HANDLER(caption, _handler) { MENT_HANDLER, caption, NULL, { .handler = _handler } }
|
||||
#define MDEF_HANDLER_EX(caption, data, _handler) { MENT_HANDLER, caption, data, { .handler = _handler } }
|
||||
#define MDEF_MENU(caption, _menu) { MENT_MENU, caption, NULL, { .menu = _menu } }
|
||||
#define MDEF_BACK() { MENT_BACK, "Back" }
|
||||
#define MDEF_CAPTION(caption, color) { MENT_CAPTION, caption, color }
|
||||
#define MDEF_CHGLINE() {MENT_CHGLINE}
|
||||
|
||||
void tui_pbar(gfx_con_t *con, int x, int y, u32 val, u32 fgcol, u32 bgcol);
|
||||
void tui_pbar(gfx_con_t *con, int x, int y, u32 val);
|
||||
void *tui_do_menu(gfx_con_t *con, menu_t *menu);
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user