OmniNX/hekate-pro
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Author SHA1 Message Date
CTCaer ef2247a3f0 Bump hekate to v6.5.0 and Nyx to v1.9.0 2026-03-27 10:01:21 +01:00
CTCaer 0f4636546c hos: add 21.2.0 support 2026-03-27 10:01:20 +01:00
CTCaer 22dd1a42c7 hekate/nyx: remove coreboot support 
Everything external is finally updated and beyond parity with old things that needed it.
 2026-03-27 10:01:20 +01:00
CTCaer 4daa02fe85 bdk: hwinit: remove coreboot support 
Everything external is finally updated and beyond parity with old things that needed it.
 2026-03-27 10:00:26 +01:00
CTCaer 8c8ca53ab7 bdk: joycon: more refactoring 2026-03-27 10:00:26 +01:00
CTCaer e6a3c80f4d bdk: joycon: generalize _jc_packet_add_uart_hdr 
Correct its header construction in case it's used in the future.
Plus some unhardcoding of lengths.
 2026-03-27 10:00:26 +01:00
CTCaer 2a0617dbf6 bdk: joycon: increase connection timeout to 1.8s 2026-03-27 10:00:26 +01:00
CTCaer 690beb0de7 bdk: joycon: refactor some fields 
And add better comments.
 2026-03-27 10:00:26 +01:00
CTCaer 6bcc2e082f bdk: joycon: use packed structs and bitfields 2026-03-27 10:00:26 +01:00
CTCaer c605e924ed bdk: joycon: correct crc8 offsets 
By luck the current offset and length of the calculation always worked.
Correct it though because the function might be used fully in the future.
 2026-03-27 10:00:26 +01:00
CTCaer d252dd7e52 bdk: joycon: maintain consistent naming styles 2026-03-27 10:00:26 +01:00
CTCaer 2d3b6e1a39 nyx: always show console stats 
When main Joy-Con or all are disconnected, always show Joy-Con debug info.
Additionally, always allow opening/closing console window with the secondary one,
in the same conditions.
 2026-03-27 10:00:26 +01:00
CTCaer b414e6b35f nyx: make sure ram is set to 1600 MHz 
No matter how Nyx was launched.
 2026-03-27 10:00:26 +01:00
CTCaer 1651316f72 nyx: options: make sure var has a value in all -O# 2026-03-27 10:00:26 +01:00
CTCaer c200ef3f4a bdk: joycon: optimize rumble enable 2026-03-27 10:00:26 +01:00
CTCaer 5fe649d7dd bdk: display: add OLED status pin 
Code is commented out for now until it gets used.
Status is set when RST is enabled.
 2026-03-27 10:00:26 +01:00
CTCaer d5a1bdf9bf nyx: update rng calls based on new bdk 2026-03-27 10:00:26 +01:00
CTCaer 8e2a776e73 bdk: se: support multiple/partial blocks for RNG 2026-03-27 09:59:42 +01:00
CTCaer 57e6875b42 hekate/nyx: update ctx keys calls based on new bdk 2026-03-27 09:59:42 +01:00
CTCaer d0dcfd0008 bdk: se: use proper naming for ctx keys 2026-03-27 09:59:42 +01:00
CTCaer 0cd9a5c80e hekate/nyx: update sha calls based on new bdk 2026-03-27 09:59:42 +01:00
CTCaer a258c726dc bdk: se: refactor and optimize SHA256 
- Simplify config and fix partial hashing
- Add partial function calls
- All partial state is handled internally
- All functions now use the classic naming convention.
 2026-03-27 09:59:42 +01:00
CTCaer 89795a4c96 bdk: se: use classic naming convention for XTS 2026-03-27 09:59:42 +01:00
CTCaer 5a40f26010 bdk: se: add AES OFB encryption/decryption support 2026-03-27 09:59:42 +01:00
CTCaer ab794bc61d hekate/nyx: update aes calls based on new bdk 2026-03-27 09:59:42 +01:00
CTCaer 6c7370bec3 bdk: se: remove dst/src size argument requirement 
All operations expect the destination buffer to fit the selected size.
And for simplicity STATE_WAIT is not supported.

Additionally, remove single block ECB and just use the normal function.
 2026-03-27 09:59:42 +01:00
CTCaer ba71fb0dba bdk: se: optimize and update aes cmac hashing 
`se_aes_cmac_128` was also renamed to `se_aes_hash_cmac`.
By following the convention of 128bit functions not having size in their name.
 2026-03-27 09:59:42 +01:00
CTCaer d1066da9fa bdk: se: handle original and updated IV in one go 
IV set now requires a size where the second block is updated IV
IV clear now clears both.
 2026-03-27 09:59:42 +01:00
CTCaer 542fba6fbd bdk: se: support partial blocks for all aes modes 2026-03-27 09:59:42 +01:00
CTCaer 1295152f20 bdk: se: do a trivial refactor pass 2026-03-27 09:59:42 +01:00
CTCaer 9ebd03802f bdk: heap: use ultra fast defragmentation 
The defragmentation runs on every free and it only merges subsequent nodes.
So there's no point of looping all nodes.
So, just check if previous and next nodes are mergeable.
This makes free performant and achieves the same exact functionality.
 2026-03-27 09:59:42 +01:00
CTCaer 07229f1002 Restructure and refactor makefiles 
- Allow rebuilds without rebuilding everything
 By detecting changes everywhere that matters (flags, objects and headers).
- Add progress bar
- Fully clean everything when clean goal is used
 2026-03-27 09:59:42 +01:00
CTCaer d391ef3b0f bdk: max17050: simplify calculations 
And make current readings a tiny bit (±0.16%) more accurate.
 2026-03-27 09:58:48 +01:00
CTCaer 18a3dd6374 nyx: add joycon charging debug info 2026-03-27 09:58:48 +01:00
CTCaer 8a25c8294f minerva: update rate_from if clock the same 2026-03-27 09:58:48 +01:00
CTCaer 9ef684037b bdk: max17050: remove unused cached batt voltage 2026-03-27 09:58:48 +01:00
CTCaer 19279fa57d bdk: joycon: improve charger config 
Utilize charger config set command which allows for supplement mode.
Additionally, remove ping config when SIO and parse buttons/sticks on subcmd reports.
 2026-03-27 09:58:48 +01:00
CTCaer 0edd5295d6 fatfs: set default date to 1/1/2026 2026-03-27 09:58:48 +01:00
CTCaer 992245f044 l4t: make mselect config common for t210/t210b01 
It's already handled in soc powerdown exit in ATF but it doesn't hurt to have it generally.
 2026-03-27 09:57:59 +01:00
CTCaer 2004b38f41 bdk: ccplex: do not disable mselect on cpu pwrgate 2026-03-27 09:57:59 +01:00
CTCaer 64a4f9db16 hekate/nyx: remove last calloc references 2026-03-27 09:57:59 +01:00
CTCaer 8220466523 bdk: heap: add more safe guards 
- Use magic for used regions
- Deduplicate calloc
Enable a print/abort in _heap_free() for debugging.
 2026-03-27 09:57:59 +01:00
CTCaer d379a17444 bdk: display: improve and deduplicate more 
- Add delay after a DSI soft reset
- Remove more duplicated configs
- Improve code to save code size
- Improve comments
- Do not allow display_backlight to be used with OLED
 2026-03-27 09:57:59 +01:00
CTCaer db4c6a0b69 bdk: util: use volatile base for reg_write_array 2026-03-27 09:57:59 +01:00
CTCaer 8b86bf3808 bdk: display: use a scratch reg for backlight 
Spare registers normally have hidden hw config usage, so avoid them just in case.
 2026-03-27 09:57:59 +01:00
CTCaer 46fa18be89 bdk: display: simplify macros 
Expand register index in parent macro and remove _DI/_DSIREG macros.
 2026-03-27 09:57:59 +01:00
CTCaer c17881f2c3 bdk: display: use spare reg to store dcs bl duty 
And also remove backlight pwm restoring from coreboot hw deinit path.
 2026-03-27 09:57:59 +01:00
CTCaer c907d143b7 bdk: fatfs: improve fat read/write 
- Convert access from min cluster size to block size
  Also allow read/writes to less than cluster size
- In case of intercluster access throw an error
- Do not error on zero size

On reads buffer still needs to be block (instead of cluster) aligned.
On writes, buffer still needs to be readable out of bounds.
 2026-03-27 09:57:59 +01:00
CTCaer a8db6470ea nyx: info: update 20nm wafer bounds 2026-03-27 09:57:59 +01:00
CTCaer e50a7c8bfd nyx: info: unlocked T210B01 fuses dumping support 2026-03-27 09:57:59 +01:00
CTCaer ffc0aa2c3d bdk: fuse: return array size with fuse_read_array 2026-03-27 09:57:23 +01:00
CTCaer bb20eabea2 nyx: parted: remove invisible btns in eMMC mode 2026-03-27 09:57:23 +01:00
CTCaer 330b463110 nyx: add a small stall in lvgl loop 
EMC CC should not run in less than 20us.
 2026-03-27 09:56:31 +01:00
CTCaer 4af99c9f78 hos/l4t: deduplicate sc7exit-b01 load 
And remove obsolete MWS (L4T one deprecated it 3 years ago).
 2026-03-27 09:56:31 +01:00
CTCaer 4c2f8f14dc hos: reflect minerva changes 2026-03-27 09:55:59 +01:00
CTCaer fd8c2ef56d lp0 cfg: use a more appropriate entry name 2026-03-27 09:55:12 +01:00
CTCaer 6b66b7f079 minerva: update tov1.6_T210/v0.1_T21X 
T21X v0.1:
- Add IRB/no table support
T210 v1.6/Common:
- Add a proper table for 8GB T210 config instead of editing a 4GB one
- Increase timeout to 2ms
- Generally improve checks and guard against unknown SoCs/SKUs
- Remove the long ago obsolete OVERCLOCK_FREQ/OVERCLOCK_VOLTAGE ifdefs
 2026-03-27 09:55:12 +01:00
CTCaer 76922b7b87 bdk: minerva: add IRB support 
Aka no table support.
 2026-03-27 09:55:12 +01:00
CTCaer 2bc4000acc hekate: gfx: correct a very very very old typo 2026-03-27 09:55:12 +01:00
CTCaer 892dba3a71 hekate: exo: simplify fatal screen to save space 
And remove an obsolete message.
 2026-03-27 09:55:12 +01:00
CTCaer 851bf05841 hekate: remove precise free clusters calc in TUI 2026-03-27 09:55:12 +01:00
CTCaer 03cb1aac29 bdk: clock: update some defines 2026-03-27 09:54:06 +01:00
CTCaer 61cb77a016 bdk: sdmmc: add defines for max block number 2026-03-27 09:54:06 +01:00
CTCaer facd5c9ae9 Bump hekate to v6.4.2 and Nyx to v1.8.2 2026-03-27 09:53:33 +01:00
CTCaer 5c04530bfc nyx: options: add month/date checks for roller 
Now the roller will return back automatically if day can't be set for selected month.
Additionally, fix the check when saving.
 2026-03-27 09:53:33 +01:00
CTCaer ef5033fb0e nyx: info: add wafer graph with die x/y placement 2026-03-27 09:53:33 +01:00
CTCaer 952a7e8aa2 nyx: info: streamline hw info from fuses 
- Compact and group relevant values together
- Use actual value name instead of register name where possible
- Fix LOT code masking
- Fully parse and show LOT code (it's the same marking on die)
- Correct X coordinate parsing (9bit 2s complement)
- Add product code
 2026-03-27 09:53:33 +01:00
CTCaer 4430833d28 hekate: write rsvd cfg to update.bin if different 2026-03-27 09:53:33 +01:00
CTCaer 3af536f954 nyx: do init always with lowest clock boost 2026-03-27 09:52:34 +01:00
CTCaer 5bc98c4b19 nyx: fix bt pairing dumping 2026-03-27 09:52:34 +01:00
CTCaer 2b353c1336 nyx: info: add forced 8GB ram info 2026-03-27 09:52:34 +01:00
CTCaer 32c374aff5 hekate: show errors before parsing R2C 2026-03-27 09:52:34 +01:00
CTCaer 1af22f6c45 hekate: add force 8GB ram config mode 2026-03-27 09:52:34 +01:00
CTCaer 4b796ab63f loader/hekate/nyx: utilize the new rsvd cfg 2026-03-27 09:52:34 +01:00
CTCaer 8d525a3c50 bdk: add reserved cfg to ipl meta and nyx storage 2026-03-27 09:51:47 +01:00
CTCaer ef0ab0b0f1 bdk: sdmmc: correct drive ohms comment 2026-03-27 09:51:47 +01:00
CTCaer 7b7906efc2 bdk: clock: add i2c to the errata affected list 2026-03-27 09:51:47 +01:00
CTCaer e29d139946 bdk: fuse: allow overriding dram id fuses 
This should be set before running sdram init.
fuse_read_dramid(true) will still return the real id.
 2026-03-27 09:51:47 +01:00
CTCaer cfcbb62768 hekate/nyx: use minerva storage and panel id 2026-03-27 09:51:47 +01:00
CTCaer b862311c0c bdl: minerva: add deinit function 
Removes dependency to Nyx storage for hw init too.
 2026-03-27 09:51:46 +01:00
CTCaer 11b49e3bbc bdk: nyx: rename disp_id to panel_id 2026-03-27 09:51:46 +01:00
CTCaer ac245a0b6f bdk: minerva: remove dependency to Nyx storage 
minerva_str_t must be used now and passed directly to minerva_init.
 2026-03-27 09:51:46 +01:00
CTCaer c0300b1cee bdk: display: remove dependency to Nyx storage 
display_get_verbose_panel_id should now be used to get the full panel id.
 2026-03-27 09:51:46 +01:00
CTCaer 1eaa801d6a bdk: bpmp: add write commits 
And deduplicate bpmp_clk_rate_relaxed in bpmp_clk_rate_set.
 2026-03-27 09:51:46 +01:00
CTCaer 25359b23b9 bdk: clock: add sdmmc1 to the errata affected list 2026-03-27 09:51:46 +01:00
CTCaer db08514ff0 bdk: clock: allow pll lock wait to timeout 
Also enable PLLC4 p/f lock and reduce time waiting before disabling.
 2026-03-27 09:51:46 +01:00
CTCaer 877e2c7c2e bdk: clock: improve PLLC init 
- Use 6 as divm and div1 for OUT1 to avoid having very high frequency on OUT0
 There seems to be an undocumented silicon errata where PLLC OUT0 produces EMI
 to input mux logic in modules, even when not using it.
- Always check if PLL is enabled and disable first in order to avoid a silicon
 errata with hybrid PLLs
- Fix PLLC_FLL_LD_MEM value
 2026-03-27 09:51:46 +01:00
CTCaer fa2d7854d3 bdk: clock: streamline sdmmc func naming 
Additionally, restored the pclock variable because of _clock_sdmmc_config_clock_host store order.
 2026-03-27 09:51:46 +01:00
CTCaer ac0d98ad29 bdk: clock: use SET/CLR registers for all modules 
This is not mandatory but removes unnecessary load-mask/or-stores.

On the other hand, due to an undocumented T210 silicon errata,
these are mandatory for SDMMC modules.
This is because a fraction of T210 chips can glitch out and cause SoC hang.
T210B01 is not affected.
 2026-03-27 09:51:46 +01:00
CTCaer 9b216efddf Bump hekate to v6.4.1 and Nyx to v1.8.1 2026-03-27 09:49:29 +01:00
CTCaer 911b170b4d nyx: info: add hos version for 22 fuses burnt 2026-03-27 09:49:29 +01:00
CTCaer c026b1db3d hos: fix 21.0.0 nogc FS patch and refactor patches 
The NOGC sdmmc memio patch was incorrectly changing the register that keeps the value for HOS 21.0.0.
Refactored all patches to stop patching the whole op and just change the value from 0x200 to 0x400.
 2026-03-27 09:49:29 +01:00
CTCaer dc1ad1a5a7 Bump hekate to v6.4.0 and Nyx to v1.8.0 2026-03-27 09:49:29 +01:00
CTCaer 36aa1b21ad nyx: parted: do not allow FULL on upgraded eMMC 
It's not allowed on creation anyway because of unknown HOS USER size factors
 2026-03-27 09:49:29 +01:00
CTCaer 10521a32d3 hos: add 21.0.0 support 2026-03-27 09:48:54 +01:00
CTCaer 82a97aae53 nyx: extend bpmpclock 
Add 2 more slower modes.
 2026-03-27 09:48:54 +01:00
CTCaer a365af0492 bdk: bpmp: add binX clock defines 2026-03-27 09:48:54 +01:00
CTCaer 28dce16877 bdk: fuse: add sense function 2026-03-27 09:48:54 +01:00
CTCaer f541f14699 bdk: fuse: add extra info on regs 2026-03-27 09:48:54 +01:00
CTCaer 518cfd401a bdk: fuse: correct masking on array read cmd 2026-03-27 09:48:54 +01:00