Commit Graph

2034 Commits

Author SHA1 Message Date
CTCaer
e3fba92e00 bdk: touch: use packet i2c for all transfers
The repeating byte doesn't exist in i2c packet mode.
Additionally, adjust split transfers to one.
2026-03-27 20:08:45 +01:00
CTCaer
2a7e148011 bdk: touch: refactor
And also use packet mode for big tx/rx combo i2c trasnfers.
2026-03-27 20:08:45 +01:00
CTCaer
476c070cf4 bdk: i2c: optimize packet mode functions
- Allow xfer packet to send up to 20 bytes before receiving
- Remove interrupt use since it's only polling
- Check proper status for TX finish.
2026-03-27 20:08:45 +01:00
CTCaer
8f6dce1368 bdk: i2c: refactor 2026-03-27 20:08:45 +01:00
CTCaer
10c2d3d379 bdk: clk: add missing macro 2026-03-27 20:08:45 +01:00
CTCaer
84234948cd nyx: parted: remove android 10 references
Additionally, swap Legacy and Dynamic button sides and state dynamic is preferred.
2026-03-27 20:08:45 +01:00
CTCaer
67b002348e nyx: tools: swap result check for touch ito test 2026-03-27 20:08:45 +01:00
CTCaer
e2ff75291b bdk: touch: refactor/improve
- Remove useless poll wait
- Use more defines
- Deduplicate code
- Add more checks
- Add switch sense mode
2026-03-27 20:08:45 +01:00
CTCaer
45a08c058f bdk: clk: reduce i2c freq input to save power 2026-03-27 20:08:45 +01:00
CTCaer
e4c226f101 readme: add which are ini only and adjust defaults 2026-03-27 20:08:45 +01:00
CTCaer
7a37ddc45e bdk: vic: add hw version that this driver aims for
Also TRM lies about best cache width, like always.
The higher the faster. The lower the simpler alignment.
A balanced one is used by default.
2026-03-27 20:08:45 +01:00
CTCaer
2939f69928 nyx: fix launch rolling boot entry names
Somehow this broke half a decade ago and it went unnoticed... which is good.
Fix it and make measurements fully proper.
2026-03-27 20:08:45 +01:00
CTCaer
2c071eb878 nyx: use renamed bm92t function 2026-03-27 20:08:45 +01:00
CTCaer
de3a74d351 bdk: bm92t: do not parse non fixed pdos 2026-03-27 20:08:45 +01:00
CTCaer
eb62a31a1a bdk: sdmmc: remove dependency to ram for init 2026-03-27 20:08:45 +01:00
CTCaer
29c64c5458 nyx: adjust sdmmc dma buffer name 2026-03-27 20:08:45 +01:00
CTCaer
bf5372628a bdk: mem: rename sdmmc dma buffer 2026-03-27 20:05:57 +01:00
CTCaer
f16602c0cf hekate/nyx: adjust exception storage based on bdk 2026-03-27 20:05:57 +01:00
CTCaer
aba56fd173 bdk: move exception type base away from IRQ stack
Allow a more heavy stack usage by IRQ handlers.
2026-03-27 20:05:57 +01:00
CTCaer
27bc159831 nyx: lvgl: complete black theme and add options
Since, this has the side-effect to make any theme color component from 0x0B to 0xC7
work, add theme background controls in Nyx Options.
Additionally, set shadow color to black and fix inactive buttons on transparent styles.
2026-03-27 20:05:57 +01:00
NaGa
d24debc642 nyx: deduplicate window creation functions
Also rename mbox_action and fix a double lv obj deletion in partition manager.
2026-03-27 20:02:53 +01:00
CTCaer
618e3007b5 bdk: lvgl: complete black theme
This has the side-effect to make any theme color component from 0x0B to 0xC7 work.
2026-03-27 19:38:45 +01:00
CTCaer
378d38b850 bdk: add missing header guards 2026-03-27 19:38:45 +01:00
CTCaer
6a43aa8c33 modules: set page size to 256 bytes
Since this runs on BPMP a meaningful alignment is 32 bytes, so use a nicer 256.
Reduces size of libs of up to 64KB.

If libs are compiled for armv7/8, 4KB should be used if missing from compiler.
2026-03-27 19:38:45 +01:00
CTCaer
801c31f613 modules: adjust for ianos changes 2026-03-27 19:38:45 +01:00
CTCaer
b8dcd5a05b hekate: adjust for ianos changes 2026-03-27 19:38:45 +01:00
CTCaer
f155346238 bdk: ianos: restructure for future expansion 2026-03-27 19:38:08 +01:00
CTCaer
f08557fb8f modules: lp0: refactor t210b01 to use the macros
This actually makes it faster too.
Additionally, remove support for DDR in T210 function.
2026-03-27 19:36:58 +01:00
CTCaer
c69cdacf30 l4t: use the updated pmc defines/struct 2026-03-27 19:36:58 +01:00
CTCaer
b3c95990ed bdk: pmc: refactor register defines and structs 2026-03-27 19:36:58 +01:00
CTCaer
b86701823c bdk: pinmux: always detach I2C4 pins from I2C3 pm
Generally I2C3 communication can work via I2C3 or I2C4 pins.
Defaults are fine as long as one of the pin groups are floating or grounded or
both share I2C traces.

In NX boards I2C4 SDA is used for GC and connected to 1V8.
So if a GC is slotted, I2C3 works, if not, no communication is possible.

This config was done previously inside I2C3 consumer driver (touchscreen).
Now it's moved inside pinmux_config_i2c.
2026-03-27 19:36:58 +01:00
CTCaer
9fe3ac7589 Bump hekate to v6.5.1 and Nyx to v1.9.1 2026-03-27 10:02:21 +01:00
CTCaer
315457651c bdk: joycon: make init stricter but relax timings
Additionally, if both Joy-Con are found, try to send rumble simultaneously.
2026-03-27 10:02:21 +01:00
CTCaer
aecd657358 bdk: display: reduce display off waiting time
And align oled panel inside vblank.
Assumes display deinit happens before the rest of deinit.
2026-03-27 10:02:21 +01:00
CTCaer
ef84b9804c nyx: handle exFAT truncation in stat/backup
It's possible for the overflow check to fail if exFAT and file size is big enough.
(4GB + total_size)

So check it properly.
This avoids unnecessary copying before RAM disk gets filled and copy errors out.

No other check is needed since max capacity is RAM disk size.
2026-03-27 10:02:21 +01:00
CTCaer
16b14b74c2 nyx: constrain reboot to OFW a bit
Disable if T210 and real dram id is 7 since this will fatal nx bootloader.
If T210B01 and fake id is dual rank and higher density than real id, show a warning.
Booting HOS like that can cause performance degradation and sometimes crashes.
How worse it is, depends on ram chips and selected unmatched config.
2026-03-27 10:02:21 +01:00
CTCaer
925b6e22bb bdk: se: add T210 SHA256 silicon errata WAR
Apparently, some T210 silicon have an undocumented errata where the MSG_LEFT2/3
registers are not ignored as they should.
When they have random data in POR they cause a hang as long as the message and
SHA calculation speed. So always clear them.
Additionally, clear MSG_LENGTH2/3 registers too even though they do not matter.
2026-03-27 10:02:21 +01:00
CTCaer
5a35a61753 bdk: se: adjust T210 silicon errata coherency WAR
Add a 15us worst case scenario delay after OP done for T210.
Practically, because of 1600 MHz RAM, less than 1us delay is needed.
(204 MHz: 15us, 408 MHz: 5us, etc).
2026-03-27 10:02:21 +01:00
CTCaer
e649d1df8e bdk: se: correct result for < block size aes 2026-03-27 10:02:21 +01:00
CTCaer
154d8b114c hos: store wb anyway even if unused
Partially reverts 73d96b7ca8bd4360b288e53d95295fd98d1655e5.
This should be completely removed at some point.
2026-03-27 10:02:21 +01:00
CTCaer
a8d3018e83 hos: refactor ctr/hash vars in pkg2 header 2026-03-27 10:01:38 +01:00
CTCaer
ef2247a3f0 Bump hekate to v6.5.0 and Nyx to v1.9.0 2026-03-27 10:01:21 +01:00
CTCaer
0f4636546c hos: add 21.2.0 support 2026-03-27 10:01:20 +01:00
CTCaer
22dd1a42c7 hekate/nyx: remove coreboot support
Everything external is finally updated and beyond parity with old things that needed it.
2026-03-27 10:01:20 +01:00
CTCaer
4daa02fe85 bdk: hwinit: remove coreboot support
Everything external is finally updated and beyond parity with old things that needed it.
2026-03-27 10:00:26 +01:00
CTCaer
8c8ca53ab7 bdk: joycon: more refactoring 2026-03-27 10:00:26 +01:00
CTCaer
e6a3c80f4d bdk: joycon: generalize _jc_packet_add_uart_hdr
Correct its header construction in case it's used in the future.
Plus some unhardcoding of lengths.
2026-03-27 10:00:26 +01:00
CTCaer
2a0617dbf6 bdk: joycon: increase connection timeout to 1.8s 2026-03-27 10:00:26 +01:00
CTCaer
690beb0de7 bdk: joycon: refactor some fields
And add better comments.
2026-03-27 10:00:26 +01:00
CTCaer
6bcc2e082f bdk: joycon: use packed structs and bitfields 2026-03-27 10:00:26 +01:00