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base: OmniNX:4.2.0
Branches Tags
OmniNX:Lockpick-1.19.10-bdk-upgrade OmniNX:save-close-test OmniNX:the-change-i-want-to-see-in-the-world OmniNX:master OmniNX:hekate-6.0.5-bdk-upgrade OmniNX:hekate-5.7.0-bdk-upgrade OmniNX:tsv3 OmniNX:script_dict OmniNX:TegraScript_v2 OmniNX:dev OmniNX:Fastfs_Testing
OmniNX:4.2.0 OmniNX:4.1.1 OmniNX:4.1.0-b1 OmniNX:4.0.1-hotfix4 OmniNX:4.0.1-hotfix3 OmniNX:4.0.1-hotfix2 OmniNX:4.0.1-hotfix OmniNX:4.0.1 OmniNX:4.0.0 OmniNX:tsv3-beta3 OmniNX:3.0.6 OmniNX:3.0.5 OmniNX:3.0.4 OmniNX:3.0.3 OmniNX:3.0.2 OmniNX:3.0.1 OmniNX:3.0.0 OmniNX:2.9.9 OmniNX:2.0.5 OmniNX:2.0.4 OmniNX:2.0.3 OmniNX:2.0.2 OmniNX:2.0.1 OmniNX:2.0.0 OmniNX:1.5.2 OmniNX:1.5.1-hotfix OmniNX:1.5.1 OmniNX:1.5.0 OmniNX:1.4.0 OmniNX:1.3.2 OmniNX:1.3.1 OmniNX:1.3.0 OmniNX:1.2.1 OmniNX:1.2.0 OmniNX:1.1.1 OmniNX:1.1.0 OmniNX:1.0.2 OmniNX:1.0.1 OmniNX:1.0.0 OmniNX:0.9.9 OmniNX:0.1.1 OmniNX:0.1.0 OmniNX:0.0.1
..
compare: OmniNX:hekate-5.7.0-bdk-upgrade
Branches Tags
OmniNX:Lockpick-1.19.10-bdk-upgrade OmniNX:save-close-test OmniNX:the-change-i-want-to-see-in-the-world OmniNX:master OmniNX:hekate-6.0.5-bdk-upgrade OmniNX:hekate-5.7.0-bdk-upgrade OmniNX:tsv3 OmniNX:script_dict OmniNX:TegraScript_v2 OmniNX:dev OmniNX:Fastfs_Testing
OmniNX:4.2.0 OmniNX:4.1.1 OmniNX:4.1.0-b1 OmniNX:4.0.1-hotfix4 OmniNX:4.0.1-hotfix3 OmniNX:4.0.1-hotfix2 OmniNX:4.0.1-hotfix OmniNX:4.0.1 OmniNX:4.0.0 OmniNX:tsv3-beta3 OmniNX:3.0.6 OmniNX:3.0.5 OmniNX:3.0.4 OmniNX:3.0.3 OmniNX:3.0.2 OmniNX:3.0.1 OmniNX:3.0.0 OmniNX:2.9.9 OmniNX:2.0.5 OmniNX:2.0.4 OmniNX:2.0.3 OmniNX:2.0.2 OmniNX:2.0.1 OmniNX:2.0.0 OmniNX:1.5.2 OmniNX:1.5.1-hotfix OmniNX:1.5.1 OmniNX:1.5.0 OmniNX:1.4.0 OmniNX:1.3.2 OmniNX:1.3.1 OmniNX:1.3.0 OmniNX:1.2.1 OmniNX:1.2.0 OmniNX:1.1.1 OmniNX:1.1.0 OmniNX:1.0.2 OmniNX:1.0.1 OmniNX:1.0.0 OmniNX:0.9.9 OmniNX:0.1.1 OmniNX:0.1.0 OmniNX:0.0.1

5 Commits
4.2.0 ... hekate-5.7

Author SHA1 Message Date
suchmememanyskill
09fc492610 Step 5: Scare the init bugs away 
Seriously though why the fuck was this the issue
 2022-01-23 00:40:08 +01:00
suchmememanyskill
5c59d42a30 Step 4: Fix the ini parser 
also why am i using steps
 2022-01-22 16:05:08 +01:00
suchmememanyskill
c8468a6d73 Step 3: Fix up crypto 2022-01-22 15:56:31 +01:00
suchmememanyskill
626cae4e00 Step 2: Stop using pkg1 versions 2022-01-22 02:19:00 +01:00
suchmememanyskill
72c58c93b8 Step 1: Compile 2022-01-22 01:59:17 +01:00
111 changed files with 2570 additions and 9504 deletions
Expand all files Collapse all files

8
Makefile
View File

@@ -10,8 +10,8 @@ include $(DEVKITARM)/base_rules
IPL_LOAD_ADDR := 0x40008000
LPVERSION_MAJOR := 4
LPVERSION_MINOR := 2
LPVERSION_BUGFX := 0
LPVERSION_MINOR := 0
LPVERSION_BUGFX := 1
LPVERSION := \"$(LPVERSION_MAJOR).$(LPVERSION_MINOR).$(LPVERSION_BUGFX)\"
################################################################################
@@ -41,9 +41,11 @@ FFCFG_INC := '"../$(SOURCEDIR)/libs/fatfs/ffconf.h"'
################################################################################
CUSTOMDEFINES := -DIPL_LOAD_ADDR=$(IPL_LOAD_ADDR)
CUSTOMDEFINES += -DLP_VER_MJ=$(LPVERSION_MAJOR) -DLP_VER_MN=$(LPVERSION_MINOR) -DLP_VER_BF=$(LPVERSION_BUGFX) -DLP_VER=$(LPVERSION)
CUSTOMDEFINES += -DLP_VER_MJ=$(LPVERSION_MAJOR) -DLP_VER_MN=$(LPVERSION_MINOR) -DLP_VER_BF=$(LPVERSION_BUGFX) -DLP_VER=$(LPVERSION) -DBDK_EMUMMC_ENABLE
CUSTOMDEFINES += -DGFX_INC=$(GFX_INC) -DFFCFG_INC=$(FFCFG_INC)
FFCFG_INC := '"../$(PROJECT_DIR)/libs/fatfs/ffconf.h"'
# 0: UART_A, 1: UART_B.
#CUSTOMDEFINES += -DDEBUG_UART_PORT=0

23
Modified BDK files.md Normal file
View File

@@ -0,0 +1,23 @@
For future reference if updating the BDK
// TODO: memory map(?)
## /bdk/sec/SE.c&h
- Added se_aes_cmac
- Added se_calc_hmac_sha256
## /bdk/usb
- Removed entirely
## /bdk/storage/sd.c
- in sd_file_read(), extend read buffer by 1 and place a NULL byte at the end
## /bdk/libs/fatfs/ff.c&h
- Added f_fdisk_mod
- Stubbed exfat partition creation
## /bdk/utils/ini.c
- Added initial 'unknown' section to parse prod.keys
## /bdk/libs
- Added nx-savedata from [Lockpick_RCM](https://github.com/shchmue/Lockpick_RCM)

9
README.md
View File

@@ -51,19 +51,16 @@ For question specifically for TegraExplorer, go to [my discord](https://discord.
Based on [Lockpick_RCM](https://github.com/shchmue/Lockpick_RCM), and thus also based on [Hekate](https://github.com/CTCaer/hekate)
Awesome people who helped with this project:
- [shchmue](https://github.com/shchmue)
- [maddiethecafebabe](https://github.com/maddiethecafebabe/)
- [bleck9999](https://github.com/bleck9999)
- shchmue
- Dennthecafebabe
Other awesome people:
- PhazonicRidley
- Dax
- Huhen
- Bleck9999
- Exelix
- Emmo
- Gengar
- Einso
- JeffV
## Screenshots

76
bdk/bdk.h Normal file
View File

@@ -0,0 +1,76 @@
/*
* Copyright (c) 2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef BDK_H
#define BDK_H
#include <memory_map.h>
#include <display/di.h>
#include <input/als.h>
#include <input/joycon.h>
#include <input/touch.h>
#include <mem/emc.h>
#include <mem/heap.h>
#include <mem/mc.h>
#include <mem/minerva.h>
#include <mem/sdram.h>
#include <mem/smmu.h>
#include <module.h>
#include <power/bm92t36.h>
#include <power/bq24193.h>
#include <power/max17050.h>
#include <power/max77620.h>
#include <power/max7762x.h>
#include <power/max77812.h>
#include <power/regulator_5v.h>
#include <rtc/max77620-rtc.h>
#include <sec/se.h>
#include <sec/tsec.h>
#include <soc/actmon.h>
#include <soc/bpmp.h>
#include <soc/ccplex.h>
#include <soc/clock.h>
#include <soc/fuse.h>
#include <soc/gpio.h>
#include <soc/hw_init.h>
#include <soc/i2c.h>
#include <soc/kfuse.h>
#include <soc/pinmux.h>
#include <soc/pmc.h>
#include <soc/t210.h>
#include <soc/uart.h>
#include <storage/emmc.h>
#include <storage/mbr_gpt.h>
#include <storage/mmc.h>
#include <storage/nx_emmc_bis.h>
#include <storage/ramdisk.h>
#include <storage/sd.h>
#include <storage/sdmmc.h>
#include <thermal/fan.h>
#include <thermal/tmp451.h>
#include <utils/aarch64_util.h>
#include <utils/btn.h>
#include <utils/dirlist.h>
#include <utils/ini.h>
#include <utils/list.h>
#include <utils/sprintf.h>
#include <utils/types.h>
#include <utils/util.h>
#include <gfx_utils.h>
#endif

36
bdk/display/di.c
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018-2021 CTCaer
* Copyright (c) 2018-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -176,10 +176,14 @@ int display_dsi_read(u8 cmd, u32 len, void *data, bool video_enabled)
void display_dsi_write(u8 cmd, u32 len, void *data, bool video_enabled)
{
static u32 *fifo32 = NULL;
u8 *fifo8;
u32 *fifo32;
u32 host_control;
// Allocate fifo buffer.
if (!fifo32)
fifo32 = malloc(DSI_STATUS_RX_FIFO_SIZE * 8 * sizeof(u32));
// Enable host cmd packets during video and save host control.
if (video_enabled)
DSI(_DSIREG(DSI_VIDEO_MODE_CONTROL)) = DSI_CMD_PKT_VID_ENABLE;
@@ -199,7 +203,7 @@ void display_dsi_write(u8 cmd, u32 len, void *data, bool video_enabled)
break;
default:
fifo32 = calloc(DSI_STATUS_RX_FIFO_SIZE * 8, 4);
memset(fifo32, 0, DSI_STATUS_RX_FIFO_SIZE * 8 * sizeof(u32));
fifo8 = (u8 *)fifo32;
fifo32[0] = (len << 8) | MIPI_DSI_DCS_LONG_WRITE;
fifo8[4] = cmd;
@@ -208,7 +212,6 @@ void display_dsi_write(u8 cmd, u32 len, void *data, bool video_enabled)
for (u32 i = 0; i < (ALIGN(len, 4) / 4); i++)
DSI(_DSIREG(DSI_WR_DATA)) = fifo32[i];
DSI(_DSIREG(DSI_TRIGGER)) = DSI_TRIGGER_HOST;
free(fifo32);
break;
}
@@ -223,8 +226,12 @@ void display_dsi_write(u8 cmd, u32 len, void *data, bool video_enabled)
void display_dsi_vblank_write(u8 cmd, u32 len, void *data)
{
static u32 *fifo32 = NULL;
u8 *fifo8;
u32 *fifo32;
// Allocate fifo buffer.
if (!fifo32)
fifo32 = malloc(DSI_STATUS_RX_FIFO_SIZE * 8 * sizeof(u32));
// Enable vblank interrupt.
DISPLAY_A(_DIREG(DC_CMD_INT_ENABLE)) = DC_CMD_INT_FRAME_END_INT;
@@ -248,7 +255,7 @@ void display_dsi_vblank_write(u8 cmd, u32 len, void *data)
break;
default:
fifo32 = calloc(DSI_STATUS_RX_FIFO_SIZE * 8, 4);
memset(fifo32, 0, DSI_STATUS_RX_FIFO_SIZE * 8 * sizeof(u32));
fifo8 = (u8 *)fifo32;
fifo32[0] = (len << 8) | MIPI_DSI_DCS_LONG_WRITE;
fifo8[4] = cmd;
@@ -256,7 +263,6 @@ void display_dsi_vblank_write(u8 cmd, u32 len, void *data)
len += 4 + 1; // Increase length by CMD/length word and DCS CMD.
for (u32 i = 0; i < (ALIGN(len, 4) / 4); i++)
DSI(_DSIREG(DSI_WR_DATA)) = fifo32[i];
free(fifo32);
break;
}
@@ -762,31 +768,31 @@ void display_color_screen(u32 color)
u32 *display_init_framebuffer_pitch()
{
// Sanitize framebuffer area.
memset((u32 *)IPL_FB_ADDRESS, 0, 0x3C0000);
memset((u32 *)IPL_FB_ADDRESS, 0, IPL_FB_SZ);
// This configures the framebuffer @ IPL_FB_ADDRESS with a resolution of 1280x720 (line stride 720).
exec_cfg((u32 *)DISPLAY_A_BASE, cfg_display_framebuffer_pitch, 32);
usleep(35000); // No need to wait on Aula.
//usleep(35000); // No need to wait on Aula.
return (u32 *)IPL_FB_ADDRESS;
return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR));
}
u32 *display_init_framebuffer_pitch_inv()
{
// This configures the framebuffer @ NYX_FB_ADDRESS with a resolution of 1280x720 (line stride 720).
exec_cfg((u32 *)DISPLAY_A_BASE, cfg_display_framebuffer_pitch_inv, 34);
usleep(35000); // No need to wait on Aula.
//usleep(35000); // No need to wait on Aula.
return (u32 *)NYX_FB_ADDRESS;
return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR));
}
u32 *display_init_framebuffer_block()
{
// This configures the framebuffer @ NYX_FB_ADDRESS with a resolution of 1280x720 (line stride 720).
exec_cfg((u32 *)DISPLAY_A_BASE, cfg_display_framebuffer_block, 34);
usleep(35000); // No need to wait on Aula.
//usleep(35000); // No need to wait on Aula.
return (u32 *)NYX_FB_ADDRESS;
return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR));
}
u32 *display_init_framebuffer_log()
@@ -794,7 +800,7 @@ u32 *display_init_framebuffer_log()
// This configures the framebuffer @ LOG_FB_ADDRESS with a resolution of 1280x720 (line stride 720).
exec_cfg((u32 *)DISPLAY_A_BASE, cfg_display_framebuffer_log, 20);
return (u32 *)LOG_FB_ADDRESS;
return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR));
}
void display_activate_console()

7
bdk/display/di.h
View File

@@ -657,23 +657,24 @@
/* Switch Panels:
*
* 6.2" panels for Icosa and Iowa skus:
* 6.2" panels for Icosa and Iowa SKUs:
* [10] 81 [26]: JDI LPM062M326A
* [10] 96 [09]: JDI LAM062M109A
* [20] 93 [0F]: InnoLux P062CCA-AZ1 (Rev A1)
* [20] 95 [0F]: InnoLux P062CCA-AZ2 (Rev B1)
* [20] 96 [0F]: InnoLux P062CCA-AZ3 [UNCONFIRMED MODEL REV]
* [20] 97 [0F]: InnoLux P062CCA-??? [UNCONFIRMED MODEL REV]
* [20] 98 [0F]: InnoLux P062CCA-??? [UNCONFIRMED MODEL REV]
* [30] 94 [0F]: AUO A062TAN01 (59.06A33.001)
* [30] 95 [0F]: AUO A062TAN02 (59.06A33.002)
* [30] XX [0F]: AUO A062TAN03 (59.06A33.003) [UNCONFIRMED ID]
*
* 5.5" panels for Hoag skus:
* 5.5" panels for Hoag SKUs:
* [20] 94 [10]: InnoLux 2J055IA-27A (Rev B1)
* [30] 93 [10]: AUO A055TAN01 (59.05A30.001)
* [40] XX [10]: Vendor 40 [UNCONFIRMED ID]
*
* 7.0" OLED panels for Aula skus:
* 7.0" OLED panels for Aula SKUs:
* [50] 9B [20]: Samsung AMS699VC01-0 (Rev 2.5)
*/

4
bdk/fatfs_cfg.h
View File

@@ -17,8 +17,12 @@
#ifndef _FATFS_CFG_H_
#define _FATFS_CFG_H_
// define FFCFG_INC in a project to use a specific FatFS configuration.
// Example: FFCFG_INC := '"../$(PROJECT_DIR)/libs/fatfs/ffconf.h"'
#ifdef FFCFG_INC
#include FFCFG_INC
#else
#include "fatfs_conf.h"
#endif
#endif

305
bdk/fatfs_conf.h Normal file
View File

@@ -0,0 +1,305 @@
/*---------------------------------------------------------------------------/
/ FatFs Functional Configurations
/---------------------------------------------------------------------------*/
#define FFCONF_DEF 86604 /* Revision ID */
/*---------------------------------------------------------------------------/
/ Function Configurations
/---------------------------------------------------------------------------*/
#define FF_FS_READONLY 0
/* This option switches read-only configuration. (0:Read/Write or 1:Read-only)
/ Read-only configuration removes writing API functions, f_write(), f_sync(),
/ f_unlink(), f_mkdir(), f_chmod(), f_rename(), f_truncate(), f_getfree()
/ and optional writing functions as well. */
#define FF_FS_MINIMIZE 0
/* This option defines minimization level to remove some basic API functions.
/
/ 0: Basic functions are fully enabled.
/ 1: f_stat(), f_getfree(), f_unlink(), f_mkdir(), f_truncate() and f_rename()
/ are removed.
/ 2: f_opendir(), f_readdir() and f_closedir() are removed in addition to 1.
/ 3: f_lseek() function is removed in addition to 2. */
#define FF_USE_STRFUNC 2
/* This option switches string functions, f_gets(), f_putc(), f_puts() and f_printf().
/
/ 0: Disable string functions.
/ 1: Enable without LF-CRLF conversion.
/ 2: Enable with LF-CRLF conversion. */
#define FF_USE_FIND 1
/* This option switches filtered directory read functions, f_findfirst() and
/ f_findnext(). (0:Disable, 1:Enable 2:Enable with matching altname[] too) */
#define FF_USE_MKFS 0
/* This option switches f_mkfs() function. (0:Disable or 1:Enable) */
#if FF_USE_MKFS
#define FF_MKFS_LABEL "SWITCH SD "
#endif
/* This sets FAT/FAT32 label. Exactly 11 characters, all caps. */
#define FF_USE_FASTSEEK 0
/* This option switches fast seek function. (0:Disable or 1:Enable) */
#define FF_FASTFS 0
#if FF_FASTFS
#undef FF_USE_FASTSEEK
#define FF_USE_FASTSEEK 1
#endif
/* This option switches fast access to chained clusters. (0:Disable or 1:Enable) */
#define FF_SIMPLE_GPT 1
/* This option switches support for the first GPT partition. (0:Disable or 1:Enable) */
#define FF_USE_EXPAND 0
/* This option switches f_expand function. (0:Disable or 1:Enable) */
#define FF_USE_CHMOD 1
/* This option switches attribute manipulation functions, f_chmod() and f_utime().
/ (0:Disable or 1:Enable) Also FF_FS_READONLY needs to be 0 to enable this option. */
#define FF_USE_LABEL 0
/* This option switches volume label functions, f_getlabel() and f_setlabel().
/ (0:Disable or 1:Enable) */
#define FF_USE_FORWARD 0
/* This option switches f_forward() function. (0:Disable or 1:Enable) */
/*---------------------------------------------------------------------------/
/ Locale and Namespace Configurations
/---------------------------------------------------------------------------*/
#define FF_CODE_PAGE 850
/* This option specifies the OEM code page to be used on the target system.
/ Incorrect code page setting can cause a file open failure.
/
/ 437 - U.S.
/ 720 - Arabic
/ 737 - Greek
/ 771 - KBL
/ 775 - Baltic
/ 850 - Latin 1
/ 852 - Latin 2
/ 855 - Cyrillic
/ 857 - Turkish
/ 860 - Portuguese
/ 861 - Icelandic
/ 862 - Hebrew
/ 863 - Canadian French
/ 864 - Arabic
/ 865 - Nordic
/ 866 - Russian
/ 869 - Greek 2
/ 932 - Japanese (DBCS)
/ 936 - Simplified Chinese (DBCS)
/ 949 - Korean (DBCS)
/ 950 - Traditional Chinese (DBCS)
/ 0 - Include all code pages above and configured by f_setcp()
*/
#define FF_USE_LFN 3
#define FF_MAX_LFN 255
/* The FF_USE_LFN switches the support for LFN (long file name).
/
/ 0: Disable LFN. FF_MAX_LFN has no effect.
/ 1: Enable LFN with static working buffer on the BSS. Always NOT thread-safe.
/ 2: Enable LFN with dynamic working buffer on the STACK.
/ 3: Enable LFN with dynamic working buffer on the HEAP.
/
/ To enable the LFN, ffunicode.c needs to be added to the project. The LFN function
/ requiers certain internal working buffer occupies (FF_MAX_LFN + 1) * 2 bytes and
/ additional (FF_MAX_LFN + 44) / 15 * 32 bytes when exFAT is enabled.
/ The FF_MAX_LFN defines size of the working buffer in UTF-16 code unit and it can
/ be in range of 12 to 255. It is recommended to be set 255 to fully support LFN
/ specification.
/ When use stack for the working buffer, take care on stack overflow. When use heap
/ memory for the working buffer, memory management functions, ff_memalloc() and
/ ff_memfree() in ffsystem.c, need to be added to the project. */
#define FF_LFN_UNICODE 0
/* This option switches the character encoding on the API when LFN is enabled.
/
/ 0: ANSI/OEM in current CP (TCHAR = char)
/ 1: Unicode in UTF-16 (TCHAR = WCHAR)
/ 2: Unicode in UTF-8 (TCHAR = char)
/ 3: Unicode in UTF-32 (TCHAR = DWORD)
/
/ Also behavior of string I/O functions will be affected by this option.
/ When LFN is not enabled, this option has no effect. */
#define FF_LFN_BUF 255
#define FF_SFN_BUF 12
/* This set of options defines size of file name members in the FILINFO structure
/ which is used to read out directory items. These values should be suffcient for
/ the file names to read. The maximum possible length of the read file name depends
/ on character encoding. When LFN is not enabled, these options have no effect. */
#define FF_STRF_ENCODE 0
/* When FF_LFN_UNICODE >= 1 with LFN enabled, string I/O functions, f_gets(),
/ f_putc(), f_puts and f_printf() convert the character encoding in it.
/ This option selects assumption of character encoding ON THE FILE to be
/ read/written via those functions.
/
/ 0: ANSI/OEM in current CP
/ 1: Unicode in UTF-16LE
/ 2: Unicode in UTF-16BE
/ 3: Unicode in UTF-8
*/
#define FF_FS_RPATH 0
/* This option configures support for relative path.
/
/ 0: Disable relative path and remove related functions.
/ 1: Enable relative path. f_chdir() and f_chdrive() are available.
/ 2: f_getcwd() function is available in addition to 1.
*/
/*---------------------------------------------------------------------------/
/ Drive/Volume Configurations
/---------------------------------------------------------------------------*/
#define FF_VOLUMES 1
/* Number of volumes (logical drives) to be used. (1-10) */
#define FF_STR_VOLUME_ID 0
#define FF_VOLUME_STRS "sd"
/* FF_STR_VOLUME_ID switches support for volume ID in arbitrary strings.
/ When FF_STR_VOLUME_ID is set to 1 or 2, arbitrary strings can be used as drive
/ number in the path name. FF_VOLUME_STRS defines the volume ID strings for each
/ logical drives. Number of items must not be less than FF_VOLUMES. Valid
/ characters for the volume ID strings are A-Z, a-z and 0-9, however, they are
/ compared in case-insensitive. If FF_STR_VOLUME_ID >= 1 and FF_VOLUME_STRS is
/ not defined, a user defined volume string table needs to be defined as:
/
/ const char* VolumeStr[FF_VOLUMES] = {"ram","flash","sd","usb",...
/ Order is important. Any change to order, must also be reflected to diskio drive enum.
*/
#define FF_MULTI_PARTITION 0
/* This option switches support for multiple volumes on the physical drive.
/ By default (0), each logical drive number is bound to the same physical drive
/ number and only an FAT volume found on the physical drive will be mounted.
/ When this function is enabled (1), each logical drive number can be bound to
/ arbitrary physical drive and partition listed in the VolToPart[]. Also f_fdisk()
/ funciton will be available. */
#define FF_MIN_SS 512
#define FF_MAX_SS 512
/* This set of options configures the range of sector size to be supported. (512,
/ 1024, 2048 or 4096) Always set both 512 for most systems, generic memory card and
/ harddisk. But a larger value may be required for on-board flash memory and some
/ type of optical media. When FF_MAX_SS is larger than FF_MIN_SS, FatFs is configured
/ for variable sector size mode and disk_ioctl() function needs to implement
/ GET_SECTOR_SIZE command. */
#define FF_USE_TRIM 0
/* This option switches support for ATA-TRIM. (0:Disable or 1:Enable)
/ To enable Trim function, also CTRL_TRIM command should be implemented to the
/ disk_ioctl() function. */
#define FF_FS_NOFSINFO 1
/* If you need to know correct free space on the FAT32 volume, set bit 0 of this
/ option, and f_getfree() function at first time after volume mount will force
/ a full FAT scan. Bit 1 controls the use of last allocated cluster number.
/
/ bit0=0: Use free cluster count in the FSINFO if available.
/ bit0=1: Do not trust free cluster count in the FSINFO.
/ bit1=0: Use last allocated cluster number in the FSINFO if available.
/ bit1=1: Do not trust last allocated cluster number in the FSINFO.
*/
/*---------------------------------------------------------------------------/
/ System Configurations
/---------------------------------------------------------------------------*/
#define FF_FS_TINY 0
/* This option switches tiny buffer configuration. (0:Normal or 1:Tiny)
/ At the tiny configuration, size of file object (FIL) is shrinked FF_MAX_SS bytes.
/ Instead of private sector buffer eliminated from the file object, common sector
/ buffer in the filesystem object (FATFS) is used for the file data transfer. */
#define FF_FS_EXFAT 1
/* This option switches support for exFAT filesystem. (0:Disable or 1:Enable)
/ To enable exFAT, also LFN needs to be enabled. (FF_USE_LFN >= 1)
/ Note that enabling exFAT discards ANSI C (C89) compatibility. */
#define FF_FS_NORTC 1
#define FF_NORTC_MON 1
#define FF_NORTC_MDAY 1
#define FF_NORTC_YEAR 2022
/* The option FF_FS_NORTC switches timestamp function. If the system does not have
/ any RTC function or valid timestamp is not needed, set FF_FS_NORTC = 1 to disable
/ the timestamp function. Every object modified by FatFs will have a fixed timestamp
/ defined by FF_NORTC_MON, FF_NORTC_MDAY and FF_NORTC_YEAR in local time.
/ To enable timestamp function (FF_FS_NORTC = 0), get_fattime() function need to be
/ added to the project to read current time form real-time clock. FF_NORTC_MON,
/ FF_NORTC_MDAY and FF_NORTC_YEAR have no effect.
/ These options have no effect at read-only configuration (FF_FS_READONLY = 1). */
#define FF_FS_LOCK 0
/* The option FF_FS_LOCK switches file lock function to control duplicated file open
/ and illegal operation to open objects. This option must be 0 when FF_FS_READONLY
/ is 1.
/
/ 0: Disable file lock function. To avoid volume corruption, application program
/ should avoid illegal open, remove and rename to the open objects.
/ >0: Enable file lock function. The value defines how many files/sub-directories
/ can be opened simultaneously under file lock control. Note that the file
/ lock control is independent of re-entrancy. */
/* #include <somertos.h> // O/S definitions */
#define FF_FS_REENTRANT 0
#define FF_FS_TIMEOUT 1000
#define FF_SYNC_t HANDLE
/* The option FF_FS_REENTRANT switches the re-entrancy (thread safe) of the FatFs
/ module itself. Note that regardless of this option, file access to different
/ volume is always re-entrant and volume control functions, f_mount(), f_mkfs()
/ and f_fdisk() function, are always not re-entrant. Only file/directory access
/ to the same volume is under control of this function.
/
/ 0: Disable re-entrancy. FF_FS_TIMEOUT and FF_SYNC_t have no effect.
/ 1: Enable re-entrancy. Also user provided synchronization handlers,
/ ff_req_grant(), ff_rel_grant(), ff_del_syncobj() and ff_cre_syncobj()
/ function, must be added to the project. Samples are available in
/ option/syscall.c.
/
/ The FF_FS_TIMEOUT defines timeout period in unit of time tick.
/ The FF_SYNC_t defines O/S dependent sync object type. e.g. HANDLE, ID, OS_EVENT*,
/ SemaphoreHandle_t and etc. A header file for O/S definitions needs to be
/ included somewhere in the scope of ff.h. */
/*--- End of configuration options ---*/

41
bdk/ianos/elfload/elf.h
View File

@@ -29,33 +29,34 @@
#ifndef ELF_H
#define ELF_H
#include <stdint.h>
typedef uint8_t Elf_Byte;
#include <utils/types.h>
typedef uint32_t Elf32_Addr; /* Unsigned program address */
typedef uint32_t Elf32_Off; /* Unsigned file offset */
typedef int32_t Elf32_Sword; /* Signed large integer */
typedef uint32_t Elf32_Word; /* Unsigned large integer */
typedef uint16_t Elf32_Half; /* Unsigned medium integer */
typedef u8 Elf_Byte;
typedef uint64_t Elf64_Addr;
typedef uint64_t Elf64_Off;
typedef int32_t Elf64_Shalf;
typedef u32 Elf32_Addr; /* Unsigned program address */
typedef u32 Elf32_Off; /* Unsigned file offset */
typedef s32 Elf32_Sword; /* Signed large integer */
typedef u32 Elf32_Word; /* Unsigned large integer */
typedef u16 Elf32_Half; /* Unsigned medium integer */
typedef u64 Elf64_Addr;
typedef u64 Elf64_Off;
typedef s32 Elf64_Shalf;
#ifdef __alpha__
typedef int64_t Elf64_Sword;
typedef uint64_t Elf64_Word;
typedef s64 Elf64_Sword;
typedef u64 Elf64_Word;
#else
typedef int32_t Elf64_Sword;
typedef uint32_t Elf64_Word;
typedef s32 Elf64_Sword;
typedef u32 Elf64_Word;
#endif
typedef int64_t Elf64_Sxword;
typedef uint64_t Elf64_Xword;
typedef s64 Elf64_Sxword;
typedef u64 Elf64_Xword;
typedef uint32_t Elf64_Half;
typedef uint16_t Elf64_Quarter;
typedef u32 Elf64_Half;
typedef u16 Elf64_Quarter;
/*
* e_ident[] identification indexes
@@ -376,7 +377,7 @@ typedef struct
#define ELF64_R_SYM(info) ((info) >> 32)
#define ELF64_R_TYPE(info) ((info)&0xFFFFFFFF)
#define ELF64_R_INFO(s, t) (((s) << 32) + (__uint32_t)(t))
#define ELF64_R_INFO(s, t) (((s) << 32) + (u32)(t))
#if defined(__mips64__) && defined(__MIPSEL__)
/*
@@ -389,7 +390,7 @@ typedef struct
#undef ELF64_R_INFO
#define ELF64_R_TYPE(info) (swap32((info) >> 32))
#define ELF64_R_SYM(info) ((info)&0xFFFFFFFF)
#define ELF64_R_INFO(s, t) (((__uint64_t)swap32(t) << 32) + (__uint32_t)(s))
#define ELF64_R_INFO(s, t) (((u64)swap32(t) << 32) + (u32)(s))
#endif /* __mips64__ && __MIPSEL__ */
/* Program Header */

8
bdk/ianos/elfload/elfload.c
View File

@@ -25,7 +25,7 @@ el_status el_pread(el_ctx *ctx, void *def, size_t nb, size_t offset)
}
#define EL_PHOFF(ctx, num) (((ctx)->ehdr.e_phoff + (num) *(ctx)->ehdr.e_phentsize))
el_status el_findphdr(el_ctx *ctx, Elf_Phdr *phdr, uint32_t type, unsigned *i)
el_status el_findphdr(el_ctx *ctx, Elf_Phdr *phdr, u32 type, unsigned *i)
{
el_status rv = EL_OK;
for (; *i < ctx->ehdr.e_phnum; (*i)++)
@@ -44,7 +44,7 @@ el_status el_findphdr(el_ctx *ctx, Elf_Phdr *phdr, uint32_t type, unsigned *i)
}
#define EL_SHOFF(ctx, num) (((ctx)->ehdr.e_shoff + (num) *(ctx)->ehdr.e_shentsize))
el_status el_findshdr(el_ctx *ctx, Elf_Shdr *shdr, uint32_t type, unsigned *i)
el_status el_findshdr(el_ctx *ctx, Elf_Shdr *shdr, u32 type, unsigned *i)
{
el_status rv = EL_OK;
@@ -213,7 +213,7 @@ el_status el_load(el_ctx *ctx, el_alloc_cb alloc)
return rv;
}
el_status el_finddyn(el_ctx *ctx, Elf_Dyn *dyn, uint32_t tag)
el_status el_finddyn(el_ctx *ctx, Elf_Dyn *dyn, u32 tag)
{
el_status rv = EL_OK;
size_t ndyn = ctx->dynsize / sizeof(Elf_Dyn);
@@ -231,7 +231,7 @@ el_status el_finddyn(el_ctx *ctx, Elf_Dyn *dyn, uint32_t tag)
return EL_OK;
}
el_status el_findrelocs(el_ctx *ctx, el_relocinfo *ri, uint32_t type)
el_status el_findrelocs(el_ctx *ctx, el_relocinfo *ri, u32 type)
{
el_status rv = EL_OK;

8
bdk/ianos/elfload/elfload.h
View File

@@ -22,8 +22,6 @@
#include "elfarch.h"
#include "elf.h"
#include <utils/types.h>
#ifdef DEBUG
#include <gfx_utils.h>
#define EL_DEBUG(format, ...) \
@@ -100,7 +98,7 @@ el_status el_load(el_ctx *ctx, el_alloc_cb alloccb);
* If the end of the phdrs table was reached, *i is set to -1 and the contents
* of *phdr are undefined
*/
el_status el_findphdr(el_ctx *ctx, Elf_Phdr *phdr, uint32_t type, unsigned *i);
el_status el_findphdr(el_ctx *ctx, Elf_Phdr *phdr, u32 type, unsigned *i);
/* Relocate the loaded executable */
el_status el_relocate(el_ctx *ctx);
@@ -108,7 +106,7 @@ el_status el_relocate(el_ctx *ctx);
/* find a dynamic table entry
* returns the entry on success, dyn->d_tag = DT_NULL on failure
*/
el_status el_finddyn(el_ctx *ctx, Elf_Dyn *dyn, uint32_t type);
el_status el_finddyn(el_ctx *ctx, Elf_Dyn *dyn, u32 type);
typedef struct
{
@@ -122,6 +120,6 @@ typedef struct
* pass DT_REL or DT_RELA for type
* sets ri->entrysize = 0 if not found
*/
el_status el_findrelocs(el_ctx *ctx, el_relocinfo *ri, uint32_t type);
el_status el_findrelocs(el_ctx *ctx, el_relocinfo *ri, u32 type);
#endif

12
bdk/ianos/elfload/elfreloc_aarch64.c
View File

@@ -23,9 +23,9 @@
el_status el_applyrela(el_ctx *ctx, Elf_RelA *rel)
{
uintptr_t *p = (uintptr_t *)(rel->r_offset + ctx->base_load_paddr);
uint32_t type = ELF_R_TYPE(rel->r_info);
uint32_t sym = ELF_R_SYM(rel->r_info);
uptr *p = (uptr *)(rel->r_offset + ctx->base_load_paddr);
u32 type = ELF_R_TYPE(rel->r_info);
u32 sym = ELF_R_SYM(rel->r_info);
switch (type)
{
@@ -53,9 +53,9 @@ el_status el_applyrela(el_ctx *ctx, Elf_RelA *rel)
el_status el_applyrel(el_ctx *ctx, Elf_Rel *rel)
{
uintptr_t *p = (uintptr_t *)(rel->r_offset + ctx->base_load_paddr);
uint32_t type = ELF_R_TYPE(rel->r_info);
uint32_t sym = ELF_R_SYM(rel->r_info);
uptr *p = (uptr *)(rel->r_offset + ctx->base_load_paddr);
u32 type = ELF_R_TYPE(rel->r_info);
u32 sym = ELF_R_SYM(rel->r_info);
switch (type)
{

6
bdk/ianos/elfload/elfreloc_arm.c
View File

@@ -20,9 +20,9 @@
el_status el_applyrel(el_ctx *ctx, Elf_Rel *rel)
{
uint32_t sym = ELF_R_SYM(rel->r_info); // Symbol offset
uint32_t type = ELF_R_TYPE(rel->r_info); // Relocation Type
uintptr_t *p = (uintptr_t *)(rel->r_offset + ctx->base_load_paddr); // Target Addr
u32 sym = ELF_R_SYM(rel->r_info); // Symbol offset
u32 type = ELF_R_TYPE(rel->r_info); // Relocation Type
uptr *p = (uptr *)(rel->r_offset + ctx->base_load_paddr); // Target Addr
#if 0 // For later symbol usage
Elf32_Sym *elfSym;

2
bdk/ianos/ianos.c
View File

@@ -22,7 +22,7 @@
#include <module.h>
#include <mem/heap.h>
#include <power/max7762x.h>
#include <storage/nx_sd.h>
#include <storage/sd.h>
#include <utils/types.h>
#include <gfx_utils.h>

2
bdk/input/touch.c
View File

@@ -410,7 +410,7 @@ int touch_power_on()
gpio_output_enable(GPIO_PORT_J, GPIO_PIN_7, GPIO_OUTPUT_ENABLE);
gpio_write(GPIO_PORT_J, GPIO_PIN_7, GPIO_HIGH);
// IRQ and more.
// Touscreen IRQ.
// PINMUX_AUX(PINMUX_AUX_TOUCH_INT) = PINMUX_INPUT_ENABLE | PINMUX_TRISTATE | PINMUX_PULL_UP | 3;
// gpio_config(GPIO_PORT_X, GPIO_PIN_1, GPIO_MODE_GPIO);
// gpio_write(GPIO_PORT_X, GPIO_PIN_1, GPIO_LOW);

68
bdk/libs/fatfs/ff.c
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018-2019 CTCaer
* Copyright (c) 2018-2021 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -38,8 +38,9 @@
#include "ff.h" /* Declarations of FatFs API */
#include "diskio.h" /* Declarations of device I/O functions */
#include <storage/mbr_gpt.h>
#include <gfx_utils.h>
#include "../../storage/nx_sd.h"
#include <storage/sdmmc.h>
#define EFSPRINTF(text, ...) print_error(); gfx_printf("%k"text"%k\n", 0xFFFFFF00, 0xFFFFFFFF);
//#define EFSPRINTF(...)
@@ -3274,7 +3275,6 @@ static FRESULT find_volume ( /* FR_OK(0): successful, !=0: an error occurred */
stat = disk_status(fs->pdrv);
if (!(stat & STA_NOINIT)) { /* and the physical drive is kept initialized */
if (!FF_FS_READONLY && mode && (stat & STA_PROTECT)) { /* Check write protection if needed */
EFSPRINTF("WPEN1");
return FR_WRITE_PROTECTED;
}
return FR_OK; /* The filesystem object is valid */
@@ -3285,14 +3285,13 @@ static FRESULT find_volume ( /* FR_OK(0): successful, !=0: an error occurred */
/* Following code attempts to mount the volume. (analyze BPB and initialize the filesystem object) */
fs->fs_type = 0; /* Clear the filesystem object */
fs->part_type = 0; /* Clear the Partition object */
fs->pdrv = LD2PD(vol); /* Bind the logical drive and a physical drive */
stat = disk_initialize(fs->pdrv); /* Initialize the physical drive */
if (stat & STA_NOINIT) { /* Check if the initialization succeeded */
EFSPRINTF("MDNR");
return FR_NOT_READY; /* Failed to initialize due to no medium or hard error */
}
if (!FF_FS_READONLY && mode && (stat & STA_PROTECT)) { /* Check disk write protection if needed */
EFSPRINTF("WPEN2");
return FR_WRITE_PROTECTED;
}
#if FF_MAX_SS != FF_MIN_SS /* Get sector size (multiple sector size cfg only) */
@@ -3319,6 +3318,20 @@ static FRESULT find_volume ( /* FR_OK(0): successful, !=0: an error occurred */
EFSPRINTF("BRNL");
return FR_DISK_ERR; /* An error occured in the disk I/O layer */
}
#if FF_SIMPLE_GPT
if (fmt >= 2) {
/* If GPT Check the first partition */
gpt_header_t *gpt_header = (gpt_header_t *)fs->win;
if (move_window(fs, 1) != FR_OK) return FR_DISK_ERR;
if (!mem_cmp(&gpt_header->signature, "EFI PART", 8)) {
if (move_window(fs, gpt_header->part_ent_lba) != FR_OK) return FR_DISK_ERR;
gpt_entry_t *gpt_entry = (gpt_entry_t *)fs->win;
fs->part_type = 1;
bsect = gpt_entry->lba_start;
fmt = bsect ? check_fs(fs, bsect) : 3; /* Check the partition */
}
}
#endif
if (fmt >= 2) {
EFSPRINTF("NOFAT");
return FR_NO_FILESYSTEM; /* No FAT volume is found */
@@ -4049,8 +4062,7 @@ FRESULT f_write (
}
if (clst == 0) {
EFSPRINTF("DSKFULL");
fp->flag |= FA_MODIFIED;
ABORT(fs, FR_DISK_ERR); /* Could not allocate a new cluster (disk full) */
break; /* Could not allocate a new cluster (disk full) */
}
if (clst == 1) {
EFSPRINTF("CCHK");
@@ -4698,9 +4710,9 @@ DWORD *f_expand_cltbl (
}
if (f_lseek(fp, CREATE_LINKMAP)) { /* Create cluster link table */
ff_memfree(fp->cltbl);
fp->cltbl = NULL;
fp->cltbl = (void *)0;
EFSPRINTF("CLTBLSZ");
return NULL;
return (void *)0;
}
f_lseek(fp, 0);
@@ -5862,7 +5874,7 @@ FRESULT f_mkfs (
if (vol < 0) return FR_INVALID_DRIVE;
if (FatFs[vol]) FatFs[vol]->fs_type = 0; /* Clear the volume if mounted */
pdrv = LD2PD(vol); /* Physical drive */
part = 1; /* Partition (0:create as new, 1-4:get from partition table) */
part = LD2PT(vol); /* Partition (0:create as new, 1-4:get from partition table) */
/* Check physical drive status */
stat = disk_initialize(pdrv);
@@ -5893,7 +5905,7 @@ FRESULT f_mkfs (
if (!buf || sz_buf == 0) return FR_NOT_ENOUGH_CORE;
/* Determine where the volume to be located (b_vol, sz_vol) */
if (part > 0) {
if (FF_MULTI_PARTITION && part != 0) {
/* Get partition information from partition table in the MBR */
if (disk_read(pdrv, buf, 0, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Load MBR */
if (ld_word(buf + BS_55AA) != 0xAA55) LEAVE_MKFS(FR_MKFS_ABORTED); /* Check if MBR is valid */
@@ -6172,7 +6184,9 @@ FRESULT f_mkfs (
#endif
/* Create FAT VBR */
mem_set(buf, 0, ss);
mem_cpy(buf + BS_JmpBoot, "\xEB\xFE\x90" "MSDOS5.0", 11);/* Boot jump code (x86), OEM name */
/* Boot jump code (x86), OEM name */
if (!(opt & FM_PRF2)) mem_cpy(buf + BS_JmpBoot, "\xEB\xFE\x90" "NYX1.0.0", 11);
else mem_cpy(buf + BS_JmpBoot, "\xEB\xE9\x90\x00\x00\x00\x00\x00\x00\x00\x00", 11);
st_word(buf + BPB_BytsPerSec, ss); /* Sector size [byte] */
buf[BPB_SecPerClus] = (BYTE)pau; /* Cluster size [sector] */
st_word(buf + BPB_RsvdSecCnt, (WORD)sz_rsv); /* Size of reserved area */
@@ -6185,23 +6199,27 @@ FRESULT f_mkfs (
}
buf[BPB_Media] = 0xF8; /* Media descriptor byte */
st_word(buf + BPB_SecPerTrk, 63); /* Number of sectors per track (for int13) */
st_word(buf + BPB_NumHeads, 255); /* Number of heads (for int13) */
st_word(buf + BPB_NumHeads, (opt & FM_PRF2) ? 16 : 255); /* Number of heads (for int13) */
st_dword(buf + BPB_HiddSec, b_vol); /* Volume offset in the physical drive [sector] */
if (fmt == FS_FAT32) {
st_dword(buf + BS_VolID32, GET_FATTIME()); /* VSN */
st_dword(buf + BS_VolID32, (opt & FM_PRF2) ? 0 : GET_FATTIME()); /* VSN */
st_dword(buf + BPB_FATSz32, sz_fat); /* FAT size [sector] */
st_dword(buf + BPB_RootClus32, 2); /* Root directory cluster # (2) */
st_word(buf + BPB_FSInfo32, 1); /* Offset of FSINFO sector (VBR + 1) */
st_word(buf + BPB_BkBootSec32, 6); /* Offset of backup VBR (VBR + 6) */
buf[BS_DrvNum32] = 0x80; /* Drive number (for int13) */
buf[BS_BootSig32] = 0x29; /* Extended boot signature */
mem_cpy(buf + BS_VolLab32, "SWITCH SD " "FAT32 ", 19); /* Volume label, FAT signature */
/* Volume label, FAT signature */
if (!(opt & FM_PRF2)) mem_cpy(buf + BS_VolLab32, FF_MKFS_LABEL "FAT32 ", 19);
else mem_cpy(buf + BS_VolLab32, "NO NAME " "FAT32 ", 19);
} else {
st_dword(buf + BS_VolID, GET_FATTIME()); /* VSN */
st_word(buf + BPB_FATSz16, (WORD)sz_fat); /* FAT size [sector] */
buf[BS_DrvNum] = 0x80; /* Drive number (for int13) */
buf[BS_BootSig] = 0x29; /* Extended boot signature */
mem_cpy(buf + BS_VolLab, "SWITCH SD " "FAT ", 19); /* Volume label, FAT signature */
/* Volume label, FAT signature */
if (!(opt & FM_PRF2)) mem_cpy(buf + BS_VolLab, FF_MKFS_LABEL "FAT ", 19);
else mem_cpy(buf + BS_VolLab, "NO NAME " "FAT ", 19);
}
st_word(buf + BS_55AA, 0xAA55); /* Signature (offset is fixed here regardless of sector size) */
if (disk_write(pdrv, buf, b_vol, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Write it to the VBR sector */
@@ -6219,6 +6237,16 @@ FRESULT f_mkfs (
disk_write(pdrv, buf, b_vol + 1, 1); /* Write original FSINFO (VBR + 1) */
}
/* Create PRF2SAFE info */
if (fmt == FS_FAT32 && opt & FM_PRF2) {
mem_set(buf, 0, ss);
buf[16] = 0x64; /* Record type */
st_dword(buf + 32, 0x03); /* Unknown. SYSTEM: 0x3F00. USER: 0x03. Volatile. */
st_dword(buf + 36, 25); /* Entries. SYSTEM: 22. USER: 25.Static? */
st_dword(buf + 508, 0x517BBFE0); /* Custom CRC32. SYSTEM: 0x6B673904. USER: 0x517BBFE0. */
disk_write(pdrv, buf, b_vol + 3, 1); /* Write PRF2SAFE info (VBR + 3) */
}
/* Initialize FAT area */
mem_set(buf, 0, (UINT)szb_buf);
sect = b_fat; /* FAT start sector */
@@ -6264,7 +6292,7 @@ FRESULT f_mkfs (
}
/* Update partition information */
if (part != 0) { /* Created in the existing partition */
if (FF_MULTI_PARTITION && part != 0) { /* Created in the existing partition */
/* Update system ID in the partition table */
if (disk_read(pdrv, buf, 0, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Read the MBR */
buf[MBR_Table + (part - 1) * SZ_PTE + PTE_System] = sys; /* Set system ID */
@@ -6372,6 +6400,7 @@ FRESULT f_fdisk (
#endif /* FF_MULTI_PARTITION */
#endif /* FF_USE_MKFS && !FF_FS_READONLY */
// We don't need these where we're going...
extern sdmmc_storage_t sd_storage;
@@ -6449,7 +6478,6 @@ FRESULT f_fdisk_mod (
LEAVE_MKFS(res);
}
#if FF_USE_STRFUNC
#if FF_USE_LFN && FF_LFN_UNICODE && (FF_STRF_ENCODE < 0 || FF_STRF_ENCODE > 3)
#error Wrong FF_STRF_ENCODE setting
@@ -6782,6 +6810,8 @@ int f_puts (
putbuff pb;
if (str == (void *)0) return EOF; /* String is NULL */
putc_init(&pb, fp);
while (*str) putc_bfd(&pb, *str++); /* Put the string */
return putc_flush(&pb);
@@ -6808,6 +6838,8 @@ int f_printf (
TCHAR c, d, str[32], *p;
if (fmt == (void *)0) return EOF; /* String is NULL */
putc_init(&pb, fp);
va_start(arp, fmt);

12
bdk/libs/fatfs/ff.h
View File

@@ -95,8 +95,8 @@ typedef DWORD FSIZE_t;
/* Filesystem object structure (FATFS) */
typedef struct {
BYTE win[FF_MAX_SS]; /* Disk access window for Directory, FAT (and file data at tiny cfg) */
BYTE fs_type; /* Filesystem type (0:not mounted) */
BYTE part_type; /* Partition type (0:MBR, 1:GPT) */
BYTE pdrv; /* Associated physical drive */
BYTE n_fats; /* Number of FATs (1 or 2) */
BYTE wflag; /* win[] flag (b0:dirty) */
@@ -138,6 +138,7 @@ typedef struct {
DWORD bitbase; /* Allocation bitmap base sector */
#endif
DWORD winsect; /* Current sector appearing in the win[] */
BYTE win[FF_MAX_SS] __attribute__((aligned(8))); /* Disk access window for Directory, FAT (and file data at tiny cfg). DMA aligned. */
} FATFS;
@@ -168,9 +169,6 @@ typedef struct {
/* File object structure (FIL) */
typedef struct {
#if !FF_FS_TINY
BYTE buf[FF_MAX_SS]; /* File private data read/write window */
#endif
FFOBJID obj; /* Object identifier (must be the 1st member to detect invalid object pointer) */
BYTE flag; /* File status flags */
BYTE err; /* Abort flag (error code) */
@@ -184,6 +182,9 @@ typedef struct {
#if FF_USE_FASTSEEK
DWORD* cltbl; /* Pointer to the cluster link map table (nulled on open, set by application) */
#endif
#if !FF_FS_TINY
BYTE buf[FF_MAX_SS] __attribute__((aligned(8))); /* File private data read/write window. DMA aligned. */
#endif
} FIL;
@@ -291,7 +292,7 @@ FRESULT f_expand (FIL* fp, FSIZE_t fsz, BYTE opt); /* Allocate a contiguous
FRESULT f_mount (FATFS* fs, const TCHAR* path, BYTE opt); /* Mount/Unmount a logical drive */
FRESULT f_mkfs (const TCHAR* path, BYTE opt, DWORD au, void* work, UINT len); /* Create a FAT volume */
FRESULT f_fdisk (BYTE pdrv, const DWORD* szt, void* work); /* Divide a physical drive into some partitions */
FRESULT f_fdisk_mod (BYTE pdrv, const DWORD* szt, void* work); // Modded version of f_fdisk that works:tm:
FRESULT f_fdisk_mod (BYTE pdrv, const DWORD* szt, void* work);
FRESULT f_setcp (WORD cp); /* Set current code page */
int f_putc (TCHAR c, FIL* fp); /* Put a character to the file */
int f_puts (const TCHAR* str, FIL* cp); /* Put a string to the file */
@@ -366,6 +367,7 @@ int ff_del_syncobj (FF_SYNC_t sobj); /* Delete a sync object */
#define FM_EXFAT 0x04
#define FM_ANY 0x07
#define FM_SFD 0x08
#define FM_PRF2 0x10
/* Filesystem type (FATFS.fs_type) */
#define FS_FAT12 1

6
bdk/libs/nx_savedata/header.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2022 shchmue
* Copyright (c) 2019-2020 shchmue
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -61,7 +61,7 @@ OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#define VERSION_RMAP 0x10000
#define VERSION_IVFC 0x20000
#define SAVE_BLOCK_SIZE_DEFAULT SZ_16K
#define SAVE_BLOCK_SIZE_DEFAULT 0x4000
#define SAVE_NUM_HEADERS 2
@@ -232,6 +232,6 @@ typedef struct {
};
} save_header_t;
static_assert(sizeof(save_header_t) == SZ_16K, "Save header size is wrong!");
static_assert(sizeof(save_header_t) == 0x4000, "Save header size is wrong!");
#endif

4
bdk/libs/nx_savedata/remap_storage.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2022 shchmue
* Copyright (c) 2019-2020 shchmue
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -41,7 +41,7 @@ OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#include <stdint.h>
#define RMAP_ALIGN_SMALL 0x200
#define RMAP_ALIGN_LARGE SZ_16K
#define RMAP_ALIGN_LARGE 0x4000
typedef struct {
uint32_t magic; /* RMAP */

25
bdk/libs/nx_savedata/save.c
View File

@@ -34,14 +34,7 @@ OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#include "save.h"
#include <gfx_utils.h>
#include <mem/heap.h>
#include <rtc/max77620-rtc.h>
#include <sec/se.h>
#include <storage/nx_sd.h>
#include <utils/ini.h>
#include <utils/sprintf.h>
#include <bdk.h>
#include <stdlib.h>
#include <string.h>
@@ -299,14 +292,14 @@ void save_free_contexts(save_ctx_t *ctx) {
}
static ALWAYS_INLINE bool save_flush(save_ctx_t *ctx) {
if (!save_cached_storage_flush(ctx->core_data_ivfc_storage.data_level)) {
EPRINTF("Failed to flush cached storage!");
}
if (save_remap_storage_write(&ctx->meta_remap_storage, ctx->fat_storage, ctx->header.layout.fat_offset, ctx->header.layout.fat_size) != ctx->header.layout.fat_size) {
EPRINTF("Failed to write meta remap storage!");
}
if (ctx->header.layout.version >= VERSION_DISF_5) {
if (ctx->header.layout.version < VERSION_DISF_5) {
if (!save_cached_storage_flush(ctx->core_data_ivfc_storage.data_level)) {
EPRINTF("Failed to flush cached storage!");
}
if (save_remap_storage_write(&ctx->meta_remap_storage, ctx->fat_storage, ctx->header.layout.fat_offset, ctx->header.layout.fat_size) != ctx->header.layout.fat_size) {
EPRINTF("Failed to write meta remap storage!");
}
} else {
if (!save_cached_storage_flush(ctx->fat_ivfc_storage.data_level)) {
EPRINTF("Failed to flush cached storage!");
}

7
bdk/libs/nx_savedata/save_data_file.c
View File

@@ -99,10 +99,9 @@ bool save_data_file_write(save_data_file_ctx_t *ctx, uint64_t *out_bytes_written
if (!save_data_file_validate_write_params(ctx, offset, count, ctx->mode, &is_resize_needed))
return false;
if (is_resize_needed) {
if (!save_data_file_set_size(ctx, offset + count))
return false;
}
if (!save_data_file_set_size(ctx, offset + count))
return false;
*out_bytes_written = save_allocation_table_storage_write(&ctx->base_storage, buffer, offset, count);
return true;

2
bdk/libs/nx_savedata/save_fs_list.c
View File

@@ -250,7 +250,7 @@ uint32_t save_fs_list_allocate_entry(save_filesystem_list_ctx_t *ctx) {
if (capacity == 0 || length >= capacity) {
uint64_t current_size, new_size;
save_allocation_table_storage_get_size(&ctx->storage, &current_size);
if (!save_allocation_table_storage_set_size(&ctx->storage, current_size + SZ_16K))
if (!save_allocation_table_storage_set_size(&ctx->storage, current_size + 0x4000))
return 0;
save_allocation_table_storage_get_size(&ctx->storage, &new_size);
if (!save_fs_list_set_capacity(ctx, (uint32_t)(new_size / sizeof(save_fs_list_entry_t))))

2
bdk/libs/nx_savedata/save_fs_list.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2022 shchmue
* Copyright (c) 2019-2020 shchmue
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,

12
bdk/mem/mc_t210.h
View File

@@ -464,11 +464,19 @@
#define MC_UNTRANSLATED_REGION_CHECK 0x948
#define MC_DA_CONFIG0 0x9dc
// MC_VIDEO_PROTECT_REG_CTRL
#define VPR_LOCK_MODE_SHIFT 0
#define VPR_CTRL_UNLOCKED (0 << VPR_LOCK_MODE_SHIFT)
#define VPR_CTRL_LOCKED (1 << VPR_LOCK_MODE_SHIFT)
#define VPR_PROTECT_MODE_SHIFT 1
#define SEC_CTRL_SECURE (0 << VPR_PROTECT_MODE_SHIFT)
#define VPR_CTRL_TZ_SECURE (1 << VPR_PROTECT_MODE_SHIFT)
// MC_SECURITY_CARVEOUTX_CFG0
// Mode of LOCK_MODE.
#define PROTECT_MODE_SHIFT 0
#define SEC_CARVEOUT_CFG_SECURE (0 << PROTECT_MODE_SHIFT0)
#define SEC_CARVEOUT_CFG_TZ_SECURE (1 << PROTECT_MODE_SHIFT0)
#define SEC_CARVEOUT_CFG_SECURE (0 << PROTECT_MODE_SHIFT)
#define SEC_CARVEOUT_CFG_TZ_SECURE (1 << PROTECT_MODE_SHIFT)
// Enables PROTECT_MODE.
#define LOCK_MODE_SHIFT 1
#define SEC_CARVEOUT_CFG_UNLOCKED (0 << LOCK_MODE_SHIFT)

53
bdk/mem/minerva.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019 CTCaer
* Copyright (c) 2019-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -19,8 +19,8 @@
#include "minerva.h"
#include <soc/clock.h>
#include <ianos/ianos.h>
#include <mem/emc.h>
#include <soc/clock.h>
#include <soc/fuse.h>
#include <soc/hw_init.h>
@@ -42,7 +42,7 @@ u32 minerva_init()
if (hw_get_chip_id() == GP_HIDREV_MAJOR_T210B01)
return 0;
#ifdef NYX
#ifdef BDK_MINERVA_CFG_FROM_RAM
// Set table to nyx storage.
mtc_cfg->mtc_table = (emc_table_t *)nyx_str->mtc_table;
@@ -97,9 +97,10 @@ u32 minerva_init()
return 1;
// Get current frequency
u32 current_emc_clk_src = CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC);
for (curr_ram_idx = 0; curr_ram_idx < 10; curr_ram_idx++)
{
if (CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) == mtc_cfg->mtc_table[curr_ram_idx].clk_src_emc)
if (current_emc_clk_src == mtc_cfg->mtc_table[curr_ram_idx].clk_src_emc)
break;
}
@@ -156,6 +157,39 @@ void minerva_prep_boot_freq()
minerva_change_freq(FREQ_800);
}
void minerva_prep_boot_l4t()
{
if (!minerva_cfg)
return;
mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
// Set init frequency.
minerva_change_freq(FREQ_204);
// Train the rest of the frequencies.
mtc_cfg->train_mode = OP_TRAIN;
for (u32 i = 0; i < mtc_cfg->table_entries; i++)
{
mtc_cfg->rate_to = mtc_cfg->mtc_table[i].rate_khz;
// Skip already trained frequencies.
if (mtc_cfg->rate_to == FREQ_204 || mtc_cfg->rate_to == FREQ_800 || mtc_cfg->rate_to == FREQ_1600)
continue;
// Train frequency.
minerva_cfg(mtc_cfg, NULL);
}
// Do FSP WAR and scale to 800 MHz as boot freq.
bool fsp_opwr_enabled = !!(EMC(EMC_MRW3) & 0xC0);
if (fsp_opwr_enabled)
minerva_change_freq(FREQ_666);
minerva_change_freq(FREQ_800);
// Do not let other mtc ops.
mtc_cfg->init_done = 0;
}
void minerva_periodic_training()
{
if (!minerva_cfg)
@@ -167,4 +201,13 @@ void minerva_periodic_training()
mtc_cfg->train_mode = OP_PERIODIC_TRAIN;
minerva_cfg(mtc_cfg, NULL);
}
}
}
emc_table_t *minerva_get_mtc_table()
{
if (!minerva_cfg)
return NULL;
mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
return mtc_cfg->mtc_table;
}

5
bdk/mem/minerva.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019 CTCaer
* Copyright (c) 2019-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -53,6 +53,7 @@ enum train_mode_t
typedef enum
{
FREQ_204 = 204000,
FREQ_666 = 665600,
FREQ_800 = 800000,
FREQ_1600 = 1600000
} minerva_freq_t;
@@ -61,6 +62,8 @@ extern void (*minerva_cfg)(mtc_config_t *mtc_cfg, void *);
u32 minerva_init();
void minerva_change_freq(minerva_freq_t freq);
void minerva_prep_boot_freq();
void minerva_prep_boot_l4t();
void minerva_periodic_training();
emc_table_t *minerva_get_mtc_table();
#endif

124
bdk/mem/sdram_config_lz.inl
View File

@@ -1,124 +0,0 @@
/*
* Copyright (c) 2018 naehrwert
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
static const u8 _dram_cfg_lz[1262] = {
0x17, 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00,
0x00, 0x2C, 0x17, 0x04, 0x09, 0x00, 0x17, 0x04, 0x04, 0x17, 0x08, 0x08,
0x17, 0x10, 0x10, 0x00, 0x00, 0x68, 0xBC, 0x01, 0x70, 0x0A, 0x00, 0x00,
0x00, 0x04, 0xB4, 0x01, 0x70, 0x01, 0x32, 0x54, 0x76, 0xC8, 0xE6, 0x00,
0x70, 0x17, 0x10, 0x24, 0x34, 0x00, 0x00, 0x00, 0x02, 0x80, 0x18, 0x40,
0x00, 0x00, 0x00, 0x17, 0x04, 0x04, 0x17, 0x09, 0x18, 0xFF, 0xFF, 0x1F,
0x00, 0xD8, 0x51, 0x1A, 0xA0, 0x00, 0x00, 0x50, 0x05, 0x00, 0x00, 0x77,
0x00, 0x17, 0x04, 0x04, 0x17, 0x08, 0x08, 0x17, 0x08, 0x08, 0xA6, 0xA6,
0xAF, 0xB3, 0x3C, 0x9E, 0x00, 0x00, 0x03, 0x03, 0xE0, 0xC1, 0x04, 0x04,
0x04, 0x04, 0x17, 0x04, 0x04, 0x17, 0x04, 0x3C, 0x1F, 0x1F, 0x1F, 0x1F,
0x17, 0x04, 0x04, 0x17, 0x06, 0x06, 0x00, 0x00, 0x04, 0x08, 0x17, 0x06,
0x46, 0xA1, 0x01, 0x00, 0x00, 0x32, 0x17, 0x0B, 0x64, 0x01, 0x17, 0x04,
0x7C, 0x17, 0x07, 0x0C, 0x03, 0x17, 0x04, 0x04, 0x00, 0x00, 0x00, 0x1E,
0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x13,
0x17, 0x0B, 0x2C, 0x09, 0x00, 0x00, 0x00, 0x17, 0x05, 0x5D, 0x17, 0x07,
0x10, 0x0B, 0x17, 0x07, 0x28, 0x08, 0x17, 0x07, 0x0C, 0x17, 0x04, 0x1C,
0x20, 0x00, 0x00, 0x00, 0x06, 0x17, 0x04, 0x04, 0x17, 0x07, 0x08, 0x17,
0x04, 0x50, 0x17, 0x04, 0x2C, 0x17, 0x04, 0x1C, 0x17, 0x04, 0x10, 0x17,
0x08, 0x6C, 0x17, 0x04, 0x10, 0x17, 0x04, 0x38, 0x17, 0x04, 0x40, 0x05,
0x17, 0x07, 0x1C, 0x17, 0x08, 0x58, 0x17, 0x04, 0x24, 0x17, 0x04, 0x18,
0x17, 0x08, 0x64, 0x00, 0x00, 0x01, 0x00, 0x12, 0x00, 0x00, 0x00, 0x14,
0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x17, 0x09, 0x0C, 0x17, 0x05, 0x82,
0x58, 0x17, 0x07, 0x61, 0xC1, 0x17, 0x07, 0x50, 0x17, 0x04, 0x04, 0x17,
0x08, 0x81, 0x48, 0x17, 0x04, 0x04, 0x17, 0x04, 0x28, 0x17, 0x04, 0x60,
0x17, 0x08, 0x54, 0x27, 0x17, 0x04, 0x04, 0x17, 0x07, 0x14, 0x17, 0x04,
0x04, 0x04, 0x17, 0x07, 0x81, 0x58, 0x17, 0x0C, 0x0C, 0x1C, 0x03, 0x00,
0x00, 0x0D, 0xA0, 0x60, 0x91, 0xBF, 0x3B, 0x17, 0x04, 0x5A, 0xF3, 0x0C,
0x04, 0x05, 0x1B, 0x06, 0x02, 0x03, 0x07, 0x1C, 0x23, 0x25, 0x25, 0x05,
0x08, 0x1D, 0x09, 0x0A, 0x24, 0x0B, 0x1E, 0x0D, 0x0C, 0x26, 0x26, 0x03,
0x02, 0x1B, 0x1C, 0x23, 0x03, 0x04, 0x07, 0x05, 0x06, 0x25, 0x25, 0x02,
0x0A, 0x0B, 0x1D, 0x0D, 0x08, 0x0C, 0x09, 0x1E, 0x24, 0x26, 0x26, 0x08,
0x24, 0x06, 0x07, 0x9A, 0x12, 0x17, 0x05, 0x83, 0x41, 0x00, 0xFF, 0x17,
0x10, 0x83, 0x6C, 0x04, 0x00, 0x01, 0x08, 0x00, 0x00, 0x02, 0x08, 0x00,
0x00, 0x0D, 0x08, 0x00, 0x00, 0x00, 0xC0, 0x71, 0x71, 0x03, 0x08, 0x00,
0x00, 0x0B, 0x08, 0x72, 0x72, 0x0E, 0x0C, 0x17, 0x04, 0x20, 0x08, 0x08,
0x0D, 0x0C, 0x00, 0x00, 0x0D, 0x0C, 0x14, 0x14, 0x16, 0x08, 0x17, 0x06,
0x2C, 0x11, 0x08, 0x17, 0x10, 0x84, 0x67, 0x15, 0x00, 0xCC, 0x00, 0x0A,
0x00, 0x33, 0x00, 0x00, 0x00, 0x20, 0xF3, 0x05, 0x08, 0x11, 0x00, 0xFF,
0x0F, 0xFF, 0x0F, 0x17, 0x08, 0x83, 0x4C, 0x01, 0x03, 0x00, 0x70, 0x00,
0x0C, 0x00, 0x01, 0x17, 0x04, 0x0C, 0x08, 0x44, 0x00, 0x10, 0x04, 0x04,
0x00, 0x06, 0x13, 0x07, 0x00, 0x80, 0x17, 0x04, 0x10, 0xA0, 0x00, 0x2C,
0x00, 0x01, 0x37, 0x00, 0x00, 0x00, 0x80, 0x17, 0x06, 0x48, 0x08, 0x00,
0x04, 0x00, 0x1F, 0x22, 0x20, 0x80, 0x0F, 0xF4, 0x20, 0x02, 0x28, 0x28,
0x28, 0x28, 0x17, 0x04, 0x04, 0x11, 0x11, 0x11, 0x11, 0x17, 0x04, 0x04,
0xBE, 0x00, 0x00, 0x17, 0x05, 0x58, 0x17, 0x08, 0x5C, 0x17, 0x22, 0x85,
0x6A, 0x17, 0x1A, 0x1A, 0x14, 0x00, 0x12, 0x00, 0x10, 0x17, 0x05, 0x83,
0x0A, 0x17, 0x16, 0x18, 0x30, 0x00, 0x2E, 0x00, 0x33, 0x00, 0x30, 0x00,
0x33, 0x00, 0x35, 0x00, 0x30, 0x00, 0x32, 0x17, 0x05, 0x83, 0x0C, 0x17,
0x04, 0x20, 0x17, 0x18, 0x18, 0x28, 0x00, 0x28, 0x17, 0x04, 0x04, 0x17,
0x08, 0x08, 0x17, 0x10, 0x10, 0x00, 0x14, 0x17, 0x05, 0x5A, 0x17, 0x04,
0x5C, 0x17, 0x04, 0x5E, 0x17, 0x04, 0x0E, 0x17, 0x0E, 0x78, 0x17, 0x09,
0x82, 0x50, 0x40, 0x06, 0x00, 0xCC, 0x00, 0x09, 0x00, 0x4F, 0x00, 0x51,
0x17, 0x08, 0x18, 0x80, 0x01, 0x00, 0x00, 0x40, 0x17, 0x04, 0x20, 0x03,
0x00, 0x00, 0x00, 0xAB, 0x00, 0x0A, 0x04, 0x11, 0x17, 0x08, 0x82, 0x58,
0x17, 0x0C, 0x38, 0x17, 0x1B, 0x81, 0x6C, 0x17, 0x08, 0x85, 0x60, 0x17,
0x08, 0x86, 0x50, 0x17, 0x08, 0x86, 0x60, 0x17, 0x06, 0x83, 0x21, 0x22,
0x04, 0xFF, 0xFF, 0xAF, 0x4F, 0x17, 0x0C, 0x86, 0x74, 0x17, 0x08, 0x2C,
0x8B, 0xFF, 0x07, 0x17, 0x06, 0x81, 0x04, 0x32, 0x54, 0x76, 0x10, 0x47,
0x32, 0x65, 0x10, 0x34, 0x76, 0x25, 0x01, 0x34, 0x67, 0x25, 0x01, 0x75,
0x64, 0x32, 0x01, 0x72, 0x56, 0x34, 0x10, 0x23, 0x74, 0x56, 0x01, 0x45,
0x32, 0x67, 0x17, 0x04, 0x24, 0x49, 0x92, 0x24, 0x17, 0x04, 0x04, 0x17,
0x11, 0x7C, 0x1B, 0x17, 0x04, 0x04, 0x17, 0x13, 0x81, 0x14, 0x2F, 0x41,
0x13, 0x1F, 0x14, 0x00, 0x01, 0x00, 0x17, 0x04, 0x7C, 0xFF, 0xFF, 0xFF,
0x7F, 0x0B, 0xD7, 0x06, 0x40, 0x00, 0x00, 0x02, 0x00, 0x08, 0x08, 0x03,
0x00, 0x00, 0x5C, 0x01, 0x00, 0x10, 0x10, 0x10, 0x17, 0x06, 0x86, 0x59,
0x17, 0x0F, 0x89, 0x14, 0x37, 0x17, 0x07, 0x82, 0x72, 0x10, 0x17, 0x06,
0x83, 0x0D, 0x00, 0x11, 0x01, 0x17, 0x05, 0x85, 0x39, 0x17, 0x04, 0x0E,
0x0A, 0x17, 0x07, 0x89, 0x29, 0x17, 0x04, 0x1B, 0x17, 0x08, 0x86, 0x77,
0x17, 0x09, 0x12, 0x20, 0x00, 0x00, 0x00, 0x81, 0x10, 0x09, 0x28, 0x93,
0x32, 0xA5, 0x44, 0x5B, 0x8A, 0x67, 0x76, 0x17, 0x18, 0x82, 0x2C, 0xFF,
0xEF, 0xFF, 0xEF, 0xC0, 0xC0, 0xC0, 0xC0, 0x17, 0x04, 0x04, 0xDC, 0xDC,
0xDC, 0xDC, 0x0A, 0x0A, 0x0A, 0x0A, 0x17, 0x04, 0x04, 0x17, 0x04, 0x04,
0x17, 0x05, 0x82, 0x24, 0x03, 0x07, 0x17, 0x04, 0x04, 0x00, 0x00, 0x24,
0xFF, 0xFF, 0x00, 0x44, 0x57, 0x6E, 0x00, 0x28, 0x72, 0x39, 0x00, 0x10,
0x9C, 0x4B, 0x17, 0x04, 0x64, 0x01, 0x00, 0x00, 0x08, 0x4C, 0x00, 0x00,
0x80, 0x20, 0x10, 0x0A, 0x00, 0x28, 0x10, 0x17, 0x06, 0x85, 0x60, 0x17,
0x10, 0x82, 0x74, 0x17, 0x08, 0x08, 0x17, 0x08, 0x88, 0x00, 0x17, 0x04,
0x10, 0x04, 0x17, 0x0B, 0x87, 0x6C, 0x01, 0x00, 0x02, 0x02, 0x01, 0x02,
0x03, 0x00, 0x04, 0x05, 0xC3, 0x71, 0x0F, 0x0F, 0x17, 0x08, 0x8B, 0x18,
0x1F, 0x17, 0x09, 0x81, 0x73, 0x00, 0xFF, 0x00, 0xFF, 0x17, 0x05, 0x86,
0x48, 0x17, 0x04, 0x0C, 0x17, 0x07, 0x86, 0x34, 0x00, 0x00, 0xF0, 0x17,
0x09, 0x87, 0x54, 0x43, 0xC3, 0xBA, 0xE4, 0xD3, 0x1E, 0x17, 0x0C, 0x81,
0x52, 0x17, 0x0A, 0x1C, 0x17, 0x10, 0x81, 0x6C, 0x17, 0x0A, 0x82, 0x21,
0x17, 0x07, 0x82, 0x4D, 0x17, 0x0A, 0x8A, 0x1B, 0x17, 0x11, 0x2C, 0x76,
0x0C, 0x17, 0x0A, 0x8A, 0x67, 0x17, 0x0F, 0x84, 0x28, 0x17, 0x06, 0x34,
0x17, 0x17, 0x3A, 0x7E, 0x16, 0x40, 0x17, 0x0C, 0x8B, 0x1F, 0x17, 0x2A,
0x38, 0x1E, 0x17, 0x0A, 0x38, 0x17, 0x13, 0x81, 0x28, 0x00, 0xC0, 0x17,
0x17, 0x55, 0x46, 0x24, 0x17, 0x0A, 0x81, 0x28, 0x17, 0x14, 0x38, 0x17,
0x18, 0x81, 0x60, 0x46, 0x2C, 0x17, 0x06, 0x38, 0xEC, 0x17, 0x0D, 0x16,
0x17, 0x0E, 0x82, 0x3C, 0x17, 0x82, 0x0C, 0x8E, 0x68, 0x17, 0x04, 0x24,
0x17, 0x5C, 0x8E, 0x68, 0x17, 0x07, 0x82, 0x5F, 0x80, 0x17, 0x87, 0x01,
0x8E, 0x68, 0x02, 0x17, 0x81, 0x4A, 0x8E, 0x68, 0x17, 0x0C, 0x87, 0x78,
0x17, 0x85, 0x28, 0x8E, 0x68, 0x17, 0x8E, 0x68, 0x9D, 0x50, 0x17, 0x81,
0x24, 0x8E, 0x68, 0x17, 0x04, 0x2C, 0x17, 0x28, 0x8E, 0x68, 0x17, 0x04,
0x30, 0x17, 0x85, 0x3C, 0x8E, 0x68, 0x12, 0x17, 0x07, 0x85, 0x70, 0x17,
0x88, 0x74, 0x8E, 0x68, 0x17, 0x87, 0x3E, 0x9D, 0x50, 0x0C, 0x17, 0x04,
0x04, 0x17, 0x12, 0x8E, 0x68, 0x18, 0x17, 0x87, 0x12, 0xBB, 0x20, 0x17,
0x83, 0x04, 0x9D, 0x50, 0x15, 0x17, 0x05, 0x8D, 0x76, 0x17, 0x0F, 0x8B,
0x49, 0x17, 0x0B, 0x18, 0x32, 0x00, 0x2F, 0x00, 0x32, 0x00, 0x31, 0x00,
0x34, 0x00, 0x36, 0x00, 0x2F, 0x00, 0x33, 0x17, 0x09, 0x84, 0x0C, 0x17,
0x18, 0x18, 0x17, 0x20, 0x8E, 0x68, 0x15, 0x17, 0x07, 0x5A, 0x17, 0x06,
0x5E, 0x16, 0x00, 0x15, 0x17, 0x82, 0x40, 0x9D, 0x50, 0x17, 0x86, 0x5F,
0xBB, 0x20, 0x3A, 0x00, 0x00, 0x00, 0x1D, 0x17, 0x81, 0x4F, 0xAC, 0x38,
0x3B, 0x17, 0x04, 0x04, 0x17, 0x86, 0x30, 0x8E, 0x68, 0x17, 0x81, 0x53,
0xAC, 0x38, 0x07, 0x17, 0x0D, 0x8E, 0x68, 0xA3, 0x72, 0x17, 0x83, 0x10,
0x8E, 0x68
};

12
bdk/mem/sdram_lp0.c
View File

@@ -1125,7 +1125,7 @@ static void _sdram_lp0_save_params_t210(const void *params)
c32(0, scratch4);
s(PllMStableTime, 9:0, scratch4, 9:0);
}
/*
#pragma GCC diagnostic ignored "-Wparentheses"
static void _sdram_lp0_save_params_t210b01(const void *params)
@@ -1526,13 +1526,13 @@ static void _sdram_lp0_save_params_t210b01(const void *params)
}
#pragma GCC diagnostic pop
*/
void sdram_lp0_save_params(const void *params)
{
// u32 chip_id = (APB_MISC(APB_MISC_GP_HIDREV) >> 4) & 0xF;
u32 chip_id = (APB_MISC(APB_MISC_GP_HIDREV) >> 4) & 0xF;
// if (chip_id != GP_HIDREV_MAJOR_T210B01)
if (chip_id != GP_HIDREV_MAJOR_T210B01)
_sdram_lp0_save_params_t210(params);
// else
// _sdram_lp0_save_params_t210b01(params);
else
_sdram_lp0_save_params_t210b01(params);
}

1
bdk/mem/smmu.h
View File

@@ -30,6 +30,7 @@
#define MC_SMMU_TLB_FLUSH 0x30
#define MC_SMMU_PTC_FLUSH 0x34
#define MC_SMMU_ASID_SECURITY 0x38
#define MC_SMMU_AVPC_ASID 0x23C
#define MC_SMMU_TSEC_ASID 0x294
#define MC_SMMU_TRANSLATION_ENABLE_0 0x228
#define MC_SMMU_TRANSLATION_ENABLE_1 0x22c

29
bdk/memory_map.h
View File

@@ -17,6 +17,7 @@
#ifndef _MEMORY_MAP_H_
#define _MEMORY_MAP_H_
//#define IPL_STACK_TOP 0x4003FF00
/* --- BIT/BCT: 0x40000000 - 0x40003000 --- */
/* --- IPL: 0x40008000 - 0x40028000 --- */
#define LDR_LOAD_ADDR 0x40007000
@@ -24,20 +25,13 @@
#define IPL_LOAD_ADDR 0x40008000
#define IPL_SZ_MAX SZ_128K
#define XUSB_RING_ADDR 0x40020000 // XUSB EP context and TRB ring buffers.
/* --- XUSB EP context and TRB ring buffers --- */
#define XUSB_RING_ADDR 0x40020000
#define SECMON_MIN_START 0x4002B000 // Minimum reserved address for secmon.
#define SECMON_MIN_START 0x4002B000
#define SDRAM_PARAMS_ADDR 0x40030000 // SDRAM extraction buffer during sdram init.
/* start.S / exception_handlers.S */
#define SYS_STACK_TOP_INIT 0x4003FF00
#define FIQ_STACK_TOP 0x40040000
#define IRQ_STACK_TOP 0x40040000
#define IPL_RELOC_ADDR 0x4003FF00
#define IPL_RELOC_SZ 0x10
#define EXCP_STORAGE_ADDR 0x4003FFF0
#define EXCP_STORAGE_SZ 0x10
#define CBFS_DRAM_EN_ADDR 0x4003e000 // u32.
/* --- DRAM START --- */
#define DRAM_START 0x80000000
@@ -58,6 +52,12 @@
#define RAM_DISK_SZ 0x41000000 // 1040MB.
#define RAM_DISK2_SZ 0x21000000 // 528MB.
// NX BIS driver sector cache.
#define NX_BIS_CACHE_ADDR 0xC5000000
#define NX_BIS_CACHE_SZ 0x10020000 // 256MB.
#define NX_BIS_LOOKUP_ADDR 0xD6000000
#define NX_BIS_LOOKUP_SZ 0xF000000 // 240MB.
// L4T Kernel Panic Storage (PSTORE).
#define PSTORE_ADDR 0xB0000000
#define PSTORE_SZ SZ_2M
@@ -95,7 +95,6 @@
#define NYX_FB2_ADDRESS 0xF6600000
#define NYX_FB_SZ 0x384000 // 1280 x 720 x 4.
/* OBSOLETE: Very old hwinit based payloads were setting a carveout here. */
#define DRAM_MEM_HOLE_ADR 0xF6A00000
#define DRAM_MEM_HOLE_SZ 0x8140000
/* --- Hole: 129MB 0xF6A00000 - 0xFEB3FFFF --- */
@@ -113,10 +112,4 @@
// #define RCM_PAYLOAD_ADDR (EXT_PAYLOAD_ADDR + ALIGN(PATCHED_RELOC_SZ, 0x10))
// #define COREBOOT_ADDR (0xD0000000 - rom_size)
// NX BIS driver sector cache.
#define NX_BIS_CACHE_ADDR 0xC5000000
#define NX_BIS_CACHE_SZ 0x10020000 // 256MB.
#define NX_BIS_LOOKUP_ADDR DRAM_MEM_HOLE_ADR
#define NX_BIS_LOOKUP_SZ DRAM_MEM_HOLE_SZ
#endif

8
bdk/power/max77620.h
View File

@@ -95,9 +95,9 @@
#define MAX77620_IRQSD_PFI_SD1 BIT(6)
#define MAX77620_IRQSD_PFI_SD0 BIT(7)
#define MAX77620_REG_IRQ_LVL2_L0_7 0x08 // LDO number that irq occured.
#define MAX77620_REG_IRQ_LVL2_L0_7 0x08 // LDO number that irq occurred.
#define MAX77620_REG_IRQ_MSK_L0_7 0x10
#define MAX77620_REG_IRQ_LVL2_L8 0x09 // LDO number that irq occured. Only bit0: LDO8 is valid.
#define MAX77620_REG_IRQ_LVL2_L8 0x09 // LDO number that irq occurred. Only bit0: LDO8 is valid.
#define MAX77620_REG_IRQ_MSK_L8 0x11
#define MAX77620_REG_IRQ_LVL2_GPIO 0x0A // Edge detection interrupt.
@@ -139,8 +139,8 @@
#define MAX77620_REG_DVSSD0 0x1B
#define MAX77620_REG_DVSSD1 0x1C
#define MAX77620_SDX_VOLT_MASK 0xFF
#define MAX77620_SD0_VOLT_MASK 0x3F
#define MAX77620_SD1_VOLT_MASK 0x7F
#define MAX77620_SD0_VOLT_MASK 0x7F // Max is 0x40.
#define MAX77620_SD1_VOLT_MASK 0x7F // Max is 0x4C.
#define MAX77620_LDO_VOLT_MASK 0x3F
#define MAX77620_REG_SD0_CFG 0x1D

8
bdk/power/max7762x.h
View File

@@ -20,6 +20,14 @@
#include <utils/types.h>
/*
* SDx actual min is 625 mV. Multipliers 0/1 reserved.
* SD0 max is 1400 mV
* SD1 max is 1550 mV
* SD2 max is 3787.5 mV
* SD3 max is 3787.5 mV
*/
/*
* Switch Power domains (max77620):
* Name | Usage | uV step | uV min | uV default | uV max | Init

8
bdk/power/max77812.h
View File

@@ -17,8 +17,8 @@
#ifndef _MAX77812_H_
#define _MAX77812_H_
#define MAX77812_PHASE31_CPU_I2C_ADDR 0x31 // 2 Outputs: 3-phase M1 + 1-phase M4.
#define MAX77812_PHASE211_CPU_I2C_ADDR 0x33 // 3 Outputs: 2-phase M1 + 1-phase M3 + 1-phase M4.
#define MAX77812_PHASE31_CPU_I2C_ADDR 0x31 // High power GPU. 2 Outputs: 3-phase M1 + 1-phase M4.
#define MAX77812_PHASE211_CPU_I2C_ADDR 0x33 // Low power GPU. 3 Outputs: 2-phase M1 + 1-phase M3 + 1-phase M4.
#define MAX77812_REG_RSET 0x00
#define MAX77812_REG_INT_SRC 0x01
@@ -74,14 +74,14 @@
#define MAX77812_REG_GLB_CFG2 0x34
#define MAX77812_REG_GLB_CFG3 0x35
/*! Protected area and settings only for MAX77812_REG_VERSION 4 */
/*! Protected area and settings only for MAX77812_ES2_VERSION */
#define MAX77812_REG_GLB_CFG4 0x36
#define MAX77812_REG_GLB_CFG5 0x37
#define MAX77812_REG_GLB_CFG6 0x38
#define MAX77812_REG_GLB_CFG7 0x39
#define MAX77812_REG_GLB_CFG8 0x3A
#define MAX77812_REG_PROT_ACCESS 0xFD
#define MAX77812_REG_MAX 0xFE
#define MAX77812_REG_MAX 0xFD
#define MAX77812_REG_EN_CTRL_MASK(n) BIT(n)
#define MAX77812_START_SLEW_RATE_MASK 0x07

468
bdk/sec/se.c
View File

@@ -1,8 +1,6 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018-2021 CTCaer
* Copyright (c) 2018 Atmosphère-NX
* Copyright (c) 2019-2021 shchmue
* Copyright (c) 2018-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -20,10 +18,10 @@
#include <string.h>
#include "se.h"
#include "se_t210.h"
#include <memory_map.h>
#include <mem/heap.h>
#include <soc/bpmp.h>
#include <soc/hw_init.h>
#include <soc/pmc.h>
#include <soc/t210.h>
#include <utils/util.h>
@@ -35,8 +33,7 @@ typedef struct _se_ll_t
vu32 size;
} se_ll_t;
static u32 _se_rsa_mod_sizes[SE_RSA_KEYSLOT_COUNT];
static u32 _se_rsa_exp_sizes[SE_RSA_KEYSLOT_COUNT];
se_ll_t *ll_dst, *ll_src;
static void _gf256_mul_x(void *block)
{
@@ -79,22 +76,52 @@ static void _se_ll_init(se_ll_t *ll, u32 addr, u32 size)
static void _se_ll_set(se_ll_t *dst, se_ll_t *src)
{
SE(SE_IN_LL_ADDR_REG) = (u32)src;
SE(SE_IN_LL_ADDR_REG) = (u32)src;
SE(SE_OUT_LL_ADDR_REG) = (u32)dst;
}
static int _se_wait()
{
bool tegra_t210 = hw_get_chip_id() == GP_HIDREV_MAJOR_T210;
// Wait for operation to be done.
while (!(SE(SE_INT_STATUS_REG) & SE_INT_OP_DONE))
;
if (SE(SE_INT_STATUS_REG) & SE_INT_ERR_STAT ||
(SE(SE_STATUS_REG) & SE_STATUS_STATE_MASK) != SE_STATUS_STATE_IDLE ||
SE(SE_ERR_STATUS_REG) != 0)
// Check for errors.
if ((SE(SE_INT_STATUS_REG) & SE_INT_ERR_STAT) ||
(SE(SE_STATUS_REG) & SE_STATUS_STATE_MASK) != SE_STATUS_STATE_IDLE ||
SE(SE_ERR_STATUS_REG) != 0)
return 0;
// T210B01: IRAM/TZRAM/DRAM AHB coherency WAR.
if (!tegra_t210 && ll_dst)
{
u32 timeout = get_tmr_us() + 1000000;
// Ensure data is out from SE.
while (SE(SE_STATUS_REG) & SE_STATUS_MEM_IF_BUSY)
{
if (get_tmr_us() > timeout)
return 0;
usleep(1);
}
// Ensure data is out from AHB.
if(ll_dst->addr >= DRAM_START)
{
timeout = get_tmr_us() + 200000;
while (AHB_GIZMO(AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID) & MEM_WRQUE_SE_MST_ID)
{
if (get_tmr_us() > timeout)
return 0;
usleep(1);
}
}
}
return 1;
}
se_ll_t *ll_dst, *ll_src;
static int _se_execute(u32 op, void *dst, u32 dst_size, const void *src, u32 src_size, bool is_oneshot)
{
ll_dst = NULL;
@@ -128,9 +155,15 @@ static int _se_execute(u32 op, void *dst, u32 dst_size, const void *src, u32 src
bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLN_INV_WAY, false);
if (src)
{
free(ll_src);
ll_src = NULL;
}
if (dst)
{
free(ll_dst);
ll_dst = NULL;
}
return res;
}
@@ -181,7 +214,7 @@ static int _se_execute_one_block(u32 op, void *dst, u32 dst_size, const void *sr
return res;
}
static void _se_aes_ctr_set(const void *ctr)
static void _se_aes_ctr_set(void *ctr)
{
u32 data[SE_AES_IV_SIZE / 4];
memcpy(data, ctr, SE_AES_IV_SIZE);
@@ -200,66 +233,6 @@ void se_rsa_acc_ctrl(u32 rs, u32 flags)
SE(SE_RSA_SECURITY_PERKEY_REG) &= ~BIT(rs);
}
// se_rsa_key_set() was derived from Atmosphère's set_rsa_keyslot
void se_rsa_key_set(u32 ks, const void *mod, u32 mod_size, const void *exp, u32 exp_size)
{
u32 *data = (u32 *)mod;
for (u32 i = 0; i < mod_size / 4; i++)
{
SE(SE_RSA_KEYTABLE_ADDR_REG) = RSA_KEY_NUM(ks) | SE_RSA_KEYTABLE_TYPE(RSA_KEY_TYPE_MOD) | i;
SE(SE_RSA_KEYTABLE_DATA_REG) = byte_swap_32(data[mod_size / 4 - i - 1]);
}
data = (u32 *)exp;
for (u32 i = 0; i < exp_size / 4; i++)
{
SE(SE_RSA_KEYTABLE_ADDR_REG) = RSA_KEY_NUM(ks) | SE_RSA_KEYTABLE_TYPE(RSA_KEY_TYPE_EXP) | i;
SE(SE_RSA_KEYTABLE_DATA_REG) = byte_swap_32(data[exp_size / 4 - i - 1]);
}
_se_rsa_mod_sizes[ks] = mod_size;
_se_rsa_exp_sizes[ks] = exp_size;
}
// se_rsa_key_clear() was derived from Atmosphère's clear_rsa_keyslot
void se_rsa_key_clear(u32 ks)
{
for (u32 i = 0; i < SE_RSA2048_DIGEST_SIZE / 4; i++)
{
SE(SE_RSA_KEYTABLE_ADDR_REG) = RSA_KEY_NUM(ks) | SE_RSA_KEYTABLE_TYPE(RSA_KEY_TYPE_MOD) | i;
SE(SE_RSA_KEYTABLE_DATA_REG) = 0;
}
for (u32 i = 0; i < SE_RSA2048_DIGEST_SIZE / 4; i++)
{
SE(SE_RSA_KEYTABLE_ADDR_REG) = RSA_KEY_NUM(ks) | SE_RSA_KEYTABLE_TYPE(RSA_KEY_TYPE_EXP) | i;
SE(SE_RSA_KEYTABLE_DATA_REG) = 0;
}
}
// se_rsa_exp_mod() was derived from Atmosphère's se_synchronous_exp_mod and se_get_exp_mod_output
int se_rsa_exp_mod(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_size)
{
int res;
u8 stack_buf[SE_RSA2048_DIGEST_SIZE];
for (u32 i = 0; i < src_size; i++)
stack_buf[i] = *((u8 *)src + src_size - i - 1);
SE(SE_CONFIG_REG) = SE_CONFIG_ENC_ALG(ALG_RSA) | SE_CONFIG_DST(DST_RSAREG);
SE(SE_RSA_CONFIG) = RSA_KEY_SLOT(ks);
SE(SE_RSA_KEY_SIZE_REG) = (_se_rsa_mod_sizes[ks] >> 6) - 1;
SE(SE_RSA_EXP_SIZE_REG) = _se_rsa_exp_sizes[ks] >> 2;
res = _se_execute_oneshot(SE_OP_START, NULL, 0, stack_buf, src_size);
// Copy output hash.
u32 *dst32 = (u32 *)dst;
for (u32 i = 0; i < dst_size / 4; i++)
dst32[dst_size / 4 - i - 1] = byte_swap_32(SE(SE_RSA_OUTPUT_REG + (i * 4)));
return res;
}
void se_key_acc_ctrl(u32 ks, u32 flags)
{
if (flags & SE_KEY_TBL_DIS_KEY_ACCESS_FLAG)
@@ -273,7 +246,7 @@ u32 se_key_acc_ctrl_get(u32 ks)
return SE(SE_CRYPTO_KEYTABLE_ACCESS_REG + 4 * ks);
}
void se_aes_key_set(u32 ks, const void *key, u32 size)
void se_aes_key_set(u32 ks, void *key, u32 size)
{
u32 data[SE_AES_MAX_KEY_SIZE / 4];
memcpy(data, key, size);
@@ -285,13 +258,7 @@ void se_aes_key_set(u32 ks, const void *key, u32 size)
}
}
void se_aes_key_partial_set(u32 ks, u32 index, u32 data)
{
SE(SE_CRYPTO_KEYTABLE_ADDR_REG) = SE_KEYTABLE_SLOT(ks) | index;
SE(SE_CRYPTO_KEYTABLE_DATA_REG) = data;
}
void se_aes_iv_set(u32 ks, const void *iv)
void se_aes_iv_set(u32 ks, void *iv)
{
u32 data[SE_AES_IV_SIZE / 4];
memcpy(data, iv, SE_AES_IV_SIZE);
@@ -334,6 +301,7 @@ void se_aes_iv_clear(u32 ks)
}
}
int se_aes_unwrap_key(u32 ks_dst, u32 ks_src, const void *input)
{
SE(SE_CONFIG_REG) = SE_CONFIG_DEC_ALG(ALG_AES_DEC) | SE_CONFIG_DST(DST_KEYTABLE);
@@ -383,7 +351,7 @@ int se_aes_crypt_block_ecb(u32 ks, u32 enc, void *dst, const void *src)
return se_aes_crypt_ecb(ks, enc, dst, SE_AES_BLOCK_SIZE, src, SE_AES_BLOCK_SIZE);
}
int se_aes_crypt_ctr(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_size, const void *ctr)
int se_aes_crypt_ctr(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_size, void *ctr)
{
SE(SE_SPARE_REG) = SE_ECO(SE_ERRATA_FIX_ENABLE);
SE(SE_CONFIG_REG) = SE_CONFIG_ENC_ALG(ALG_AES_ENC) | SE_CONFIG_DST(DST_MEMORY);
@@ -391,7 +359,7 @@ int se_aes_crypt_ctr(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_s
SE_CRYPTO_XOR_POS(XOR_BOTTOM) | SE_CRYPTO_INPUT_SEL(INPUT_LNR_CTR) | SE_CRYPTO_CTR_CNTN(1);
_se_aes_ctr_set(ctr);
u32 src_size_aligned = ALIGN_DOWN(src_size, 0x10);
u32 src_size_aligned = src_size & 0xFFFFFFF0;
u32 src_size_delta = src_size & 0xF;
if (src_size_aligned)
@@ -409,89 +377,69 @@ int se_aes_crypt_ctr(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_s
return 1;
}
// random calls were derived from Atmosphère's
int se_initialize_rng()
int se_aes_xts_crypt_sec(u32 tweak_ks, u32 crypt_ks, u32 enc, u64 sec, void *dst, void *src, u32 secsize)
{
static bool initialized = false;
int res = 0;
u8 *tweak = (u8 *)malloc(SE_AES_BLOCK_SIZE);
u8 *pdst = (u8 *)dst;
u8 *psrc = (u8 *)src;
if (initialized)
return 1;
u8 *output_buf = (u8 *)malloc(0x10);
SE(SE_CONFIG_REG) = SE_CONFIG_ENC_ALG(ALG_RNG) | SE_CONFIG_DST(DST_MEMORY);
SE(SE_CRYPTO_CONFIG_REG) = SE_CRYPTO_CORE_SEL(CORE_ENCRYPT) | SE_CRYPTO_INPUT_SEL(INPUT_RANDOM);
SE(SE_RNG_CONFIG_REG) = SE_RNG_CONFIG_MODE(MODE_FORCE_INSTANTION) | SE_RNG_CONFIG_SRC(SRC_ENTROPY);
SE(SE_RNG_RESEED_INTERVAL_REG) = 70001;
SE(SE_RNG_SRC_CONFIG_REG) = SE_RNG_SRC_CONFIG_ENTR_SRC(RO_ENTR_ENABLE) |
SE_RNG_SRC_CONFIG_ENTR_SRC_LOCK(RO_ENTR_LOCK_ENABLE);
SE(SE_CRYPTO_BLOCK_COUNT_REG) = 0;
int res =_se_execute_oneshot(SE_OP_START, output_buf, 0x10, NULL, 0);
free(output_buf);
if (res)
initialized = true;
return res;
}
int se_generate_random(void *dst, u32 size)
{
SE(SE_CONFIG_REG) = SE_CONFIG_ENC_ALG(ALG_RNG) | SE_CONFIG_DST(DST_MEMORY);
SE(SE_CRYPTO_CONFIG_REG) = SE_CRYPTO_CORE_SEL(CORE_ENCRYPT) | SE_CRYPTO_INPUT_SEL(INPUT_RANDOM);
SE(SE_RNG_CONFIG_REG) = SE_RNG_CONFIG_MODE(MODE_NORMAL) | SE_RNG_CONFIG_SRC(SRC_ENTROPY);
u32 num_blocks = size >> 4;
u32 aligned_size = num_blocks << 4;
if (num_blocks)
{
SE(SE_CRYPTO_BLOCK_COUNT_REG) = num_blocks - 1;
if (!_se_execute_oneshot(SE_OP_START, dst, aligned_size, NULL, 0))
return 0;
}
if (size > aligned_size)
return _se_execute_one_block(SE_OP_START, dst + aligned_size, size - aligned_size, NULL, 0);
return 1;
}
int se_generate_random_key(u32 ks_dst, u32 ks_src)
{
SE(SE_CONFIG_REG) = SE_CONFIG_ENC_ALG(ALG_RNG) | SE_CONFIG_DST(DST_MEMORY);
SE(SE_CRYPTO_CONFIG_REG) = SE_CRYPTO_KEY_INDEX(ks_src) | SE_CRYPTO_CORE_SEL(CORE_ENCRYPT) |
SE_CRYPTO_INPUT_SEL(INPUT_RANDOM);
SE(SE_RNG_CONFIG_REG) = SE_RNG_CONFIG_MODE(MODE_NORMAL) | SE_RNG_CONFIG_SRC(SRC_ENTROPY);
SE(SE_CRYPTO_KEYTABLE_DST_REG) = SE_KEYTABLE_DST_KEY_INDEX(ks_dst);
if (!_se_execute_oneshot(SE_OP_START, NULL, 0, NULL, 0))
return 0;
SE(SE_CRYPTO_KEYTABLE_DST_REG) = SE_KEYTABLE_DST_KEY_INDEX(ks_dst) | 1;
if (!_se_execute_oneshot(SE_OP_START, NULL, 0, NULL, 0))
return 0;
return 1;
}
int se_aes_xts_crypt_sec(u32 tweak_ks, u32 crypt_ks, u32 enc, u64 sec, void *dst, const void *src, u32 sec_size)
{
u8 tweak[0x10];
u8 orig_tweak[0x10];
u32 *pdst = (u32 *)dst;
u32 *psrc = (u32 *)src;
u32 *ptweak = (u32 *)tweak;
//Generate tweak.
// Generate tweak.
for (int i = 0xF; i >= 0; i--)
{
tweak[i] = sec & 0xFF;
sec >>= 8;
}
if (!se_aes_crypt_block_ecb(tweak_ks, ENCRYPT, tweak, tweak))
return 0;
memcpy(orig_tweak, tweak, 0x10);
goto out;
// We are assuming a 0x10-aligned sector size in this implementation.
for (u32 i = 0; i < sec_size / 0x10; i++)
for (u32 i = 0; i < secsize / SE_AES_BLOCK_SIZE; i++)
{
for (u32 j = 0; j < SE_AES_BLOCK_SIZE; j++)
pdst[j] = psrc[j] ^ tweak[j];
if (!se_aes_crypt_block_ecb(crypt_ks, enc, pdst, pdst))
goto out;
for (u32 j = 0; j < SE_AES_BLOCK_SIZE; j++)
pdst[j] = pdst[j] ^ tweak[j];
_gf256_mul_x(tweak);
psrc += SE_AES_BLOCK_SIZE;
pdst += SE_AES_BLOCK_SIZE;
}
res = 1;
out:;
free(tweak);
return res;
}
int se_aes_xts_crypt_sec_nx(u32 tweak_ks, u32 crypt_ks, u32 enc, u64 sec, u8 *tweak, bool regen_tweak, u32 tweak_exp, void *dst, void *src, u32 sec_size)
{
u32 *pdst = (u32 *)dst;
u32 *psrc = (u32 *)src;
u32 *ptweak = (u32 *)tweak;
if (regen_tweak)
{
for (int i = 0xF; i >= 0; i--)
{
tweak[i] = sec & 0xFF;
sec >>= 8;
}
if (!se_aes_crypt_block_ecb(tweak_ks, ENCRYPT, tweak, tweak))
return 0;
}
// tweak_exp allows using a saved tweak to reduce _gf256_mul_x_le calls.
for (u32 i = 0; i < (tweak_exp << 5); i++)
_gf256_mul_x_le(tweak);
u8 orig_tweak[SE_KEY_128_SIZE] __attribute__((aligned(4)));
memcpy(orig_tweak, tweak, SE_KEY_128_SIZE);
// We are assuming a 16 sector aligned size in this implementation.
for (u32 i = 0; i < (sec_size >> 4); i++)
{
for (u32 j = 0; j < 4; j++)
pdst[j] = psrc[j] ^ ptweak[j];
@@ -506,7 +454,7 @@ int se_aes_xts_crypt_sec(u32 tweak_ks, u32 crypt_ks, u32 enc, u64 sec, void *dst
pdst = (u32 *)dst;
ptweak = (u32 *)orig_tweak;
for (u32 i = 0; i < sec_size / 0x10; i++)
for (u32 i = 0; i < (sec_size >> 4); i++)
{
for (u32 j = 0; j < 4; j++)
pdst[j] = pdst[j] ^ ptweak[j];
@@ -518,73 +466,18 @@ int se_aes_xts_crypt_sec(u32 tweak_ks, u32 crypt_ks, u32 enc, u64 sec, void *dst
return 1;
}
int se_aes_xts_crypt(u32 tweak_ks, u32 crypt_ks, u32 enc, u64 sec, void *dst, const void *src, u32 sec_size, u32 num_secs)
int se_aes_xts_crypt(u32 tweak_ks, u32 crypt_ks, u32 enc, u64 sec, void *dst, void *src, u32 secsize, u32 num_secs)
{
u8 *pdst = (u8 *)dst;
u8 *psrc = (u8 *)src;
for (u32 i = 0; i < num_secs; i++)
if (!se_aes_xts_crypt_sec(tweak_ks, crypt_ks, enc, sec + i, pdst + sec_size * i, psrc + sec_size * i, sec_size))
if (!se_aes_xts_crypt_sec(tweak_ks, crypt_ks, enc, sec + i, pdst + secsize * i, psrc + secsize * i, secsize))
return 0;
return 1;
}
// se_aes_cmac() was derived from Atmosphère's se_compute_aes_cmac
int se_aes_cmac(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_size)
{
int res = 0;
u8 *key = (u8 *)calloc(0x10, 1);
u8 *last_block = (u8 *)calloc(0x10, 1);
// generate derived key
if (!se_aes_crypt_block_ecb(ks, ENCRYPT, key, key))
goto out;
_gf256_mul_x(key);
if (src_size & 0xF)
_gf256_mul_x(key);
SE(SE_CONFIG_REG) = SE_CONFIG_ENC_ALG(ALG_AES_ENC) | SE_CONFIG_DST(DST_HASHREG);
SE(SE_CRYPTO_CONFIG_REG) = SE_CRYPTO_KEY_INDEX(ks) | SE_CRYPTO_INPUT_SEL(INPUT_MEMORY) |
SE_CRYPTO_XOR_POS(XOR_TOP) | SE_CRYPTO_VCTRAM_SEL(VCTRAM_AESOUT) | SE_CRYPTO_HASH(HASH_ENABLE) |
SE_CRYPTO_CORE_SEL(CORE_ENCRYPT);
se_aes_iv_clear(ks);
u32 num_blocks = (src_size + 0xf) >> 4;
if (num_blocks > 1)
{
SE(SE_CRYPTO_BLOCK_COUNT_REG) = num_blocks - 2;
if (!_se_execute_oneshot(SE_OP_START, NULL, 0, src, src_size))
goto out;
SE(SE_CRYPTO_CONFIG_REG) |= SE_CRYPTO_IV_SEL(IV_UPDATED);
}
if (src_size & 0xf)
{
memcpy(last_block, src + (src_size & ~0xf), src_size & 0xf);
last_block[src_size & 0xf] = 0x80;
}
else if (src_size >= 0x10)
{
memcpy(last_block, src + src_size - 0x10, 0x10);
}
for (u32 i = 0; i < 0x10; i++)
last_block[i] ^= key[i];
SE(SE_CRYPTO_BLOCK_COUNT_REG) = 0;
res = _se_execute_oneshot(SE_OP_START, NULL, 0, last_block, 0x10);
u32 *dst32 = (u32 *)dst;
for (u32 i = 0; i < (dst_size >> 2); i++)
dst32[i] = SE(SE_HASH_RESULT_REG + (i << 2));
out:;
free(key);
free(last_block);
return res;
}
int se_calc_sha256(void *hash, u32 *msg_left, const void *src, u32 src_size, u64 total_size, u32 sha_cfg, bool is_oneshot)
{
int res;
@@ -674,48 +567,20 @@ int se_calc_sha256_finalize(void *hash, u32 *msg_left)
return res;
}
int se_calc_hmac_sha256(void *dst, const void *src, u32 src_size, const void *key, u32 key_size)
int se_gen_prng128(void *dst)
{
int res = 0;
u8 *secret = (u8 *)malloc(0x40);
u8 *ipad = (u8 *)malloc(0x40 + src_size);
u8 *opad = (u8 *)malloc(0x60);
// Setup config for X931 PRNG.
SE(SE_CONFIG_REG) = SE_CONFIG_ENC_MODE(MODE_KEY128) | SE_CONFIG_ENC_ALG(ALG_RNG) | SE_CONFIG_DST(DST_MEMORY);
SE(SE_CRYPTO_CONFIG_REG) = SE_CRYPTO_HASH(HASH_DISABLE) | SE_CRYPTO_XOR_POS(XOR_BYPASS) | SE_CRYPTO_INPUT_SEL(INPUT_RANDOM);
SE(SE_RNG_CONFIG_REG) = SE_RNG_CONFIG_SRC(SRC_ENTROPY) | SE_RNG_CONFIG_MODE(MODE_NORMAL);
//SE(SE_RNG_SRC_CONFIG_REG) =
// SE_RNG_SRC_CONFIG_ENTR_SRC(RO_ENTR_ENABLE) | SE_RNG_SRC_CONFIG_ENTR_SRC_LOCK(RO_ENTR_LOCK_ENABLE);
SE(SE_RNG_RESEED_INTERVAL_REG) = 1;
if (key_size > 0x40)
{
if (!se_calc_sha256_oneshot(secret, key, key_size))
goto out;
memset(secret + 0x20, 0, 0x20);
}
else
{
memcpy(secret, key, key_size);
memset(secret + key_size, 0, 0x40 - key_size);
}
SE(SE_CRYPTO_BLOCK_COUNT_REG) = (16 >> 4) - 1;
u32 *secret32 = (u32 *)secret;
u32 *ipad32 = (u32 *)ipad;
u32 *opad32 = (u32 *)opad;
for (u32 i = 0; i < 0x10; i++)
{
ipad32[i] = secret32[i] ^ 0x36363636;
opad32[i] = secret32[i] ^ 0x5C5C5C5C;
}
memcpy(ipad + 0x40, src, src_size);
if (!se_calc_sha256_oneshot(dst, ipad, 0x40 + src_size))
goto out;
memcpy(opad + 0x40, dst, 0x20);
if (!se_calc_sha256_oneshot(dst, opad, 0x60))
goto out;
res = 1;
out:;
free(secret);
free(ipad);
free(opad);
return res;
// Trigger the operation.
return _se_execute_oneshot(SE_OP_START, dst, 16, NULL, 0);
}
void se_get_aes_keys(u8 *buf, u8 *keys, u32 keysize)
@@ -774,3 +639,102 @@ void se_get_aes_keys(u8 *buf, u8 *keys, u32 keysize)
se_aes_crypt_cbc(3, DECRYPT, keys, SE_AES_KEYSLOT_COUNT * keysize, keys, SE_AES_KEYSLOT_COUNT * keysize);
se_aes_key_clear(3);
}
// se_aes_cmac() was derived from Atmosphère's se_compute_aes_cmac
int se_aes_cmac(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_size)
{
int res = 0;
u8 *key = (u8 *)calloc(0x10, 1);
u8 *last_block = (u8 *)calloc(0x10, 1);
// generate derived key
if (!se_aes_crypt_block_ecb(ks, 1, key, key))
goto out;
_gf256_mul_x(key);
if (src_size & 0xF)
_gf256_mul_x(key);
SE(SE_CONFIG_REG) = SE_CONFIG_ENC_ALG(ALG_AES_ENC) | SE_CONFIG_DST(DST_HASHREG);
SE(SE_CRYPTO_CONFIG_REG) = SE_CRYPTO_KEY_INDEX(ks) | SE_CRYPTO_INPUT_SEL(INPUT_MEMORY) |
SE_CRYPTO_XOR_POS(XOR_TOP) | SE_CRYPTO_VCTRAM_SEL(VCTRAM_AESOUT) | SE_CRYPTO_HASH(HASH_ENABLE) |
SE_CRYPTO_CORE_SEL(CORE_ENCRYPT);
se_aes_iv_clear(ks);
u32 num_blocks = (src_size + 0xf) >> 4;
if (num_blocks > 1)
{
SE(SE_CRYPTO_BLOCK_COUNT_REG) = num_blocks - 2;
if (!_se_execute_oneshot(SE_OP_START, NULL, 0, src, src_size))
goto out;
SE(SE_CRYPTO_CONFIG_REG) |= SE_CRYPTO_IV_SEL(IV_UPDATED);
}
if (src_size & 0xf)
{
memcpy(last_block, src + (src_size & ~0xf), src_size & 0xf);
last_block[src_size & 0xf] = 0x80;
}
else if (src_size >= 0x10)
{
memcpy(last_block, src + src_size - 0x10, 0x10);
}
for (u32 i = 0; i < 0x10; i++)
last_block[i] ^= key[i];
SE(SE_CRYPTO_BLOCK_COUNT_REG) = 0;
res = _se_execute_oneshot(SE_OP_START, NULL, 0, last_block, 0x10);
u32 *dst32 = (u32 *)dst;
for (u32 i = 0; i < (dst_size >> 2); i++)
dst32[i] = SE(SE_HASH_RESULT_REG + (i << 2));
out:;
free(key);
free(last_block);
return res;
}
int se_calc_hmac_sha256(void *dst, const void *src, u32 src_size, const void *key, u32 key_size)
{
int res = 0;
u8 *secret = (u8 *)malloc(0x40);
u8 *ipad = (u8 *)malloc(0x40 + src_size);
u8 *opad = (u8 *)malloc(0x60);
if (key_size > 0x40)
{
if (!se_calc_sha256_oneshot(secret, key, key_size))
goto out;
memset(secret + 0x20, 0, 0x20);
}
else
{
memcpy(secret, key, key_size);
memset(secret + key_size, 0, 0x40 - key_size);
}
u32 *secret32 = (u32 *)secret;
u32 *ipad32 = (u32 *)ipad;
u32 *opad32 = (u32 *)opad;
for (u32 i = 0; i < 0x10; i++)
{
ipad32[i] = secret32[i] ^ 0x36363636;
opad32[i] = secret32[i] ^ 0x5C5C5C5C;
}
memcpy(ipad + 0x40, src, src_size);
if (!se_calc_sha256_oneshot(dst, ipad, 0x40 + src_size))
goto out;
memcpy(opad + 0x40, dst, 0x20);
if (!se_calc_sha256_oneshot(dst, opad, 0x60))
goto out;
res = 1;
out:;
free(secret);
free(ipad);
free(opad);
return res;
}

65
bdk/sec/se.h
View File

@@ -1,53 +1,48 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2019-2021 CTCaer
* Copyright (c) 2019-2021 shchmue
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
* Copyright (c) 2018 naehrwert
* Copyright (c) 2019-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _SE_H_
#define _SE_H_
#include "se_t210.h"
#include <utils/types.h>
void se_rsa_acc_ctrl(u32 rs, u32 flags);
void se_rsa_key_set(u32 ks, const void *mod, u32 mod_size, const void *exp, u32 exp_size);
void se_rsa_key_clear(u32 ks);
int se_rsa_exp_mod(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_size);
void se_key_acc_ctrl(u32 ks, u32 flags);
u32 se_key_acc_ctrl_get(u32 ks);
void se_get_aes_keys(u8 *buf, u8 *keys, u32 keysize);
void se_aes_key_set(u32 ks, const void *key, u32 size);
void se_aes_iv_set(u32 ks, const void *iv);
void se_aes_key_partial_set(u32 ks, u32 index, u32 data);
void se_aes_key_set(u32 ks, void *key, u32 size);
void se_aes_iv_set(u32 ks, void *iv);
void se_aes_key_get(u32 ks, void *key, u32 size);
void se_aes_key_clear(u32 ks);
void se_aes_iv_clear(u32 ks);
int se_initialize_rng();
int se_generate_random(void *dst, u32 size);
int se_generate_random_key(u32 ks_dst, u32 ks_src);
int se_aes_unwrap_key(u32 ks_dst, u32 ks_src, const void *input);
int se_aes_crypt_cbc(u32 ks, u32 enc, void *dst, u32 dst_size, const void *src, u32 src_size);
int se_aes_crypt_ecb(u32 ks, u32 enc, void *dst, u32 dst_size, const void *src, u32 src_size);
int se_aes_crypt_block_ecb(u32 ks, u32 enc, void *dst, const void *src);
int se_aes_crypt_ctr(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_size, const void *ctr);
int se_aes_xts_crypt_sec(u32 tweak_ks, u32 crypt_ks, u32 enc, u64 sec, void *dst, const void *src, u32 sec_size);
int se_aes_xts_crypt(u32 tweak_ks, u32 crypt_ks, u32 enc, u64 sec, void *dst, const void *src, u32 sec_size, u32 num_secs);
int se_aes_unwrap_key(u32 ks_dst, u32 ks_src, const void *input);
int se_aes_crypt_cbc(u32 ks, u32 enc, void *dst, u32 dst_size, const void *src, u32 src_size);
int se_aes_crypt_ecb(u32 ks, u32 enc, void *dst, u32 dst_size, const void *src, u32 src_size);
int se_aes_crypt_block_ecb(u32 ks, u32 enc, void *dst, const void *src);
int se_aes_xts_crypt_sec(u32 tweak_ks, u32 crypt_ks, u32 enc, u64 sec, void *dst, void *src, u32 secsize);
int se_aes_xts_crypt_sec_nx(u32 tweak_ks, u32 crypt_ks, u32 enc, u64 sec, u8 *tweak, bool regen_tweak, u32 tweak_exp, void *dst, void *src, u32 sec_size);
int se_aes_xts_crypt(u32 tweak_ks, u32 crypt_ks, u32 enc, u64 sec, void *dst, void *src, u32 secsize, u32 num_secs);
int se_aes_crypt_ctr(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_size, void *ctr);
int se_calc_sha256(void *hash, u32 *msg_left, const void *src, u32 src_size, u64 total_size, u32 sha_cfg, bool is_oneshot);
int se_calc_sha256_oneshot(void *hash, const void *src, u32 src_size);
int se_calc_sha256_finalize(void *hash, u32 *msg_left);
int se_gen_prng128(void *dst);
int se_aes_cmac(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_size);
int se_calc_sha256(void *hash, u32 *msg_left, const void *src, u32 src_size, u64 total_size, u32 sha_cfg, bool is_oneshot);
int se_calc_sha256_oneshot(void *hash, const void *src, u32 src_size);
int se_calc_sha256_finalize(void *hash, u32 *msg_left);
int se_calc_hmac_sha256(void *dst, const void *src, u32 src_size, const void *key, u32 key_size);
#endif

2
bdk/sec/se_t210.h
View File

@@ -304,6 +304,8 @@
#define SE_STATUS_STATE_WAIT_OUT 2
#define SE_STATUS_STATE_WAIT_IN 3
#define SE_STATUS_STATE_MASK 3
#define SE_STATUS_MEM_IF_IDLE (0 << 2)
#define SE_STATUS_MEM_IF_BUSY BIT(2)
#define SE_ERR_STATUS_REG 0x804
#define SE_ERR_STATUS_SE_NS_ACCESS BIT(0)

2
bdk/sec/tsec.h
View File

@@ -30,7 +30,7 @@ enum tsec_fw_type
typedef struct _tsec_ctxt_t
{
const void *fw;
void *fw;
u32 size;
u32 type;
void *pkg1;

173
bdk/soc/actmon.c Normal file
View File

@@ -0,0 +1,173 @@
/*
* Activity Monitor driver for Tegra X1
*
* Copyright (c) 2021 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "actmon.h"
#include "clock.h"
#include "t210.h"
/* Global registers */
#define ACTMON_GLB_STATUS 0x0
#define ACTMON_MCCPU_MON_ACT BIT(8)
#define ACTMON_MCALL_MON_ACT BIT(9)
#define ACTMON_CPU_FREQ_MON_ACT BIT(10)
#define ACTMON_APB_MON_ACT BIT(12)
#define ACTMON_AHB_MON_ACT BIT(13)
#define ACTMON_BPMP_MON_ACT BIT(14)
#define ACTMON_CPU_MON_ACT BIT(15)
#define ACTMON_MCCPU_INTR BIT(25)
#define ACTMON_MCALL_INTR BIT(26)
#define ACTMON_CPU_FREQ_INTR BIT(27)
#define ACTMON_APB_INTR BIT(28)
#define ACTMON_AHB_INTR BIT(29)
#define ACTMON_BPMP_INTR BIT(30)
#define ACTMON_CPU_INTR BIT(31)
#define ACTMON_GLB_PERIOD_CTRL 0x4
#define ACTMON_GLB_PERIOD_USEC BIT(8)
#define ACTMON_GLB_PERIOD_SAMPLE(n) (((n) - 1) & 0xFF)
/* Device Registers */
#define ACTMON_DEV_BASE ACTMON_BASE + 0x80
#define ACTMON_DEV_SIZE 0x40
/* CTRL */
#define ACTMON_DEV_CTRL_K_VAL(k) (((k) & 7) << 10)
#define ACTMON_DEV_CTRL_ENB_PERIODIC BIT(18)
#define ACTMON_DEV_CTRL_AT_END_EN BIT(19)
#define ACTMON_DEV_CTRL_AVG_BELOW_WMARK_EN BIT(20)
#define ACTMON_DEV_CTRL_AVG_ABOVE_WMARK_EN BIT(21)
#define ACTMON_DEV_CTRL_WHEN_OVERFLOW_EN BIT(22)
#define ACTMON_DEV_CTRL_CONSECUTIVE_BELOW_WMARK_NUM(n) (((n) & 7) << 23)
#define ACTMON_DEV_CTRL_CONSECUTIVE_ABOVE_WMARK_NUM(n) (((n) & 7) << 26)
#define ACTMON_DEV_CTRL_CONSECUTIVE_BELOW_WMARK_EN BIT(29)
#define ACTMON_DEV_CTRL_CONSECUTIVE_ABOVE_WMARK_EN BIT(30)
#define ACTMON_DEV_CTRL_ENB BIT(31)
/* INTR_STATUS */
#define ACTMON_DEV_ISTS_AVG_ABOVE_WMARK BIT(24)
#define ACTMON_DEV_ISTS_AVG_BELOW_WMARK BIT(25)
#define ACTMON_DEV_ISTS_WHEN_OVERFLOW BIT(26)
#define ACTMON_DEV_ISTS_AT_END BIT(29)
#define ACTMON_DEV_ISTS_CONSECUTIVE_LOWER BIT(30)
#define ACTMON_DEV_ISTS_CONSECUTIVE_UPPER BIT(31)
/* Histogram Registers */
#define ACTMON_HISTOGRAM_CONFIG 0x300
#define ACTMON_HIST_CFG_ACTIVE BIT(0)
#define ACTMON_HIST_CFG_LINEAR_MODE BIT(1)
#define ACTMON_HIST_CFG_NO_UNDERFLOW_BUCKET BIT(2)
#define ACTMON_HIST_CFG_STALL_ON_SINGLE_SATURATE BIT(3)
#define ACTMON_HIST_CFG_SHIFT(s) (((s) & 0x1F) << 4)
#define ACTMON_HIST_CFG_SOURCE(s) (((s) & 0xF) << 12)
#define ACTMON_HISTOGRAM_CTRL 0x304
#define ACTMON_HIST_CTRL_CLEAR_ALL BIT(0)
#define ACTMON_HISTOGRAM_DATA_BASE 0x380
#define ACTMON_HISTOGRAM_DATA_NUM 32
#define ACTMON_FREQ 19200000
typedef struct _actmon_dev_reg_t
{
vu32 ctrl;
vu32 upper_wnark;
vu32 lower_wmark;
vu32 init_avg;
vu32 avg_upper_wmark;
vu32 avg_lower_wmark;
vu32 count_weight;
vu32 count;
vu32 avg_count;
vu32 intr_status;
vu32 ctrl2;
vu32 unk[5];
} actmon_dev_reg_t;
u32 sample_period = 0;
void actmon_hist_enable(actmon_hist_src_t src)
{
ACTMON(ACTMON_HISTOGRAM_CONFIG) = ACTMON_HIST_CFG_SOURCE(src) | ACTMON_HIST_CFG_ACTIVE;
ACTMON(ACTMON_HISTOGRAM_CTRL) = ACTMON_HIST_CTRL_CLEAR_ALL;
}
void actmon_hist_disable()
{
ACTMON(ACTMON_HISTOGRAM_CONFIG) = 0;
}
void actmon_hist_get(u32 *histogram)
{
if (histogram)
{
for (u32 i = 0; i < ACTMON_HISTOGRAM_DATA_NUM; i++)
histogram[i] = ACTMON(ACTMON_HISTOGRAM_DATA_BASE + i * sizeof(u32));
}
}
void actmon_dev_enable(actmon_dev_t dev)
{
actmon_dev_reg_t *regs = (actmon_dev_reg_t *)(ACTMON_DEV_BASE + (dev * ACTMON_DEV_SIZE));
regs->init_avg = 0;
regs->count_weight = 5;
regs->ctrl = ACTMON_DEV_CTRL_ENB | ACTMON_DEV_CTRL_ENB_PERIODIC;
}
void actmon_dev_disable(actmon_dev_t dev)
{
actmon_dev_reg_t *regs = (actmon_dev_reg_t *)(ACTMON_DEV_BASE + (dev * ACTMON_DEV_SIZE));
regs->ctrl = 0;
}
u32 actmon_dev_get_load(actmon_dev_t dev)
{
actmon_dev_reg_t *regs = (actmon_dev_reg_t *)(ACTMON_DEV_BASE + (dev * ACTMON_DEV_SIZE));
// Get load-based sampling. 1 decimal point precision.
u32 load = regs->count / (ACTMON_FREQ / 1000);
return load;
}
u32 actmon_dev_get_load_avg(actmon_dev_t dev)
{
actmon_dev_reg_t *regs = (actmon_dev_reg_t *)(ACTMON_DEV_BASE + (dev * ACTMON_DEV_SIZE));
// Get load-based sampling. 1 decimal point precision.
u32 avg_load = regs->avg_count / (ACTMON_FREQ / 1000);
return avg_load;
}
void atmon_dev_all_disable()
{
// TODO: do a global reset?
}
void actmon_init()
{
clock_enable_actmon();
// Set period to 200ms.
ACTMON(ACTMON_GLB_PERIOD_CTRL) &= ~ACTMON_GLB_PERIOD_USEC;
ACTMON(ACTMON_GLB_PERIOD_CTRL) |= ACTMON_GLB_PERIOD_SAMPLE(200);
}
void actmon_end()
{
clock_disable_actmon();
}

62
bdk/soc/actmon.h Normal file
View File

@@ -0,0 +1,62 @@
/*
* Activity Monitor driver for Tegra X1
*
* Copyright (c) 2021 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __ACTMON_H_
#define __ACTMON_H_
#include <utils/types.h>
typedef enum _actmon_dev_t
{
ACTMON_DEV_CPU,
ACTMON_DEV_BPMP,
ACTMON_DEV_AHB,
ACTMON_DEV_APB,
ACTMON_DEV_CPU_FREQ,
ACTMON_DEV_MC_ALL,
ACTMON_DEV_MC_CPU,
ACTMON_DEV_NUM,
} actmon_dev_t;
typedef enum _actmon_hist_src_t
{
ACTMON_HIST_SRC_NONE = 0,
ACTMON_HIST_SRC_AHB = 1,
ACTMON_HIST_SRC_APB = 2,
ACTMON_HIST_SRC_BPMP = 3,
ACTMON_HIST_SRC_CPU = 4,
ACTMON_HIST_SRC_MC_ALL = 5,
ACTMON_HIST_SRC_MC_CPU = 6,
ACTMON_HIST_SRC_CPU_FREQ = 7,
ACTMON_HIST_SRC_NA = 8,
ACTMON_HIST_SRC_APB_MMIO = 9,
} actmon_hist_src_t;
void actmon_hist_enable(actmon_hist_src_t src);
void actmon_hist_disable();
void actmon_hist_get(u32 *histogram);
void actmon_dev_enable(actmon_dev_t dev);
void actmon_dev_disable(actmon_dev_t dev);
u32 actmon_dev_get_load(actmon_dev_t dev);
u32 actmon_dev_get_load_avg(actmon_dev_t dev);
void atmon_dev_all_disable();
void actmon_init();
void actmon_end();
#endif

1
bdk/soc/ccplex.c
View File

@@ -91,6 +91,7 @@ void ccplex_boot_cpu0(u32 entry)
// Set reset vector.
SB(SB_AA64_RESET_LOW) = entry | SB_AA64_RST_AARCH64_MODE_EN;
SB(SB_AA64_RESET_HIGH) = 0;
// Non-secure reset vector write disable.
SB(SB_CSR) = SB_CSR_NS_RST_VEC_WR_DIS;
(void)SB(SB_CSR);

46
bdk/soc/clock.c
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018-2020 CTCaer
* Copyright (c) 2018-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -79,7 +79,7 @@ static clock_t _clock_sor0 = {
CLK_RST_CONTROLLER_RST_DEVICES_X, CLK_RST_CONTROLLER_CLK_OUT_ENB_X, CLK_NOT_USED, CLK_X_SOR0, 0, 0
};
static clock_t _clock_sor1 = {
CLK_RST_CONTROLLER_RST_DEVICES_X, CLK_RST_CONTROLLER_CLK_OUT_ENB_X, CLK_RST_CONTROLLER_CLK_SOURCE_SOR1, CLK_X_SOR1, 0, 2 //204MHz.
CLK_RST_CONTROLLER_RST_DEVICES_X, CLK_RST_CONTROLLER_CLK_OUT_ENB_X, CLK_RST_CONTROLLER_CLK_SOURCE_SOR1, CLK_X_SOR1, 0, 2 // 204MHz.
};
static clock_t _clock_kfuse = {
CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_NO_SOURCE, CLK_H_KFUSE, 0, 0
@@ -100,6 +100,18 @@ static clock_t _clock_sdmmc_legacy_tm = {
CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC_LEGACY_TM, CLK_Y_SDMMC_LEGACY_TM, 4, 66
};
static clock_t _clock_apbdma = {
CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_NO_SOURCE, CLK_H_APBDMA, 0, 0
};
static clock_t _clock_ahbdma = {
CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_NO_SOURCE, CLK_H_AHBDMA, 0, 0
};
static clock_t _clock_actmon = {
CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_RST_CONTROLLER_CLK_SOURCE_ACTMON, CLK_V_ACTMON, 6, 0 // 19.2MHz.
};
void clock_enable(const clock_t *clk)
{
// Put clock into reset.
@@ -279,6 +291,36 @@ void clock_disable_pwm()
clock_disable(&_clock_pwm);
}
void clock_enable_apbdma()
{
clock_enable(&_clock_apbdma);
}
void clock_disable_apbdma()
{
clock_disable(&_clock_apbdma);
}
void clock_enable_ahbdma()
{
clock_enable(&_clock_ahbdma);
}
void clock_disable_ahbdma()
{
clock_disable(&_clock_ahbdma);
}
void clock_enable_actmon()
{
clock_enable(&_clock_actmon);
}
void clock_disable_actmon()
{
clock_disable(&_clock_actmon);
}
void clock_enable_pllx()
{
// Configure and enable PLLX if disabled.

10
bdk/soc/clock.h
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018-2020 CTCaer
* Copyright (c) 2018-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -117,6 +117,7 @@
#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD 0x3A4
#define CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT 0x3B4
#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C4 0x3C4
#define CLK_RST_CONTROLLER_CLK_SOURCE_ACTMON 0x3E8
#define CLK_RST_CONTROLLER_CLK_SOURCE_EXTPERIPH1 0x3EC
#define CLK_RST_CONTROLLER_CLK_SOURCE_SYS 0x400
#define CLK_RST_CONTROLLER_CLK_SOURCE_SOR1 0x410
@@ -659,6 +660,13 @@ void clock_enable_coresight();
void clock_disable_coresight();
void clock_enable_pwm();
void clock_disable_pwm();
void clock_enable_apbdma();
void clock_disable_apbdma();
void clock_enable_ahbdma();
void clock_disable_ahbdma();
void clock_enable_actmon();
void clock_disable_actmon();
void clock_enable_pllx();
void clock_enable_pllc(u32 divn);
void clock_disable_pllc();

10
bdk/soc/fuse.c
View File

@@ -3,7 +3,6 @@
* Copyright (c) 2018 shuffle2
* Copyright (c) 2018 balika011
* Copyright (c) 2019-2021 CTCaer
* Copyright (c) 2021 shchmue
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -79,15 +78,6 @@ u32 fuse_read_odm_keygen_rev()
return 0;
}
u32 fuse_read_bootrom_rev()
{
u32 rev = FUSE(FUSE_SOC_SPEEDO_1_CALIB);
if (hw_get_chip_id() == GP_HIDREV_MAJOR_T210)
return rev;
else
return rev | (1 << 12);
}
u32 fuse_read_dramid(bool raw_id)
{
u32 dramid = (fuse_read_odm(4) & 0xF8) >> 3;

8
bdk/soc/fuse.h
View File

@@ -3,7 +3,6 @@
* Copyright (c) 2018 shuffle2
* Copyright (c) 2018 balika011
* Copyright (c) 2019-2021 CTCaer
* Copyright (c) 2021 shchmue
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -38,6 +37,8 @@
#define FUSE_DISABLEREGPROGRAM 0x2C
#define FUSE_WRITE_ACCESS_SW 0x30
#define FUSE_PWR_GOOD_SW 0x34
/*! Fuse Cached registers */
#define FUSE_SKU_INFO 0x110
#define FUSE_CPU_SPEEDO_0_CALIB 0x114
#define FUSE_CPU_IDDQ_CALIB 0x118
@@ -65,8 +66,10 @@
#define FUSE_OPT_WAFER_ID 0x210
#define FUSE_OPT_X_COORDINATE 0x214
#define FUSE_OPT_Y_COORDINATE 0x218
#define FUSE_OPT_OPS_RESERVED 0x220
#define FUSE_GPU_IDDQ_CALIB 0x228
#define FUSE_USB_CALIB_EXT 0x350
#define FUSE_RESERVED_FIELD 0x354
#define FUSE_RESERVED_ODM28_T210B01 0x240
@@ -84,7 +87,7 @@ enum
FUSE_NX_HW_TYPE_ICOSA,
FUSE_NX_HW_TYPE_IOWA,
FUSE_NX_HW_TYPE_HOAG,
FUSE_NX_HW_TYPE_AULA
FUSE_NX_HW_TYPE_AULA
};
enum
@@ -96,7 +99,6 @@ enum
void fuse_disable_program();
u32 fuse_read_odm(u32 idx);
u32 fuse_read_odm_keygen_rev();
u32 fuse_read_bootrom_rev();
u32 fuse_read_dramid(bool raw_id);
u32 fuse_read_hw_state();
u32 fuse_read_hw_type();

20
bdk/soc/hw_init.c
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018-2021 CTCaer
* Copyright (c) 2018-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -39,7 +39,7 @@
#include <power/max77620.h>
#include <power/max7762x.h>
#include <power/regulator_5v.h>
#include <storage/nx_sd.h>
#include <storage/sd.h>
#include <storage/sdmmc.h>
#include <thermal/fan.h>
#include <thermal/tmp451.h>
@@ -78,7 +78,7 @@ static void _config_oscillators()
PMC(APBDEV_PMC_OSC_EDPD_OVER) = (PMC(APBDEV_PMC_OSC_EDPD_OVER) & 0xFFFFFF81) | 0xE; // Set LP0 OSC drive strength.
PMC(APBDEV_PMC_OSC_EDPD_OVER) = (PMC(APBDEV_PMC_OSC_EDPD_OVER) & 0xFFBFFFFF) | PMC_OSC_EDPD_OVER_OSC_CTRL_OVER;
PMC(APBDEV_PMC_CNTRL2) = (PMC(APBDEV_PMC_CNTRL2) & 0xFFFFEFFF) | PMC_CNTRL2_HOLD_CKE_LOW_EN;
PMC(APBDEV_PMC_SCRATCH188) = (PMC(APBDEV_PMC_SCRATCH188) & 0xFCFFFFFF) | (4 << 23); // LP0 EMC2TMC_CFG_XM2COMP_PU_VREF_SEL_RANGE.
PMC(APB_MISC_GP_ASDBGREG) = (PMC(APB_MISC_GP_ASDBGREG) & 0xFCFFFFFF) | (2 << 24); // CFG2TMC_RAM_SVOP_PDP.
CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 0x10; // Set HCLK div to 2 and PCLK div to 1.
CLOCK(CLK_RST_CONTROLLER_PLLMB_BASE) &= 0xBFFFFFFF; // PLLMB disable.
@@ -138,8 +138,8 @@ static void _config_gpios(bool nx_hoag)
gpio_output_enable(GPIO_PORT_X, GPIO_PIN_7, GPIO_OUTPUT_DISABLE);
// Configure HOME as inputs.
// PINMUX_AUX(PINMUX_AUX_BUTTON_HOME) = PINMUX_INPUT_ENABLE | PINMUX_TRISTATE;
// gpio_config(GPIO_PORT_Y, GPIO_PIN_1, GPIO_MODE_GPIO);
PINMUX_AUX(PINMUX_AUX_BUTTON_HOME) = PINMUX_INPUT_ENABLE | PINMUX_TRISTATE;
gpio_config(GPIO_PORT_Y, GPIO_PIN_1, GPIO_MODE_GPIO);
}
static void _config_pmc_scratch()
@@ -399,12 +399,12 @@ void hw_init()
// Set BPMP/SCLK to PLLP_OUT (408MHz).
CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003333;
// Disable TZRAM shutdown control and lock the regs.
// Power on T210B01 shadow TZRAM and lock the reg.
if (!tegra_t210)
{
PMC(APBDEV_PMC_TZRAM_PWR_CNTRL) &= 0xFFFFFFFE;
PMC(APBDEV_PMC_TZRAM_NON_SEC_DISABLE) = 3;
PMC(APBDEV_PMC_TZRAM_SEC_DISABLE) = 3;
PMC(APBDEV_PMC_TZRAM_PWR_CNTRL) &= ~PMC_TZRAM_PWR_CNTRL_SD;
PMC(APBDEV_PMC_TZRAM_NON_SEC_DISABLE) = PMC_TZRAM_DISABLE_REG_WRITE | PMC_TZRAM_DISABLE_REG_READ;
PMC(APBDEV_PMC_TZRAM_SEC_DISABLE) = PMC_TZRAM_DISABLE_REG_WRITE | PMC_TZRAM_DISABLE_REG_READ;
}
// Initialize External memory controller and configure DRAM parameters.
@@ -418,7 +418,7 @@ void hw_reinit_workaround(bool coreboot, u32 bl_magic)
// Disable BPMP max clock.
bpmp_clk_rate_set(BPMP_CLK_NORMAL);
#ifdef NYX
#ifdef BDK_HW_EXTRA_DEINIT
// Disable temperature sensor, touchscreen, 5V regulators and Joy-Con.
tmp451_end();
set_fan_duty(0);

1
bdk/soc/hw_init.h
View File

@@ -21,6 +21,7 @@
#include <utils/types.h>
#define BL_MAGIC_CRBOOT_SLD 0x30444C53 // SLD0, seamless display type 0.
#define BL_MAGIC_HEKATF_SLD 0x31444C53 // SLD1, seamless display type 1.
#define BL_MAGIC_BROKEN_HWI 0xBAADF00D // Broken hwinit.
extern u32 hw_rst_status;

10
bdk/soc/pmc.h
View File

@@ -1,7 +1,7 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018 st4rk
* Copyright (c) 2018-2020 CTCaer
* Copyright (c) 2018-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -53,7 +53,7 @@
#define PMC_CRYPTO_OP_SE_DISABLE 1
#define APBDEV_PMC_SCRATCH33 0x120
#define APBDEV_PMC_SCRATCH37 0x130
#define PMC_SCRATCH37_KERNEL_PANIC_FLAG BIT(24)
#define PMC_SCRATCH37_KERNEL_PANIC_MAGIC 0x4E415054
#define APBDEV_PMC_SCRATCH40 0x13C
#define APBDEV_PMC_OSC_EDPD_OVER 0x1A4
#define PMC_OSC_EDPD_OVER_OSC_CTRL_OVER 0x400000
@@ -103,9 +103,15 @@
#define APBDEV_PMC_SCRATCH188 0x810
#define APBDEV_PMC_SCRATCH190 0x818
#define APBDEV_PMC_SCRATCH200 0x840
#define APBDEV_PMC_SECURE_SCRATCH108 0xB08
#define APBDEV_PMC_SECURE_SCRATCH109 0xB0C
#define APBDEV_PMC_SECURE_SCRATCH110 0xB10
#define APBDEV_PMC_TZRAM_PWR_CNTRL 0xBE8
#define PMC_TZRAM_PWR_CNTRL_SD BIT(0)
#define APBDEV_PMC_TZRAM_SEC_DISABLE 0xBEC
#define APBDEV_PMC_TZRAM_NON_SEC_DISABLE 0xBF0
#define PMC_TZRAM_DISABLE_REG_WRITE BIT(0)
#define PMC_TZRAM_DISABLE_REG_READ BIT(1)
typedef enum _pmc_sec_lock_t
{

5
bdk/soc/t210.h
View File

@@ -35,6 +35,7 @@
#define AHBDMA_BASE 0x60008000
#define SYSREG_BASE 0x6000C000
#define SB_BASE (SYSREG_BASE + 0x200)
#define ACTMON_BASE 0x6000C800
#define GPIO_BASE 0x6000D000
#define GPIO_1_BASE (GPIO_BASE)
#define GPIO_2_BASE (GPIO_BASE + 0x100)
@@ -89,6 +90,7 @@
#define SYSREG(off) _REG(SYSREG_BASE, off)
#define AHB_GIZMO(off) _REG(SYSREG_BASE, off)
#define SB(off) _REG(SB_BASE, off)
#define ACTMON(off) _REG(ACTMON_BASE, off)
#define GPIO(off) _REG(GPIO_BASE, off)
#define GPIO_1(off) _REG(GPIO_1_BASE, off)
#define GPIO_2(off) _REG(GPIO_2_BASE, off)
@@ -184,6 +186,8 @@
#define MEM_PREFETCH_USB3_MST_ID MST_ID(17) // XUSB.
#define MEM_PREFETCH_ADDR_BNDRY(x) (((x) & 0xF) << 21)
#define MEM_PREFETCH_ENABLE BIT(31)
#define AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID 0xFC
#define MEM_WRQUE_SE_MST_ID BIT(14)
#define AHB_AHB_SPARE_REG 0x110
/*! Misc registers. */
@@ -192,6 +196,7 @@
#define APB_MISC_GP_HIDREV 0x804
#define GP_HIDREV_MAJOR_T210 0x1
#define GP_HIDREV_MAJOR_T210B01 0x2
#define APB_MISC_GP_ASDBGREG 0x810
#define APB_MISC_GP_AUD_MCLK_CFGPADCTRL 0x8F4
#define APB_MISC_GP_LCD_BL_PWM_CFGPADCTRL 0xA34
#define APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL 0xA98

19
bdk/soc/uart.c
View File

@@ -172,3 +172,22 @@ void uart_empty_fifo(u32 idx, u32 which)
}
}
}
#ifdef DEBUG_UART_PORT
#include <stdarg.h>
#include <string.h>
#include <utils/sprintf.h>
void uart_print(const char *fmt, ...)
{
va_list ap;
char text[256];
va_start(ap, fmt);
s_vprintf(text, fmt, ap);
va_end(ap);
uart_send(DEBUG_UART_PORT, (u8 *)text, strlen(text));
}
#endif

3
bdk/soc/uart.h
View File

@@ -94,5 +94,8 @@ void uart_invert(u32 idx, bool enable, u32 invert_mask);
u32 uart_get_IIR(u32 idx);
void uart_set_IIR(u32 idx);
void uart_empty_fifo(u32 idx, u32 which);
#ifdef DEBUG_UART_PORT
void uart_print(const char *fmt, ...);
#endif
#endif

223
bdk/storage/emmc.c Normal file
View File

@@ -0,0 +1,223 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2019-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <string.h>
#include "emmc.h"
#include <mem/heap.h>
#include <soc/fuse.h>
#include <storage/mbr_gpt.h>
#include <utils/list.h>
static u16 emmc_errors[3] = { 0 }; // Init and Read/Write errors.
static u32 emmc_mode = EMMC_MMC_HS400;
sdmmc_t emmc_sdmmc;
sdmmc_storage_t emmc_storage;
FATFS emmc_fs;
#ifdef BDK_EMUMMC_ENABLE
int emummc_storage_read(u32 sector, u32 num_sectors, void *buf);
int emummc_storage_write(u32 sector, u32 num_sectors, void *buf);
#endif
void emmc_error_count_increment(u8 type)
{
switch (type)
{
case EMMC_ERROR_INIT_FAIL:
emmc_errors[0]++;
break;
case EMMC_ERROR_RW_FAIL:
emmc_errors[1]++;
break;
case EMMC_ERROR_RW_RETRY:
emmc_errors[2]++;
break;
}
}
u16 *emmc_get_error_count()
{
return emmc_errors;
}
u32 emmc_get_mode()
{
return emmc_mode;
}
int emmc_init_retry(bool power_cycle)
{
u32 bus_width = SDMMC_BUS_WIDTH_8;
u32 type = SDHCI_TIMING_MMC_HS400;
// Power cycle SD eMMC.
if (power_cycle)
{
emmc_mode--;
sdmmc_storage_end(&emmc_storage);
}
// Get init parameters.
switch (emmc_mode)
{
case EMMC_INIT_FAIL: // Reset to max.
return 0;
case EMMC_1BIT_HS52:
bus_width = SDMMC_BUS_WIDTH_1;
type = SDHCI_TIMING_MMC_HS52;
break;
case EMMC_8BIT_HS52:
type = SDHCI_TIMING_MMC_HS52;
break;
case EMMC_MMC_HS200:
type = SDHCI_TIMING_MMC_HS200;
break;
case EMMC_MMC_HS400:
type = SDHCI_TIMING_MMC_HS400;
break;
default:
emmc_mode = EMMC_MMC_HS400;
}
return sdmmc_storage_init_mmc(&emmc_storage, &emmc_sdmmc, bus_width, type);
}
bool emmc_initialize(bool power_cycle)
{
// Reset mode in case of previous failure.
if (emmc_mode == EMMC_INIT_FAIL)
emmc_mode = EMMC_MMC_HS400;
if (power_cycle)
sdmmc_storage_end(&emmc_storage);
int res = !emmc_init_retry(false);
while (true)
{
if (!res)
return true;
else
{
emmc_errors[EMMC_ERROR_INIT_FAIL]++;
if (emmc_mode == EMMC_INIT_FAIL)
break;
else
res = !emmc_init_retry(true);
}
}
sdmmc_storage_end(&emmc_storage);
return false;
}
void emmc_gpt_parse(link_t *gpt)
{
gpt_t *gpt_buf = (gpt_t *)calloc(GPT_NUM_BLOCKS, EMMC_BLOCKSIZE);
#ifdef BDK_EMUMMC_ENABLE
emummc_storage_read(GPT_FIRST_LBA, GPT_NUM_BLOCKS, gpt_buf);
#else
sdmmc_storage_read(&emmc_storage, GPT_FIRST_LBA, GPT_NUM_BLOCKS, gpt_buf);
#endif
// Check if no GPT or more than max allowed entries.
if (memcmp(&gpt_buf->header.signature, "EFI PART", 8) || gpt_buf->header.num_part_ents > 128)
goto out;
for (u32 i = 0; i < gpt_buf->header.num_part_ents; i++)
{
emmc_part_t *part = (emmc_part_t *)calloc(sizeof(emmc_part_t), 1);
if (gpt_buf->entries[i].lba_start < gpt_buf->header.first_use_lba)
continue;
part->index = i;
part->lba_start = gpt_buf->entries[i].lba_start;
part->lba_end = gpt_buf->entries[i].lba_end;
part->attrs = gpt_buf->entries[i].attrs;
// ASCII conversion. Copy only the LSByte of the UTF-16LE name.
for (u32 j = 0; j < 36; j++)
part->name[j] = gpt_buf->entries[i].name[j];
part->name[35] = 0;
list_append(gpt, &part->link);
}
out:
free(gpt_buf);
}
void emmc_gpt_free(link_t *gpt)
{
LIST_FOREACH_SAFE(iter, gpt)
free(CONTAINER_OF(iter, emmc_part_t, link));
}
emmc_part_t *emmc_part_find(link_t *gpt, const char *name)
{
LIST_FOREACH_ENTRY(emmc_part_t, part, gpt, link)
if (!strcmp(part->name, name))
return part;
return NULL;
}
int emmc_part_read(emmc_part_t *part, u32 sector_off, u32 num_sectors, void *buf)
{
// The last LBA is inclusive.
if (part->lba_start + sector_off > part->lba_end)
return 0;
#ifdef BDK_EMUMMC_ENABLE
return emummc_storage_read(part->lba_start + sector_off, num_sectors, buf);
#else
return sdmmc_storage_read(&emmc_storage, part->lba_start + sector_off, num_sectors, buf);
#endif
}
int emmc_part_write(emmc_part_t *part, u32 sector_off, u32 num_sectors, void *buf)
{
// The last LBA is inclusive.
if (part->lba_start + sector_off > part->lba_end)
return 0;
#ifdef BDK_EMUMMC_ENABLE
return emummc_storage_write(part->lba_start + sector_off, num_sectors, buf);
#else
return sdmmc_storage_write(&emmc_storage, part->lba_start + sector_off, num_sectors, buf);
#endif
}
void nx_emmc_get_autorcm_masks(u8 *mod0, u8 *mod1)
{
if (fuse_read_hw_state() == FUSE_NX_HW_STATE_PROD)
{
*mod0 = 0xF7;
*mod1 = 0x86;
}
else
{
*mod0 = 0x37;
*mod1 = 0x84;
}
}

48
source/storage/nx_emmc.h → bdk/storage/emmc.h
View File

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2019-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -14,17 +15,34 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _NX_EMMC_H_
#define _NX_EMMC_H_
#ifndef _EMMC_H_
#define _EMMC_H_
#include <storage/sdmmc.h>
#include <libs/fatfs/ff.h>
#include <utils/types.h>
#include <utils/list.h>
#define NX_GPT_FIRST_LBA 1
#define NX_GPT_NUM_BLOCKS 33
#define NX_EMMC_BLOCKSIZE 512
#include <libs/fatfs/ff.h>
#define GPT_FIRST_LBA 1
#define GPT_NUM_BLOCKS 33
#define EMMC_BLOCKSIZE 512
enum
{
EMMC_INIT_FAIL = 0,
EMMC_1BIT_HS52 = 1,
EMMC_8BIT_HS52 = 2,
EMMC_MMC_HS200 = 3,
EMMC_MMC_HS400 = 4,
};
enum
{
EMMC_ERROR_INIT_FAIL = 0,
EMMC_ERROR_RW_FAIL = 1,
EMMC_ERROR_RW_RETRY = 2
};
typedef struct _emmc_part_t
{
@@ -40,10 +58,18 @@ extern sdmmc_t emmc_sdmmc;
extern sdmmc_storage_t emmc_storage;
extern FATFS emmc_fs;
void nx_emmc_gpt_parse(link_t *gpt, sdmmc_storage_t *storage);
void nx_emmc_gpt_free(link_t *gpt);
emmc_part_t *nx_emmc_part_find(link_t *gpt, const char *name);
int nx_emmc_part_read(sdmmc_storage_t *storage, emmc_part_t *part, u32 sector_off, u32 num_sectors, void *buf);
int nx_emmc_part_write(sdmmc_storage_t *storage, emmc_part_t *part, u32 sector_off, u32 num_sectors, void *buf);
void emmc_error_count_increment(u8 type);
u16 *emmc_get_error_count();
u32 emmc_get_mode();
int emmc_init_retry(bool power_cycle);
bool emmc_initialize(bool power_cycle);
void emmc_gpt_parse(link_t *gpt);
void emmc_gpt_free(link_t *gpt);
emmc_part_t *emmc_part_find(link_t *gpt, const char *name);
int emmc_part_read(emmc_part_t *part, u32 sector_off, u32 num_sectors, void *buf);
int emmc_part_write(emmc_part_t *part, u32 sector_off, u32 num_sectors, void *buf);
void nx_emmc_get_autorcm_masks(u8 *mod0, u8 *mod1);
#endif

315
bdk/storage/nx_emmc_bis.c Normal file
View File

@@ -0,0 +1,315 @@
/*
* eMMC BIS driver for Nintendo Switch
*
* Copyright (c) 2019-2020 shchmue
* Copyright (c) 2019-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <string.h>
#include <memory_map.h>
#include <mem/heap.h>
#include <sec/se.h>
#include <storage/emmc.h>
#include <storage/sd.h>
#include <storage/sdmmc.h>
#include <utils/types.h>
#define BIS_CLUSTER_SECTORS 32
#define BIS_CLUSTER_SIZE 16384
#define BIS_CACHE_MAX_ENTRIES 16384
#define BIS_CACHE_LOOKUP_TBL_EMPTY_ENTRY -1
typedef struct _cluster_cache_t
{
u32 cluster_idx; // Index of the cluster in the partition.
bool dirty; // Has been modified without write-back flag.
u8 data[BIS_CLUSTER_SIZE]; // The cached cluster itself. Aligned to 8 bytes for DMA engine.
} cluster_cache_t;
typedef struct _bis_cache_t
{
bool full;
bool enabled;
u32 dirty_cnt;
u32 top_idx;
u8 dma_buff[BIS_CLUSTER_SIZE]; // Aligned to 8 bytes for DMA engine.
cluster_cache_t clusters[];
} bis_cache_t;
static u8 ks_crypt = 0;
static u8 ks_tweak = 0;
static u32 emu_offset = 0;
static emmc_part_t *system_part = NULL;
static u32 *cache_lookup_tbl = (u32 *)NX_BIS_LOOKUP_ADDR;
static bis_cache_t *bis_cache = (bis_cache_t *)NX_BIS_CACHE_ADDR;
static int nx_emmc_bis_write_block(u32 sector, u32 count, void *buff, bool flush)
{
if (!system_part)
return 3; // Not ready.
int res;
u8 tweak[SE_KEY_128_SIZE] __attribute__((aligned(4)));
u32 cluster = sector / BIS_CLUSTER_SECTORS;
u32 aligned_sector = cluster * BIS_CLUSTER_SECTORS;
u32 sector_in_cluster = sector % BIS_CLUSTER_SECTORS;
u32 lookup_idx = cache_lookup_tbl[cluster];
bool is_cached = lookup_idx != (u32)BIS_CACHE_LOOKUP_TBL_EMPTY_ENTRY;
// Write to cached cluster.
if (is_cached)
{
if (buff)
memcpy(bis_cache->clusters[lookup_idx].data + sector_in_cluster * EMMC_BLOCKSIZE, buff, count * EMMC_BLOCKSIZE);
else
buff = bis_cache->clusters[lookup_idx].data;
if (!bis_cache->clusters[lookup_idx].dirty)
bis_cache->dirty_cnt++;
bis_cache->clusters[lookup_idx].dirty = true;
if (!flush)
return 0; // Success.
// Reset args to trigger a full cluster flush to emmc.
sector_in_cluster = 0;
sector = aligned_sector;
count = BIS_CLUSTER_SECTORS;
}
// Encrypt cluster.
if (!se_aes_xts_crypt_sec_nx(ks_tweak, ks_crypt, ENCRYPT, cluster, tweak, true, sector_in_cluster, bis_cache->dma_buff, buff, count * EMMC_BLOCKSIZE))
return 1; // Encryption error.
// If not reading from cache, do a regular read and decrypt.
if (!emu_offset)
res = emmc_part_write(system_part, sector, count, bis_cache->dma_buff);
else
res = sdmmc_storage_write(&sd_storage, emu_offset + system_part->lba_start + sector, count, bis_cache->dma_buff);
if (!res)
return 1; // R/W error.
// Mark cache entry not dirty if write succeeds.
if (is_cached)
{
bis_cache->clusters[lookup_idx].dirty = false;
bis_cache->dirty_cnt--;
}
return 0; // Success.
}
static void _nx_emmc_bis_cluster_cache_init(bool enable_cache)
{
u32 cache_lookup_tbl_size = (system_part->lba_end - system_part->lba_start + 1) / BIS_CLUSTER_SECTORS * sizeof(*cache_lookup_tbl);
// Clear cache header.
memset(bis_cache, 0, sizeof(bis_cache_t));
// Clear cluster lookup table.
memset(cache_lookup_tbl, BIS_CACHE_LOOKUP_TBL_EMPTY_ENTRY, cache_lookup_tbl_size);
// Enable cache.
bis_cache->enabled = enable_cache;
}
static void _nx_emmc_bis_flush_cache()
{
if (!bis_cache->enabled || !bis_cache->dirty_cnt)
return;
for (u32 i = 0; i < bis_cache->top_idx && bis_cache->dirty_cnt; i++)
{
if (bis_cache->clusters[i].dirty) {
nx_emmc_bis_write_block(bis_cache->clusters[i].cluster_idx * BIS_CLUSTER_SECTORS, BIS_CLUSTER_SECTORS, NULL, true);
bis_cache->dirty_cnt--;
}
}
_nx_emmc_bis_cluster_cache_init(true);
}
static int nx_emmc_bis_read_block_normal(u32 sector, u32 count, void *buff)
{
static u32 prev_cluster = -1;
static u32 prev_sector = 0;
static u8 tweak[SE_KEY_128_SIZE] __attribute__((aligned(4)));
int res;
bool regen_tweak = true;
u32 tweak_exp = 0;
u32 cluster = sector / BIS_CLUSTER_SECTORS;
u32 sector_in_cluster = sector % BIS_CLUSTER_SECTORS;
// If not reading from cache, do a regular read and decrypt.
if (!emu_offset)
res = emmc_part_read(system_part, sector, count, bis_cache->dma_buff);
else
res = sdmmc_storage_read(&sd_storage, emu_offset + system_part->lba_start + sector, count, bis_cache->dma_buff);
if (!res)
return 1; // R/W error.
if (prev_cluster != cluster) // Sector in different cluster than last read.
{
prev_cluster = cluster;
tweak_exp = sector_in_cluster;
}
else if (sector > prev_sector) // Sector in same cluster and past last sector.
{
// Calculates the new tweak using the saved one, reducing expensive _gf256_mul_x_le calls.
tweak_exp = sector - prev_sector - 1;
regen_tweak = false;
}
else // Sector in same cluster and before or same as last sector.
tweak_exp = sector_in_cluster;
// Maximum one cluster (1 XTS crypto block 16KB).
if (!se_aes_xts_crypt_sec_nx(ks_tweak, ks_crypt, DECRYPT, prev_cluster, tweak, regen_tweak, tweak_exp, buff, bis_cache->dma_buff, count * EMMC_BLOCKSIZE))
return 1; // R/W error.
prev_sector = sector + count - 1;
return 0; // Success.
}
static int nx_emmc_bis_read_block_cached(u32 sector, u32 count, void *buff)
{
int res;
u8 cache_tweak[SE_KEY_128_SIZE] __attribute__((aligned(4)));
u32 cluster = sector / BIS_CLUSTER_SECTORS;
u32 cluster_sector = cluster * BIS_CLUSTER_SECTORS;
u32 sector_in_cluster = sector % BIS_CLUSTER_SECTORS;
u32 lookup_idx = cache_lookup_tbl[cluster];
// Read from cached cluster.
if (lookup_idx != (u32)BIS_CACHE_LOOKUP_TBL_EMPTY_ENTRY)
{
memcpy(buff, bis_cache->clusters[lookup_idx].data + sector_in_cluster * EMMC_BLOCKSIZE, count * EMMC_BLOCKSIZE);
return 0; // Success.
}
// Flush cache if full.
if (bis_cache->top_idx >= BIS_CACHE_MAX_ENTRIES)
_nx_emmc_bis_flush_cache();
// Set new cached cluster parameters.
bis_cache->clusters[bis_cache->top_idx].cluster_idx = cluster;
bis_cache->clusters[bis_cache->top_idx].dirty = false;
cache_lookup_tbl[cluster] = bis_cache->top_idx;
// Read the whole cluster the sector resides in.
if (!emu_offset)
res = emmc_part_read(system_part, cluster_sector, BIS_CLUSTER_SECTORS, bis_cache->dma_buff);
else
res = sdmmc_storage_read(&sd_storage, emu_offset + system_part->lba_start + cluster_sector, BIS_CLUSTER_SECTORS, bis_cache->dma_buff);
if (!res)
return 1; // R/W error.
// Decrypt cluster.
if (!se_aes_xts_crypt_sec_nx(ks_tweak, ks_crypt, DECRYPT, cluster, cache_tweak, true, 0, bis_cache->dma_buff, bis_cache->dma_buff, BIS_CLUSTER_SIZE))
return 1; // Decryption error.
// Copy to cluster cache.
memcpy(bis_cache->clusters[bis_cache->top_idx].data, bis_cache->dma_buff, BIS_CLUSTER_SIZE);
memcpy(buff, bis_cache->dma_buff + sector_in_cluster * EMMC_BLOCKSIZE, count * EMMC_BLOCKSIZE);
// Increment cache count.
bis_cache->top_idx++;
return 0; // Success.
}
static int nx_emmc_bis_read_block(u32 sector, u32 count, void *buff)
{
if (!system_part)
return 3; // Not ready.
if (bis_cache->enabled)
return nx_emmc_bis_read_block_cached(sector, count, buff);
else
return nx_emmc_bis_read_block_normal(sector, count, buff);
}
int nx_emmc_bis_read(u32 sector, u32 count, void *buff)
{
u8 *buf = (u8 *)buff;
u32 curr_sct = sector;
while (count)
{
u32 sct_cnt = MIN(count, BIS_CLUSTER_SECTORS);
if (nx_emmc_bis_read_block(curr_sct, sct_cnt, buf))
return 0;
count -= sct_cnt;
curr_sct += sct_cnt;
buf += sct_cnt * EMMC_BLOCKSIZE;
}
return 1;
}
int nx_emmc_bis_write(u32 sector, u32 count, void *buff)
{
u8 *buf = (u8 *)buff;
u32 curr_sct = sector;
while (count)
{
u32 sct_cnt = MIN(count, BIS_CLUSTER_SECTORS);
if (nx_emmc_bis_write_block(curr_sct, sct_cnt, buf, false))
return 0;
count -= sct_cnt;
curr_sct += sct_cnt;
buf += sct_cnt * EMMC_BLOCKSIZE;
}
return 1;
}
void nx_emmc_bis_init(emmc_part_t *part, bool enable_cache, u32 emummc_offset)
{
system_part = part;
emu_offset = emummc_offset;
_nx_emmc_bis_cluster_cache_init(enable_cache);
if (!strcmp(part->name, "PRODINFO") || !strcmp(part->name, "PRODINFOF"))
{
ks_crypt = 0;
ks_tweak = 1;
}
else if (!strcmp(part->name, "SAFE"))
{
ks_crypt = 2;
ks_tweak = 3;
}
else if (!strcmp(part->name, "SYSTEM") || !strcmp(part->name, "USER"))
{
ks_crypt = 4;
ks_tweak = 5;
}
else
system_part = NULL;
}
void nx_emmc_bis_end()
{
_nx_emmc_bis_flush_cache();
system_part = NULL;
}

25
source/storage/nx_emmc_bis.h → bdk/storage/nx_emmc_bis.h
View File

@@ -18,7 +18,7 @@
#ifndef NX_EMMC_BIS_H
#define NX_EMMC_BIS_H
#include "../storage/nx_emmc.h"
#include <storage/emmc.h>
#include <storage/sdmmc.h>
typedef struct _nx_emmc_cal0_spk_t
@@ -163,10 +163,8 @@ typedef struct _nx_emmc_cal0_t
u8 crc16_pad36[0x10];
u8 ext_ecc_b233_eticket_key[0x50];
u8 crc16_pad37[0x10];
u8 ext_ecc_rsa2048_eticket_key_iv[0x10];
u8 ext_ecc_rsa2048_eticket_key[0x230];
u32 ext_ecc_rsa2048_eticket_key_ver;
u8 crc16_pad38[0xC];
u8 ext_ecc_rsa2048_eticket_key[0x240];
u8 crc16_pad38[0x10];
u8 ext_ssl_key[0x130];
u8 crc16_pad39[0x10];
u8 ext_gc_key[0x130];
@@ -225,16 +223,9 @@ typedef struct _nx_emmc_cal0_t
u8 console_6axis_sensor_mount_type;
} __attribute__((packed)) nx_emmc_cal0_t;
#define MAGIC_CAL0 0x304C4143
#define NX_EMMC_CALIBRATION_OFFSET 0x4400
#define NX_EMMC_CALIBRATION_SIZE 0x8000
#define XTS_CLUSTER_SIZE 0x4000
int nx_emmc_bis_read(u32 sector, u32 count, void *buff);
int nx_emmc_bis_write(u32 sector, u32 count, void *buff);
void nx_emmc_bis_init(emmc_part_t *part, bool enable_cache, u32 emummc_offset);
void nx_emmc_bis_end();
int nx_emmc_bis_read(u32 sector, u32 count, void *buff);
int nx_emmc_bis_write(u32 sector, u32 count, void *buff);
void nx_emmc_bis_cluster_cache_init();
void nx_emmc_bis_init(emmc_part_t *part);
void nx_emmc_bis_finalize();
void nx_emmc_bis_cache_lock(bool lock);
#endif
#endif

60
bdk/storage/nx_sd.h
View File

@@ -1,60 +0,0 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018-2021 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef NX_SD_H
#define NX_SD_H
#include <storage/sdmmc.h>
#include <storage/sdmmc_driver.h>
#include <libs/fatfs/ff.h>
enum
{
SD_INIT_FAIL = 0,
SD_1BIT_HS25 = 1,
SD_4BIT_HS25 = 2,
SD_UHS_SDR82 = 3,
SD_UHS_SDR104 = 4
};
enum
{
SD_ERROR_INIT_FAIL = 0,
SD_ERROR_RW_FAIL = 1,
SD_ERROR_RW_RETRY = 2
};
extern sdmmc_t sd_sdmmc;
extern sdmmc_storage_t sd_storage;
extern FATFS sd_fs;
void sd_error_count_increment(u8 type);
u16 *sd_get_error_count();
bool sd_get_card_removed();
bool sd_get_card_initialized();
bool sd_get_card_mounted();
u32 sd_get_mode();
int sd_init_retry(bool power_cycle);
bool sd_initialize(bool power_cycle);
bool sd_mount();
void sd_unmount();
void sd_end();
bool sd_is_gpt();
void *sd_file_read(const char *path, u32 *fsize);
int sd_save_to_file(void *buf, u32 size, const char *filename);
#endif

6
bdk/storage/ramdisk.c
View File

@@ -20,6 +20,7 @@
#include "ramdisk.h"
#include <libs/fatfs/diskio.h>
#include <libs/fatfs/ff.h>
#include <mem/heap.h>
#include <utils/types.h>
@@ -27,10 +28,11 @@
static u32 disk_size = 0;
int ram_disk_init(FATFS *ram_fs, u32 ramdisk_size)
int ram_disk_init(void *ram_fs, u32 ramdisk_size)
{
int res = 0;
disk_size = ramdisk_size;
FATFS *ram_fatfs = (FATFS *)ram_fs;
// If ramdisk is not raw, format it.
if (ram_fs)
@@ -49,7 +51,7 @@ int ram_disk_init(FATFS *ram_fs, u32 ramdisk_size)
// Mount ramdisk.
if (!res)
res = f_mount(ram_fs, "ram:", 1);
res = f_mount(ram_fatfs, "ram:", 1);
free(buf);
}

4
bdk/storage/ramdisk.h
View File

@@ -19,11 +19,11 @@
#ifndef RAM_DISK_H
#define RAM_DISK_H
#include <libs/fatfs/ff.h>
#include <utils/types.h>
#define RAMDISK_CLUSTER_SZ 32768
int ram_disk_init(FATFS *ram_fs, u32 ramdisk_size);
int ram_disk_init(void *ram_fs, u32 ramdisk_size);
int ram_disk_read(u32 sector, u32 sector_count, void *buf);
int ram_disk_write(u32 sector, u32 sector_count, const void *buf);

67
source/storage/nx_sd.c → bdk/storage/sd.c
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018-2019 CTCaer
* Copyright (c) 2018-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -15,16 +15,17 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <storage/nx_sd.h>
#include <storage/sd.h>
#include <storage/sdmmc.h>
#include <storage/sdmmc_driver.h>
#include <gfx_utils.h>
#include <libs/fatfs/ff.h>
#include <mem/heap.h>
bool sd_mounted = false;
static bool sd_mounted = false;
static bool sd_init_done = false;
static u16 sd_errors[3] = { 0 }; // Init and Read/Write errors.
static u32 sd_mode = SD_UHS_SDR82;
static u32 sd_mode = SD_UHS_SDR104;
sdmmc_t sd_sdmmc;
sdmmc_storage_t sd_storage;
@@ -53,12 +54,22 @@ u16 *sd_get_error_count()
bool sd_get_card_removed()
{
if (!sdmmc_get_sd_inserted())
if (sd_init_done && !sdmmc_get_sd_inserted())
return true;
return false;
}
bool sd_get_card_initialized()
{
return sd_init_done;
}
bool sd_get_card_mounted()
{
return sd_mounted;
}
u32 sd_get_mode()
{
return sd_mode;
@@ -67,7 +78,7 @@ u32 sd_get_mode()
int sd_init_retry(bool power_cycle)
{
u32 bus_width = SDMMC_BUS_WIDTH_4;
u32 type = SDHCI_TIMING_UHS_SDR82;
u32 type = SDHCI_TIMING_UHS_SDR104;
// Power cycle SD card.
if (power_cycle)
@@ -91,8 +102,11 @@ int sd_init_retry(bool power_cycle)
case SD_UHS_SDR82:
type = SDHCI_TIMING_UHS_SDR82;
break;
case SD_UHS_SDR104:
type = SDHCI_TIMING_UHS_SDR104;
break;
default:
sd_mode = SD_UHS_SDR82;
sd_mode = SD_UHS_SDR104;
}
return sdmmc_storage_init_sd(&sd_storage, &sd_sdmmc, bus_width, type);
@@ -111,7 +125,7 @@ bool sd_initialize(bool power_cycle)
return true;
else if (!sdmmc_get_sd_inserted()) // SD Card is not inserted.
{
sd_mode = SD_UHS_SDR82;
sd_mode = SD_UHS_SDR104;
break;
}
else
@@ -130,15 +144,15 @@ bool sd_initialize(bool power_cycle)
return false;
}
bool is_sd_inited = false;
bool sd_mount()
{
if (sd_mounted)
return true;
int res = !sd_initialize(false);
is_sd_inited = !res;
int res = 0;
if (!sd_init_done)
res = !sd_initialize(false);
if (res)
{
@@ -151,7 +165,8 @@ bool sd_mount()
}
else
{
res = f_mount(&sd_fs, "", 1);
sd_init_done = true;
res = f_mount(&sd_fs, "0:", 1); // Volume 0 is SD.
if (res == FR_OK)
{
sd_mounted = true;
@@ -167,22 +182,30 @@ bool sd_mount()
return false;
}
static void _sd_deinit()
static void _sd_deinit(bool deinit)
{
if (sd_mode == SD_INIT_FAIL)
sd_mode = SD_UHS_SDR82;
if (deinit && sd_mode == SD_INIT_FAIL)
sd_mode = SD_UHS_SDR104;
if (sd_mounted)
if (sd_init_done && sd_mounted)
{
f_mount(NULL, "", 1);
sdmmc_storage_end(&sd_storage);
f_mount(NULL, "0:", 1); // Volume 0 is SD.
sd_mounted = false;
is_sd_inited = false;
}
if (sd_init_done && deinit)
{
sdmmc_storage_end(&sd_storage);
sd_init_done = false;
}
}
void sd_unmount() { _sd_deinit(); }
void sd_end() { _sd_deinit(); }
void sd_unmount() { _sd_deinit(false); }
void sd_end() { _sd_deinit(true); }
bool sd_is_gpt()
{
return sd_fs.part_type;
}
void *sd_file_read(const char *path, u32 *fsize)
{

186
bdk/storage/sd.h
View File

@@ -1,150 +1,60 @@
/*
* Copyright (c) 2005-2007 Pierre Ossman, All Rights Reserved.
* Copyright (c) 2018-2021 CTCaer
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018-2021 CTCaer
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
#ifndef MMC_SD_H
#define MMC_SD_H
/* SD commands type argument response */
/* class 0 */
/* This is basically the same command as for MMC with some quirks. */
#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */
#define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */
#define SD_SWITCH_VOLTAGE 11 /* ac R1 */
/* class 10 */
#define SD_SWITCH 6 /* adtc [31:0] See below R1 */
/* class 5 */
#define SD_ERASE_WR_BLK_START 32 /* ac [31:0] data addr R1 */
#define SD_ERASE_WR_BLK_END 33 /* ac [31:0] data addr R1 */
/* Application commands */
#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */
#define SD_APP_SD_STATUS 13 /* adtc R1 */
#define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */
#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */
#define SD_APP_SET_CLR_CARD_DETECT 42 /* adtc R1 */
#define SD_APP_SEND_SCR 51 /* adtc R1 */
/* Application secure commands */
#define SD_APP_SECURE_READ_MULTI_BLOCK 18 /* adtc R1 */
#define SD_APP_SECURE_WRITE_MULTI_BLOCK 25 /* adtc R1 */
#define SD_APP_SECURE_WRITE_MKB 26 /* adtc R1 */
#define SD_APP_SECURE_ERASE 38 /* adtc R1b */
#define SD_APP_GET_MKB 43 /* adtc [31:0] See below R1 */
#define SD_APP_GET_MID 44 /* adtc R1 */
#define SD_APP_SET_CER_RN1 45 /* adtc R1 */
#define SD_APP_GET_CER_RN2 46 /* adtc R1 */
#define SD_APP_SET_CER_RES2 47 /* adtc R1 */
#define SD_APP_GET_CER_RES1 48 /* adtc R1 */
#define SD_APP_CHANGE_SECURE_AREA 49 /* adtc R1b */
/* OCR bit definitions */
#define SD_OCR_VDD_18 (1 << 7) /* VDD voltage 1.8 */
#define SD_VHD_27_36 (1 << 8) /* VDD voltage 2.7 ~ 3.6 */
#define SD_OCR_VDD_27_34 (0x7F << 15) /* VDD voltage 2.7 ~ 3.4 */
#define SD_OCR_VDD_32_33 (1 << 20) /* VDD voltage 3.2 ~ 3.3 */
#define SD_OCR_S18R (1 << 24) /* 1.8V switching request */
#define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */
#define SD_OCR_XPC (1 << 28) /* SDXC power control */
#define SD_OCR_CCS (1 << 30) /* Card Capacity Status */
#define SD_OCR_BUSY (1 << 31) /* Card Power up Status */
/*
* SD_SWITCH argument format:
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* [31] Check (0) or switch (1)
* [30:24] Reserved (0)
* [23:20] Function group 6
* [19:16] Function group 5
* [15:12] Function group 4
* [11:8] Function group 3
* [7:4] Function group 2
* [3:0] Function group 1
*/
/*
* SD_SEND_IF_COND argument format:
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* [31:12] Reserved (0)
* [11:8] Host Voltage Supply Flags
* [7:0] Check Pattern (0xAA)
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* SD_APP_GET_MKB argument format:
*
* [31:24] Number of blocks to read (512 block size)
* [23:16] MKB ID
* [15:0] Block offset
*/
#ifndef SD_H
#define SD_H
/*
* SCR field definitions
*/
#define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */
#define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */
#define SCR_SPEC_VER_2 2 /* Implements system specification 2.00-3.0X */
#define SD_SCR_BUS_WIDTH_1 (1<<0)
#define SD_SCR_BUS_WIDTH_4 (1<<2)
#include <storage/sdmmc.h>
#include <storage/sdmmc_driver.h>
#include <libs/fatfs/ff.h>
/*
* SD bus widths
*/
#define SD_BUS_WIDTH_1 0
#define SD_BUS_WIDTH_4 2
enum
{
SD_INIT_FAIL = 0,
SD_1BIT_HS25 = 1,
SD_4BIT_HS25 = 2,
SD_UHS_SDR82 = 3,
SD_UHS_SDR104 = 4
};
/*
* SD bus speeds
*/
#define UHS_SDR12_BUS_SPEED 0
#define HIGH_SPEED_BUS_SPEED 1
#define UHS_SDR25_BUS_SPEED 1
#define UHS_SDR50_BUS_SPEED 2
#define UHS_SDR104_BUS_SPEED 3
#define UHS_DDR50_BUS_SPEED 4
#define HS400_BUS_SPEED 5
enum
{
SD_ERROR_INIT_FAIL = 0,
SD_ERROR_RW_FAIL = 1,
SD_ERROR_RW_RETRY = 2
};
#define SD_MODE_HIGH_SPEED (1 << HIGH_SPEED_BUS_SPEED)
#define SD_MODE_UHS_SDR12 (1 << UHS_SDR12_BUS_SPEED)
#define SD_MODE_UHS_SDR25 (1 << UHS_SDR25_BUS_SPEED)
#define SD_MODE_UHS_SDR50 (1 << UHS_SDR50_BUS_SPEED)
#define SD_MODE_UHS_SDR104 (1 << UHS_SDR104_BUS_SPEED)
#define SD_MODE_UHS_DDR50 (1 << UHS_DDR50_BUS_SPEED)
extern sdmmc_t sd_sdmmc;
extern sdmmc_storage_t sd_storage;
extern FATFS sd_fs;
#define SD_DRIVER_TYPE_B 0x01
#define SD_DRIVER_TYPE_A 0x02
void sd_error_count_increment(u8 type);
u16 *sd_get_error_count();
bool sd_get_card_removed();
bool sd_get_card_initialized();
bool sd_get_card_mounted();
u32 sd_get_mode();
int sd_init_retry(bool power_cycle);
bool sd_initialize(bool power_cycle);
bool sd_mount();
void sd_unmount();
void sd_end();
bool sd_is_gpt();
void *sd_file_read(const char *path, u32 *fsize);
int sd_save_to_file(void *buf, u32 size, const char *filename);
#define SD_SET_CURRENT_LIMIT_200 0
#define SD_SET_CURRENT_LIMIT_400 1
#define SD_SET_CURRENT_LIMIT_600 2
#define SD_SET_CURRENT_LIMIT_800 3
#define SD_MAX_CURRENT_200 (1 << SD_SET_CURRENT_LIMIT_200)
#define SD_MAX_CURRENT_400 (1 << SD_SET_CURRENT_LIMIT_400)
#define SD_MAX_CURRENT_600 (1 << SD_SET_CURRENT_LIMIT_600)
#define SD_MAX_CURRENT_800 (1 << SD_SET_CURRENT_LIMIT_800)
/*
* SD_SWITCH mode
*/
#define SD_SWITCH_CHECK 0
#define SD_SWITCH_SET 1
/*
* SD_SWITCH function groups
*/
#define SD_SWITCH_GRP_ACCESS 0
/*
* SD_SWITCH access modes
*/
#define SD_SWITCH_ACCESS_DEF 0
#define SD_SWITCH_ACCESS_HS 1
#endif /* LINUX_MMC_SD_H */
#endif

150
bdk/storage/sd_def.h Normal file
View File

@@ -0,0 +1,150 @@
/*
* Copyright (c) 2005-2007 Pierre Ossman, All Rights Reserved.
* Copyright (c) 2018-2021 CTCaer
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
#ifndef SD_DEF_H
#define SD_DEF_H
/* SD commands type argument response */
/* class 0 */
/* This is basically the same command as for MMC with some quirks. */
#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */
#define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */
#define SD_SWITCH_VOLTAGE 11 /* ac R1 */
/* class 10 */
#define SD_SWITCH 6 /* adtc [31:0] See below R1 */
/* class 5 */
#define SD_ERASE_WR_BLK_START 32 /* ac [31:0] data addr R1 */
#define SD_ERASE_WR_BLK_END 33 /* ac [31:0] data addr R1 */
/* Application commands */
#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */
#define SD_APP_SD_STATUS 13 /* adtc R1 */
#define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */
#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */
#define SD_APP_SET_CLR_CARD_DETECT 42 /* adtc R1 */
#define SD_APP_SEND_SCR 51 /* adtc R1 */
/* Application secure commands */
#define SD_APP_SECURE_READ_MULTI_BLOCK 18 /* adtc R1 */
#define SD_APP_SECURE_WRITE_MULTI_BLOCK 25 /* adtc R1 */
#define SD_APP_SECURE_WRITE_MKB 26 /* adtc R1 */
#define SD_APP_SECURE_ERASE 38 /* adtc R1b */
#define SD_APP_GET_MKB 43 /* adtc [31:0] See below R1 */
#define SD_APP_GET_MID 44 /* adtc R1 */
#define SD_APP_SET_CER_RN1 45 /* adtc R1 */
#define SD_APP_GET_CER_RN2 46 /* adtc R1 */
#define SD_APP_SET_CER_RES2 47 /* adtc R1 */
#define SD_APP_GET_CER_RES1 48 /* adtc R1 */
#define SD_APP_CHANGE_SECURE_AREA 49 /* adtc R1b */
/* OCR bit definitions */
#define SD_OCR_VDD_18 (1 << 7) /* VDD voltage 1.8 */
#define SD_VHD_27_36 (1 << 8) /* VDD voltage 2.7 ~ 3.6 */
#define SD_OCR_VDD_27_34 (0x7F << 15) /* VDD voltage 2.7 ~ 3.4 */
#define SD_OCR_VDD_32_33 (1 << 20) /* VDD voltage 3.2 ~ 3.3 */
#define SD_OCR_S18R (1 << 24) /* 1.8V switching request */
#define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */
#define SD_OCR_XPC (1 << 28) /* SDXC power control */
#define SD_OCR_CCS (1 << 30) /* Card Capacity Status */
#define SD_OCR_BUSY (1 << 31) /* Card Power up Status */
/*
* SD_SWITCH argument format:
*
* [31] Check (0) or switch (1)
* [30:24] Reserved (0)
* [23:20] Function group 6
* [19:16] Function group 5
* [15:12] Function group 4
* [11:8] Function group 3
* [7:4] Function group 2
* [3:0] Function group 1
*/
/*
* SD_SEND_IF_COND argument format:
*
* [31:12] Reserved (0)
* [11:8] Host Voltage Supply Flags
* [7:0] Check Pattern (0xAA)
*/
/*
* SD_APP_GET_MKB argument format:
*
* [31:24] Number of blocks to read (512 block size)
* [23:16] MKB ID
* [15:0] Block offset
*/
/*
* SCR field definitions
*/
#define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */
#define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */
#define SCR_SPEC_VER_2 2 /* Implements system specification 2.00-3.0X */
#define SD_SCR_BUS_WIDTH_1 (1<<0)
#define SD_SCR_BUS_WIDTH_4 (1<<2)
/*
* SD bus widths
*/
#define SD_BUS_WIDTH_1 0
#define SD_BUS_WIDTH_4 2
/*
* SD bus speeds
*/
#define UHS_SDR12_BUS_SPEED 0
#define HIGH_SPEED_BUS_SPEED 1
#define UHS_SDR25_BUS_SPEED 1
#define UHS_SDR50_BUS_SPEED 2
#define UHS_SDR104_BUS_SPEED 3
#define UHS_DDR50_BUS_SPEED 4
#define HS400_BUS_SPEED 5
#define SD_MODE_HIGH_SPEED (1 << HIGH_SPEED_BUS_SPEED)
#define SD_MODE_UHS_SDR12 (1 << UHS_SDR12_BUS_SPEED)
#define SD_MODE_UHS_SDR25 (1 << UHS_SDR25_BUS_SPEED)
#define SD_MODE_UHS_SDR50 (1 << UHS_SDR50_BUS_SPEED)
#define SD_MODE_UHS_SDR104 (1 << UHS_SDR104_BUS_SPEED)
#define SD_MODE_UHS_DDR50 (1 << UHS_DDR50_BUS_SPEED)
#define SD_DRIVER_TYPE_B 0x01
#define SD_DRIVER_TYPE_A 0x02
#define SD_SET_CURRENT_LIMIT_200 0
#define SD_SET_CURRENT_LIMIT_400 1
#define SD_SET_CURRENT_LIMIT_600 2
#define SD_SET_CURRENT_LIMIT_800 3
#define SD_MAX_CURRENT_200 (1 << SD_SET_CURRENT_LIMIT_200)
#define SD_MAX_CURRENT_400 (1 << SD_SET_CURRENT_LIMIT_400)
#define SD_MAX_CURRENT_600 (1 << SD_SET_CURRENT_LIMIT_600)
#define SD_MAX_CURRENT_800 (1 << SD_SET_CURRENT_LIMIT_800)
/*
* SD_SWITCH mode
*/
#define SD_SWITCH_CHECK 0
#define SD_SWITCH_SET 1
/*
* SD_SWITCH function groups
*/
#define SD_SWITCH_GRP_ACCESS 0
/*
* SD_SWITCH access modes
*/
#define SD_SWITCH_ACCESS_DEF 0
#define SD_SWITCH_ACCESS_HS 1
#endif /* SD_DEF_H */

43
bdk/storage/sdmmc.c
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018-2021 CTCaer
* Copyright (c) 2018-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -16,10 +16,11 @@
*/
#include <string.h>
#include <storage/emmc.h>
#include <storage/sdmmc.h>
#include <storage/mmc.h>
#include <storage/nx_sd.h>
#include <storage/sd.h>
#include <storage/sd_def.h>
#include <memory_map.h>
#include <gfx_utils.h>
#include <mem/heap.h>
@@ -264,20 +265,36 @@ reinit_try:
msleep(50);
} while (retries);
// Disk IO failure! Reinit SD Card to a lower speed.
if (storage->sdmmc->id == SDMMC_1)
// Disk IO failure! Reinit SD/EMMC to a lower speed.
if (storage->sdmmc->id == SDMMC_1 || storage->sdmmc->id == SDMMC_4)
{
int res;
sd_error_count_increment(SD_ERROR_RW_FAIL);
if (first_reinit)
res = sd_initialize(true);
else
if (storage->sdmmc->id == SDMMC_1)
{
res = sd_init_retry(true);
if (!res)
sd_error_count_increment(SD_ERROR_INIT_FAIL);
sd_error_count_increment(SD_ERROR_RW_FAIL);
if (first_reinit)
res = sd_initialize(true);
else
{
res = sd_init_retry(true);
if (!res)
sd_error_count_increment(SD_ERROR_INIT_FAIL);
}
}
else if (storage->sdmmc->id == SDMMC_4)
{
emmc_error_count_increment(EMMC_ERROR_RW_FAIL);
if (first_reinit)
res = emmc_initialize(true);
else
{
res = emmc_init_retry(true);
if (!res)
emmc_error_count_increment(EMMC_ERROR_INIT_FAIL);
}
}
// Reset values for a retry.
@@ -285,7 +302,7 @@ reinit_try:
retries = 3;
first_reinit = false;
// If succesful reinit, restart xfer.
// If successful reinit, restart xfer.
if (res)
{
bbuf = (u8 *)buf;

4
bdk/storage/sdmmc_driver.c
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018-2021 CTCaer
* Copyright (c) 2018-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -34,7 +34,7 @@
//#define ERROR_EXTRA_PRINTING
#define DPRINTF(...)
#ifdef NYX
#ifdef BDK_SDMMC_OC_AND_EXTRA_PRINT
#define ERROR_EXTRA_PRINTING
#define SDMMC_EMMC_OC
#endif

238
bdk/usb/usb_descriptor_types.h
View File

@@ -1,238 +0,0 @@
/*
* USB driver for Tegra X1
*
* Copyright (c) 2019-2020 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _USB_DESCRIPTORS_TYPES_H_
#define _USB_DESCRIPTORS_TYPES_H_
#include <utils/types.h>
typedef enum {
USB_DESCRIPTOR_DEVICE = 1,
USB_DESCRIPTOR_CONFIGURATION = 2,
USB_DESCRIPTOR_STRING = 3,
USB_DESCRIPTOR_INTERFACE = 4,
USB_DESCRIPTOR_ENDPOINT = 5,
USB_DESCRIPTOR_DEVICE_QUALIFIER = 6,
USB_DESCRIPTOR_OTHER_SPEED_CONFIGURATION = 7,
USB_DESCRIPTOR_INTERFACE_POWER = 8,
USB_DESCRIPTOR_INTERFACE_OTG = 9,
USB_DESCRIPTOR_DEVICE_BINARY_OBJECT = 15,
USB_DESCRIPTOR_DEVICE_BINARY_OBJECT_CAP = 16,
USB_DESCRIPTOR_HID = 33,
USB_DESCRIPTOR_HID_REPORT = 34
} usb_desc_type_t;
typedef enum {
USB_DESCRIPTOR_MS_COMPAT_ID = 4,
USB_DESCRIPTOR_MS_EXTENDED_PROPERTIES = 5
} usb_vendor_desc_type_t;
typedef enum {
USB_ATTR_REMOTE_WAKE_UP = 0x20,
USB_ATTR_SELF_POWERED = 0x40,
USB_ATTR_BUS_POWERED_RSVD = 0x80
} usb_cfg_attr_type_t;
typedef enum
{
USB_EP_TYPE_CTRL = 0,
USB_EP_TYPE_ISO = 1,
USB_EP_TYPE_BULK = 2,
USB_EP_TYPE_INTR = 3
} usb_cfg_ep_type_t;
/* Device descriptor structure */
typedef struct _usb_dev_descr_t
{
u8 bLength; // Size of this descriptor in bytes.
u8 bDescriptorType; // Device Descriptor Type. (USB_DESCRIPTOR_DEVICE)
u16 bcdUSB; // USB Spec. Release number (2.1).
u8 bDeviceClass; // Class is specified in the interface descriptor.
u8 bDeviceSubClass; // SubClass is specified in the interface descriptor.
u8 bDeviceProtocol; // Protocol is specified in the interface descriptor.
u8 bMaxPacketSize; // Maximum packet size for EP0.
u16 idVendor; // Vendor ID assigned by USB forum.
u16 idProduct; // Product ID assigned by Organization.
u16 bcdDevice; // Device Release number in BCD.
u8 iManufacturer; // Index of String descriptor describing Manufacturer.
u8 iProduct; // Index of String descriptor describing Product.
u8 iSerialNumber; // Index of String descriptor describing Serial number.
u8 bNumConfigs; // Number of possible configuration.
} __attribute__((packed)) usb_dev_descr_t;
/* Device Qualifier descriptor structure */
typedef struct _usb_dev_qual_descr_t
{
u8 bLength; // Size of this descriptor in bytes.
u8 bDescriptorType; // Device Descriptor Type. (USB_DESCRIPTOR_DEVICE_QUALIFIER)
u16 bcdUSB; // USB Spec. Release number (2.1).
u8 bDeviceClass; // Class is specified in the interface descriptor.
u8 bDeviceSubClass; // SubClass is specified in the interface descriptor.
u8 bDeviceProtocol; // Protocol is specified in the interface descriptor.
u8 bMaxPacketSize; // Maximum packet size for EP0.
u8 bNumOtherConfigs; // Number of possible other-speed configurations.
u8 bReserved; // Reserved for future use, must be zero
} __attribute__((packed)) usb_dev_qual_descr_t;
/* Configuration descriptor structure */
typedef struct _usb_cfg_descr_t
{
u8 bLength; // Length of this descriptor.
u8 bDescriptorType; // CONFIGURATION descriptor type (USB_DESCRIPTOR_CONFIGURATION).
u16 wTotalLength; // Total length of all descriptors for this configuration.
u8 bNumInterfaces; // Number of interfaces in this configuration.
u8 bConfigurationValue; // Value of this configuration (1 based).
u8 iConfiguration; // Index of String Descriptor describing the configuration.
u8 bmAttributes; // Configuration characteristics.
u8 bMaxPower; // Maximum power consumed by this configuration.
} __attribute__((packed)) usb_cfg_descr_t;
/* Interface descriptor structure */
typedef struct _usb_inter_descr_t
{
u8 bLength; // Length of this descriptor.
u8 bDescriptorType; // INTERFACE descriptor type (USB_DESCRIPTOR_INTERFACE).
u8 bInterfaceNumber; // Number of this interface (0 based).
u8 bAlternateSetting; // Value of this alternate interface setting.
u8 bNumEndpoints; // Number of endpoints in this interface.
u8 bInterfaceClass; // Class code (assigned by the USB-IF).
u8 bInterfaceSubClass; // Subclass code (assigned by the USB-IF).
u8 bInterfaceProtocol; // Protocol code (assigned by the USB-IF).
u8 iInterface; // Index of String Descriptor describing the interface.
} __attribute__((packed)) usb_inter_descr_t;
/* HID descriptor structure */
typedef struct _usb_hid_descr_t
{
u8 bLength; // Length of this descriptor.
u8 bDescriptorType; // INTERFACE descriptor type (USB_DESCRIPTOR_HID).
u16 bcdHID; // HID class specification release
u8 bCountryCode; // Country code.
u8 bNumDescriptors; // Number of descriptors.
u8 bClassDescriptorType; // Type of class descriptor (USB_DESCRIPTOR_HID_REPORT).
u16 bDescriptorLength; // Report descriptor length.
} __attribute__((packed)) usb_hid_descr_t;
/* Endpoint descriptor structure */
typedef struct _usb_ep_descr_t
{
u8 bLength; // Length of this descriptor.
u8 bDescriptorType; // ENDPOINT descriptor type (USB_DESCRIPTOR_ENDPOINT).
u8 bEndpointAddress; // Endpoint address. bit7 indicates direction (0=OUT, 1=IN).
u8 bmAttributes; // Endpoint transfer type.
u16 wMaxPacketSize; // Maximum packet size.
u8 bInterval; // Polling interval in frames. For Interrupt and Isochronous data transfer only.
} __attribute__((packed)) usb_ep_descr_t;
typedef struct _usb_cfg_simple_descr_t
{
usb_cfg_descr_t config;
usb_inter_descr_t interface;
usb_ep_descr_t endpoint[2];
} __attribute__((packed)) usb_cfg_simple_descr_t;
typedef struct _usb_cfg_hid_descr_t
{
usb_cfg_descr_t config;
usb_inter_descr_t interface;
usb_hid_descr_t hid;
usb_ep_descr_t endpoint[2];
} __attribute__((packed)) usb_cfg_hid_descr_t;
typedef struct _usb_dev_bot_t
{
u8 bLength; // Size of this descriptor in bytes.
u8 bDescriptorType; // Device Descriptor Type. (USB_DESCRIPTOR_DEVICE_BINARY_OBJECT)
u16 wTotalLength; // Size of this descriptor in bytes.
u8 bNumDeviceCaps; // Number of device capabilities in this descriptor.
/* Device Capability USB 2.0 Extension Descriptor */
/* Needed for a USB2.10 device. */
u8 bLengthCap0; // Size of this capability descriptor in bytes.
u8 bDescriptorTypeCap0; // Device Capability Descriptor Type. (USB_DESCRIPTOR_DEVICE_BINARY_OBJECT_CAP)
u8 bDevCapabilityTypeCap0; // USB2: 2.
u32 bmAttributesCap0; // bit1: Link Power Management (LPM).
u8 bLengthCap1; // Size of this capability descriptor in bytes.
u8 bDescriptorTypeCap1; // Device Capability Descriptor Type. (USB_DESCRIPTOR_DEVICE_BINARY_OBJECT_CAP)
u8 bDevCapabilityTypeCap1; // USB3: 3.
u8 bmAttributesCap1; // bit1: Latency Tolerance Messaging (LTM).
u16 wSpeedsSupported; // Supported bus speeds. 1: Low Speed, 2: Full Speed, 4: High Speed, 8: Super Speed.
u8 bFunctionalitySupport; // Lowest speed at which all the functionality is available. 1: Full speed and above.
u8 bU1DevExitLat; // USB3.0 U1 exit latency.
u16 wU2DevExitLat; // USB3.0 U2 exit latency.
} __attribute__((packed)) usb_dev_bot_t;
/* Microsoft OS String descriptor structure */
typedef struct _usb_ms_os_descr_t
{
u8 bLength; // 0x12
u8 bDescriptorType; // 3
u16 wSignature[7]; // "MSFT100" UTF16 LE
u8 bVendorCode; //
u8 bPadding;
} __attribute__((packed)) usb_ms_os_descr_t;
/* Microsoft Compatible ID Feature descriptor structure */
typedef struct _usb_ms_cid_descr_t
{
u32 dLength;
u16 wVersion;
u16 wCompatibilityId;
u8 bSections;
u8 bReserved0[7];
u8 bInterfaceNumber;
u8 bReserved1;
u8 bCompatibleId[8];
u8 bSubCompatibleId[8];
u8 bReserved2[6];
} __attribute__((packed)) usb_ms_cid_descr_t;
/* Microsoft Extended Properties Feature descriptor structure */
typedef struct _usb_ms_ext_prop_descr_t
{
u32 dLength;
u16 wVersion;
u16 wExtendedProperty;
u16 wSections;
u32 dPropertySize;
u32 dPropertyType;
u16 wPropertyNameLength;
u16 wPropertyName[22]; // UTF16 LE
u32 dPropertyDataLength;
u16 wPropertyData[2]; // UTF16 LE
} __attribute__((packed)) usb_ms_ext_prop_descr_t;
typedef struct _usb_desc_t
{
usb_dev_descr_t *dev;
usb_dev_qual_descr_t *dev_qual;
usb_cfg_simple_descr_t *cfg;
usb_cfg_simple_descr_t *cfg_other;
usb_dev_bot_t *dev_bot;
u8 *vendor;
u8 *product;
u8 *serial;
u8 *lang_id;
usb_ms_os_descr_t *ms_os;
usb_ms_cid_descr_t *ms_cid;
usb_ms_ext_prop_descr_t *mx_ext;
} usb_desc_t;
#endif

558
bdk/usb/usb_descriptors.c
View File

@@ -1,558 +0,0 @@
/*
* USB driver for Tegra X1
*
* Copyright (c) 2019-2020 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <usb/usb_descriptor_types.h>
#include <utils/types.h>
static usb_dev_descr_t usb_device_descriptor_ums =
{
.bLength = 18,
.bDescriptorType = USB_DESCRIPTOR_DEVICE,
.bcdUSB = 0x210,
.bDeviceClass = 0x00,
.bDeviceSubClass = 0x00,
.bDeviceProtocol = 0x00,
.bMaxPacketSize = 0x40,
.idVendor = 0x11EC, // Nintendo: 0x057E, Nvidia: 0x0955
.idProduct = 0xA7E0, // Switch: 0x2000, usbd: 0x3000
.bcdDevice = 0x0101,
.iManufacturer = 1,
.iProduct = 2,
.iSerialNumber = 3,
.bNumConfigs = 1
};
static usb_dev_qual_descr_t usb_device_qualifier_descriptor =
{
.bLength = 10,
.bDescriptorType = USB_DESCRIPTOR_DEVICE_QUALIFIER,
.bcdUSB = 0x210,
.bDeviceClass = 0x00,
.bDeviceSubClass = 0x00,
.bDeviceProtocol = 0x00,
.bMaxPacketSize = 0x40,
.bNumOtherConfigs = 0x01,
.bReserved = 0x00
};
static usb_cfg_simple_descr_t usb_configuration_descriptor_ums =
{
/* Configuration descriptor structure */
.config.bLength = 9,
.config.bDescriptorType = USB_DESCRIPTOR_CONFIGURATION,
.config.wTotalLength = 0x20,
.config.bNumInterfaces = 0x01,
.config.bConfigurationValue = 0x01,
.config.iConfiguration = 0x00,
.config.bmAttributes = USB_ATTR_SELF_POWERED | USB_ATTR_BUS_POWERED_RSVD,
.config.bMaxPower = 32 / 2,
/* Interface descriptor structure */
.interface.bLength = 9,
.interface.bDescriptorType = USB_DESCRIPTOR_INTERFACE,
.interface.bInterfaceNumber = 0,
.interface.bAlternateSetting = 0,
.interface.bNumEndpoints = 2,
.interface.bInterfaceClass = 0x08, // Mass Storage Class.
.interface.bInterfaceSubClass = 0x06, // SCSI Transparent Command Set.
.interface.bInterfaceProtocol = 0x50, // Bulk-Only Transport.
.interface.iInterface = 0x00,
/* Endpoint descriptor structure EP1 IN */
.endpoint[0].bLength = 7,
.endpoint[0].bDescriptorType = USB_DESCRIPTOR_ENDPOINT,
.endpoint[0].bEndpointAddress = 0x81, // USB_EP_ADDR_BULK_IN.
.endpoint[0].bmAttributes = USB_EP_TYPE_BULK,
.endpoint[0].wMaxPacketSize = 0x200,
.endpoint[0].bInterval = 0x00,
/* Endpoint descriptor structure EP1 OUT */
.endpoint[1].bLength = 7,
.endpoint[1].bDescriptorType = USB_DESCRIPTOR_ENDPOINT,
.endpoint[1].bEndpointAddress = 0x01, // USB_EP_ADDR_BULK_OUT.
.endpoint[1].bmAttributes = USB_EP_TYPE_BULK,
.endpoint[1].wMaxPacketSize = 0x200,
.endpoint[1].bInterval = 0x00
};
static usb_cfg_simple_descr_t usb_other_speed_config_descriptor_ums =
{
/* Other Speed Configuration descriptor structure */
.config.bLength = 9,
.config.bDescriptorType = USB_DESCRIPTOR_OTHER_SPEED_CONFIGURATION,
.config.wTotalLength = 0x20,
.config.bNumInterfaces = 0x01,
.config.bConfigurationValue = 0x01,
.config.iConfiguration = 0x00,
.config.bmAttributes = USB_ATTR_SELF_POWERED | USB_ATTR_BUS_POWERED_RSVD,
.config.bMaxPower = 32 / 2,
/* Interface descriptor structure */
.interface.bLength = 9,
.interface.bDescriptorType = USB_DESCRIPTOR_INTERFACE,
.interface.bInterfaceNumber = 0x00,
.interface.bAlternateSetting = 0x00,
.interface.bNumEndpoints = 2,
.interface.bInterfaceClass = 0x08, // Mass Storage Class.
.interface.bInterfaceSubClass = 0x06, // SCSI Transparent Command Set.
.interface.bInterfaceProtocol = 0x50, // Bulk-Only Transport.
.interface.iInterface = 0x00,
/* Endpoint descriptor structure EP1 IN */
.endpoint[0].bLength = 7,
.endpoint[0].bDescriptorType = USB_DESCRIPTOR_ENDPOINT,
.endpoint[0].bEndpointAddress = 0x81, // USB_EP_ADDR_BULK_IN.
.endpoint[0].bmAttributes = USB_EP_TYPE_BULK,
.endpoint[0].wMaxPacketSize = 0x40,
.endpoint[0].bInterval = 0,
/* Endpoint descriptor structure EP1 OUT */
.endpoint[1].bLength = 7,
.endpoint[1].bDescriptorType = USB_DESCRIPTOR_ENDPOINT,
.endpoint[1].bEndpointAddress = 0x01, // USB_EP_ADDR_BULK_OUT.
.endpoint[1].bmAttributes = USB_EP_TYPE_BULK,
.endpoint[1].wMaxPacketSize = 0x40,
.endpoint[1].bInterval = 0
};
static usb_dev_bot_t usb_device_binary_object_descriptor =
{
.bLength = 5,
.bDescriptorType = USB_DESCRIPTOR_DEVICE_BINARY_OBJECT,
.wTotalLength = 22,
.bNumDeviceCaps = 2,
/* Device Capability USB 2.0 Extension Descriptor */
.bLengthCap0 = 7,
.bDescriptorTypeCap0 = USB_DESCRIPTOR_DEVICE_BINARY_OBJECT_CAP,
.bDevCapabilityTypeCap0 = 2, // USB2.
.bmAttributesCap0 = 0,
/* Device Capability SuperSpeed Descriptor */
/* Needed for a USB2.10 device. */
.bLengthCap1 = 10,
.bDescriptorTypeCap1 = USB_DESCRIPTOR_DEVICE_BINARY_OBJECT_CAP,
.bDevCapabilityTypeCap1 = 3, // USB3.
.bmAttributesCap1 = 0,
.wSpeedsSupported = 0x6, // FS | HS.
.bFunctionalitySupport = 1, // FS and above.
.bU1DevExitLat = 0,
.wU2DevExitLat = 0
};
static u8 usb_lang_id_string_descriptor[4] =
{
4, 3,
0x09, 0x04
};
static u8 usb_serial_string_descriptor[26] =
{
26, 0x03,
'C', 0x00, '7', 0x00, 'C', 0x00, '0', 0x00,
'9', 0x00, '2', 0x00, '4', 0x00, '2', 0x00, 'F', 0x00, '7', 0x00, '0', 0x00, '3', 0x00
};
static u8 usb_vendor_string_descriptor_ums[32] =
{
26, 0x03,
'N', 0, 'y', 0, 'x', 0, ' ', 0, 'U', 0, 'S', 0, 'B', 0, ' ', 0,
'D', 0, 'i', 0, 's', 0, 'k', 0
};
static u8 usb_product_string_descriptor_ums[22] =
{
8, 0x03,
'U', 0, 'M', 0, 'S', 0
};
static usb_ms_os_descr_t usb_ms_os_descriptor =
{
.bLength = 0x28,
.bDescriptorType = 0x03,
.wSignature[0] = 'M',
.wSignature[1] = 'S',
.wSignature[2] = 'F',
.wSignature[3] = 'T',
.wSignature[4] = '1',
.wSignature[5] = '0',
.wSignature[6] = '0',
.bVendorCode = 0x99,
};
static usb_ms_cid_descr_t usb_ms_cid_descriptor =
{
.dLength = 0x28,
.wVersion = 0x100,
.wCompatibilityId = USB_DESCRIPTOR_MS_COMPAT_ID,
.bSections = 1,
.bInterfaceNumber = 0,
.bReserved1 = 1,
.bCompatibleId[0] = 'N',
.bCompatibleId[1] = 'Y',
.bCompatibleId[2] = 'X',
.bCompatibleId[3] = 'U',
.bCompatibleId[4] = 'S',
.bCompatibleId[5] = 'B',
};
static usb_ms_ext_prop_descr_t usb_ms_ext_prop_descriptor_ums =
{
.dLength = 0x48,
.wVersion = 0x100,
.wExtendedProperty = USB_DESCRIPTOR_MS_EXTENDED_PROPERTIES,
.wSections = 1,
.dPropertySize = 0x3E,
.dPropertyType = 4, // DWORD
.wPropertyNameLength = 0x2C,
.wPropertyName[0] = 'M', // MaximumTransferLength.
.wPropertyName[1] = 'a',
.wPropertyName[2] = 'x',
.wPropertyName[3] = 'i',
.wPropertyName[4] = 'm',
.wPropertyName[5] = 'u',
.wPropertyName[6] = 'm',
.wPropertyName[7] = 'T',
.wPropertyName[8] = 'r',
.wPropertyName[9] = 'a',
.wPropertyName[10] = 'n',
.wPropertyName[11] = 's',
.wPropertyName[12] = 'f',
.wPropertyName[13] = 'e',
.wPropertyName[14] = 'r',
.wPropertyName[15] = 'L',
.wPropertyName[16] = 'e',
.wPropertyName[17] = 'n',
.wPropertyName[18] = 'g',
.wPropertyName[19] = 't',
.wPropertyName[20] = 'h',
.wPropertyName[21] = 0,
.dPropertyDataLength = 0x4,
.wPropertyData[0] = 0x00, // 1MB.
.wPropertyData[1] = 0x10,
};
static usb_ms_ext_prop_descr_t usb_ms_ext_prop_descriptor_hid =
{
.dLength = 7,
.wVersion = 0x100,
.wExtendedProperty = USB_DESCRIPTOR_MS_EXTENDED_PROPERTIES,
.wSections = 0,
};
static usb_dev_descr_t usb_device_descriptor_hid_jc =
{
.bLength = 18,
.bDescriptorType = USB_DESCRIPTOR_DEVICE,
.bcdUSB = 0x210,
.bDeviceClass = 0x00,
.bDeviceSubClass = 0x00,
.bDeviceProtocol = 0x00,
.bMaxPacketSize = 0x40,
.idVendor = 0x11EC, // Nintendo: 0x057E, Nvidia: 0x0955
.idProduct = 0xA7E1, // Switch: 0x2000, usbd: 0x3000
.bcdDevice = 0x0101,
.iManufacturer = 1,
.iProduct = 2,
.iSerialNumber = 3,
.bNumConfigs = 1
};
static usb_dev_descr_t usb_device_descriptor_hid_touch =
{
.bLength = 18,
.bDescriptorType = USB_DESCRIPTOR_DEVICE,
.bcdUSB = 0x210,
.bDeviceClass = 0x00,
.bDeviceSubClass = 0x00,
.bDeviceProtocol = 0x00,
.bMaxPacketSize = 0x40,
.idVendor = 0x11EC, // Nintendo: 0x057E, Nvidia: 0x0955
.idProduct = 0xA7E2, // Switch: 0x2000, usbd: 0x3000
.bcdDevice = 0x0101,
.iManufacturer = 1,
.iProduct = 2,
.iSerialNumber = 3,
.bNumConfigs = 1
};
u8 hid_report_descriptor_jc[] =
{
0x05, 0x01, // USAGE_PAGE (Generic Desktop),
0x09, 0x04, // USAGE (Joystick),
0xa1, 0x01, // COLLECTION (Application),
0xa1, 0x02, // COLLECTION (Logical),
0x75, 0x08, // REPORT_SIZE (8),
0x95, 0x04, // REPORT_COUNT (4),
0x15, 0x00, // LOGICAL_MINIMUM (0),
0x26, 0xff, 0x00, // LOGICAL_MAXIMUM (255),
0x35, 0x00, // PHYSICAL_MINIMUM (0),
0x46, 0xff, 0x00, // PHYSICAL_MAXIMUM (255),
0x09, 0x30, // USAGE (X_ID),
0x09, 0x31, // USAGE (Y_ID),
0x09, 0x32, // USAGE (Z_ID),
0x09, 0x35, // USAGE (Rz_ID),
0x81, 0x02, // INPUT (IOF_Variable),
0x75, 0x04, // REPORT_SIZE (4),
0x95, 0x01, // REPORT_COUNT (1),
0x25, 0x07, // LOGICAL_MAXIMUM (7),
0x46, 0x3b, 0x01, // PHYSICAL_MAXIMUM (315),
0x65, 0x14, // UNIT (Eng_Rot_Angular_Pos),
0x09, 0x39, // USAGE (Hat_Switch),
0x81, 0x42, // INPUT (IOF_NullposVar),
0x65, 0x00, // UNIT (Unit_None),
0x75, 0x01, // REPORT_SIZE (1),
0x95, 0x0c, // REPORT_COUNT (12),
0x25, 0x01, // LOGICAL_MAXIMUM (1),
0x45, 0x01, // PHYSICAL_MAXIMUM (1),
0x05, 0x09, // USAGE_PAGE (Button_ID),
0x19, 0x01, // USAGE_MINIMUM (1),
0x29, 0x0c, // USAGE_MAXIMUM (12),
0x81, 0x02, // INPUT (IOF_Variable),
0xc0, // END_COLLECTION(),
0xc0 // END_COLLECTION(),
};
u32 hid_report_descriptor_jc_size = sizeof(hid_report_descriptor_jc);
u8 hid_report_descriptor_touch[] =
{
0x05, 0x0d, // USAGE_PAGE (Digitizers)
0x09, 0x05, // USAGE (Touch Pad)
0xa1, 0x01, // COLLECTION (Application)
0x85, 0x05, // REPORT_ID (Touch pad)
0x09, 0x22, // USAGE (Finger)
0xa1, 0x02, // COLLECTION (Logical)
0x15, 0x00, // LOGICAL_MINIMUM (0)
0x25, 0x01, // LOGICAL_MAXIMUM (1)
0x09, 0x42, // USAGE (Tip switch)
0x95, 0x01, // REPORT_COUNT (1)
0x75, 0x01, // REPORT_SIZE (1)
0x81, 0x02, // INPUT (Data,Var,Abs)
0x15, 0x00, // LOGICAL_MINIMUM (1)
0x25, 0x01, // LOGICAL_MAXIMUM (1)
0x75, 0x01, // REPORT_SIZE (1)
0x95, 0x07, // REPORT_COUNT (7)
0x09, 0x54, // USAGE (Contact Count)
0x81, 0x02, // INPUT (Data,Var,Abs)
0x95, 0x01, // REPORT_COUNT (1)
0x75, 0x08, // REPORT_SIZE (8)
0x15, 0x00, // LOGICAL_MINIMUM (0)
0x25, 0x0A, // LOGICAL_MAXIMUM (10)
0x09, 0x51, // USAGE (Contact Identifier)
0x81, 0x02, // INPUT (Data,Var,Abs)
// 0x15, 0x00, // LOGICAL_MINIMUM (0)
// 0x26, 0xF8, 0x2A, // LOGICAL_MAXIMUM (11000)
// 0x95, 0x01, // REPORT_COUNT (1)
// 0x75, 0x08, // REPORT_SIZE (16)
// 0x09, 0x30, // USAGE (Pressure)
// 0x81, 0x02, // INPUT (Data,Var,Abs)
0x05, 0x01, // USAGE_PAGE (Generic Desk..
0x15, 0x00, // LOGICAL_MINIMUM (0)
0x26, 0xff, 0x04, // LOGICAL_MAXIMUM (1279)
0x75, 0x10, // REPORT_SIZE (16)
0x55, 0x0e, // UNIT_EXPONENT (-2)
0x65, 0x13, // UNIT(Inch,EngLinear)
0x09, 0x30, // USAGE (X)
0x35, 0x00, // PHYSICAL_MINIMUM (0)
0x46, 0xFF, 0x04, // PHYSICAL_MAXIMUM (1279)
0x95, 0x01, // REPORT_COUNT (1)
0x81, 0x02, // INPUT (Data,Var,Abs)
0x26, 0xCF, 0x02, // LOGICAL_MAXIMUM (719)
0x46, 0xCF, 0x02, // PHYSICAL_MAXIMUM (719)
0x09, 0x31, // USAGE (Y)
0x81, 0x02, // INPUT (Data,Var,Abs)
0x05, 0x0d, // USAGE PAGE (Digitizers)
0xc0, // END_COLLECTION
0xc0, // END_COLLECTION
};
u32 hid_report_descriptor_touch_size = sizeof(hid_report_descriptor_touch);
static usb_cfg_hid_descr_t usb_configuration_descriptor_hid_jc =
{
/* Configuration descriptor structure */
.config.bLength = 9,
.config.bDescriptorType = USB_DESCRIPTOR_CONFIGURATION,
.config.wTotalLength = sizeof(usb_cfg_hid_descr_t),
.config.bNumInterfaces = 0x01,
.config.bConfigurationValue = 0x01,
.config.iConfiguration = 0x00,
.config.bmAttributes = USB_ATTR_SELF_POWERED | USB_ATTR_BUS_POWERED_RSVD,
.config.bMaxPower = 32 / 2,
/* Interface descriptor structure */
.interface.bLength = 9,
.interface.bDescriptorType = USB_DESCRIPTOR_INTERFACE,
.interface.bInterfaceNumber = 0,
.interface.bAlternateSetting = 0,
.interface.bNumEndpoints = 2,
.interface.bInterfaceClass = 0x03, // Human Interface Device Class.
.interface.bInterfaceSubClass = 0x00, // SCSI Transparent Command Set.
.interface.bInterfaceProtocol = 0x00, // Bulk-Only Transport.
.interface.iInterface = 0x00,
.hid.bLength = 9,
.hid.bDescriptorType = USB_DESCRIPTOR_HID,
.hid.bcdHID = 0x110,
.hid.bCountryCode = 0,
.hid.bNumDescriptors = 1,
.hid.bClassDescriptorType = USB_DESCRIPTOR_HID_REPORT,
.hid.bDescriptorLength = sizeof(hid_report_descriptor_jc),
/* Endpoint descriptor structure EP1 IN */
.endpoint[0].bLength = 7,
.endpoint[0].bDescriptorType = USB_DESCRIPTOR_ENDPOINT,
.endpoint[0].bEndpointAddress = 0x81, // USB_EP_ADDR_BULK_IN.
.endpoint[0].bmAttributes = USB_EP_TYPE_INTR,
.endpoint[0].wMaxPacketSize = 0x200,
.endpoint[0].bInterval = 4, // 8ms on HS.
/* Endpoint descriptor structure EP1 OUT */
.endpoint[1].bLength = 7,
.endpoint[1].bDescriptorType = USB_DESCRIPTOR_ENDPOINT,
.endpoint[1].bEndpointAddress = 0x01, // USB_EP_ADDR_BULK_OUT.
.endpoint[1].bmAttributes = USB_EP_TYPE_INTR,
.endpoint[1].wMaxPacketSize = 0x200,
.endpoint[1].bInterval = 4 // 8ms on HS.
};
static u8 usb_vendor_string_descriptor_hid[22] =
{
16, 0x03,
'N', 0, 'y', 0, 'x', 0, ' ', 0,
'U', 0, 'S', 0, 'B', 0
};
static u8 usb_product_string_descriptor_hid_jc[24] =
{
24, 0x03,
'N', 0, 'y', 0, 'x', 0, ' ', 0,
'J', 0, 'o', 0, 'y', 0, '-', 0, 'C', 0, 'o', 0, 'n', 0
};
static u8 usb_product_string_descriptor_hid_touch[26] =
{
26, 0x03,
'N', 0, 'y', 0, 'x', 0, ' ', 0,
'T', 0, 'o', 0, 'u', 0, 'c', 0, 'h', 0, 'p', 0, 'a', 0, 'd', 0
};
static usb_cfg_hid_descr_t usb_configuration_descriptor_hid_touch =
{
/* Configuration descriptor structure */
.config.bLength = 9,
.config.bDescriptorType = USB_DESCRIPTOR_CONFIGURATION,
.config.wTotalLength = sizeof(usb_cfg_hid_descr_t),
.config.bNumInterfaces = 0x01,
.config.bConfigurationValue = 0x01,
.config.iConfiguration = 0x00,
.config.bmAttributes = USB_ATTR_SELF_POWERED | USB_ATTR_BUS_POWERED_RSVD,
.config.bMaxPower = 32 / 2,
/* Interface descriptor structure */
.interface.bLength = 9,
.interface.bDescriptorType = USB_DESCRIPTOR_INTERFACE,
.interface.bInterfaceNumber = 0,
.interface.bAlternateSetting = 0,
.interface.bNumEndpoints = 2,
.interface.bInterfaceClass = 0x03, // Human Interface Device Class.
.interface.bInterfaceSubClass = 0x00, // SCSI Transparent Command Set.
.interface.bInterfaceProtocol = 0x00, // Bulk-Only Transport.
.interface.iInterface = 0x00,
.hid.bLength = 9,
.hid.bDescriptorType = USB_DESCRIPTOR_HID,
.hid.bcdHID = 0x111,
.hid.bCountryCode = 0,
.hid.bNumDescriptors = 1,
.hid.bClassDescriptorType = USB_DESCRIPTOR_HID_REPORT,
.hid.bDescriptorLength = sizeof(hid_report_descriptor_touch),
/* Endpoint descriptor structure EP1 IN */
.endpoint[0].bLength = 7,
.endpoint[0].bDescriptorType = USB_DESCRIPTOR_ENDPOINT,
.endpoint[0].bEndpointAddress = 0x81, // USB_EP_ADDR_BULK_IN.
.endpoint[0].bmAttributes = USB_EP_TYPE_INTR,
.endpoint[0].wMaxPacketSize = 0x200,
.endpoint[0].bInterval = 3, // 4ms on HS.
/* Endpoint descriptor structure EP1 OUT */
.endpoint[1].bLength = 7,
.endpoint[1].bDescriptorType = USB_DESCRIPTOR_ENDPOINT,
.endpoint[1].bEndpointAddress = 0x01, // USB_EP_ADDR_BULK_OUT.
.endpoint[1].bmAttributes = USB_EP_TYPE_INTR,
.endpoint[1].wMaxPacketSize = 0x200,
.endpoint[1].bInterval = 3 // 4ms on HS.
};
usb_desc_t usb_gadget_ums_descriptors =
{
.dev = &usb_device_descriptor_ums,
.dev_qual = &usb_device_qualifier_descriptor,
.cfg = &usb_configuration_descriptor_ums,
.cfg_other = &usb_other_speed_config_descriptor_ums,
.dev_bot = &usb_device_binary_object_descriptor,
.vendor = usb_vendor_string_descriptor_ums,
.product = usb_product_string_descriptor_ums,
.serial = usb_serial_string_descriptor,
.lang_id = usb_lang_id_string_descriptor,
.ms_os = &usb_ms_os_descriptor,
.ms_cid = &usb_ms_cid_descriptor,
.mx_ext = &usb_ms_ext_prop_descriptor_ums
};
usb_desc_t usb_gadget_hid_jc_descriptors =
{
.dev = &usb_device_descriptor_hid_jc,
.dev_qual = &usb_device_qualifier_descriptor,
.cfg = (usb_cfg_simple_descr_t *)&usb_configuration_descriptor_hid_jc,
.cfg_other = NULL,
.dev_bot = &usb_device_binary_object_descriptor,
.vendor = usb_vendor_string_descriptor_hid,
.product = usb_product_string_descriptor_hid_jc,
.serial = usb_serial_string_descriptor,
.lang_id = usb_lang_id_string_descriptor,
.ms_os = &usb_ms_os_descriptor,
.ms_cid = &usb_ms_cid_descriptor,
.mx_ext = &usb_ms_ext_prop_descriptor_hid
};
usb_desc_t usb_gadget_hid_touch_descriptors =
{
.dev = &usb_device_descriptor_hid_touch,
.dev_qual = &usb_device_qualifier_descriptor,
.cfg = (usb_cfg_simple_descr_t *)&usb_configuration_descriptor_hid_touch,
.cfg_other = NULL,
.dev_bot = &usb_device_binary_object_descriptor,
.vendor = usb_vendor_string_descriptor_hid,
.product = usb_product_string_descriptor_hid_touch,
.serial = usb_serial_string_descriptor,
.lang_id = usb_lang_id_string_descriptor,
.ms_os = &usb_ms_os_descriptor,
.ms_cid = &usb_ms_cid_descriptor,
.mx_ext = &usb_ms_ext_prop_descriptor_hid
};

441
bdk/usb/usb_gadget_hid.c
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@@ -1,441 +0,0 @@
/*
* USB Gadget HID driver for Tegra X1
*
* Copyright (c) 2019-2020 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <string.h>
#include <usb/usbd.h>
#include <gfx_utils.h>
#include <input/joycon.h>
#include <input/touch.h>
#include <soc/hw_init.h>
#include <soc/t210.h>
#include <utils/util.h>
#include <memory_map.h>
//#define DPRINTF(...) gfx_printf(__VA_ARGS__)
#define DPRINTF(...)
typedef struct _gamepad_report_t
{
u8 x;
u8 y;
u8 z;
u8 rz;
u8 hat:4;
u8 btn1:1;
u8 btn2:1;
u8 btn3:1;
u8 btn4:1;
u8 btn5:1;
u8 btn6:1;
u8 btn7:1;
u8 btn8:1;
u8 btn9:1;
u8 btn10:1;
u8 btn11:1;
u8 btn12:1;
} __attribute__((packed)) gamepad_report_t;
typedef struct _jc_cal_t
{
bool cl_done;
bool cr_done;
u16 clx_max;
u16 clx_min;
u16 cly_max;
u16 cly_min;
u16 crx_max;
u16 crx_min;
u16 cry_max;
u16 cry_min;
} jc_cal_t;
static jc_cal_t jc_cal_ctx;
static usb_ops_t usb_ops;
static bool _jc_calibration(jc_gamepad_rpt_t *jc_pad)
{
// Calibrate left stick.
if (!jc_cal_ctx.cl_done)
{
if (jc_pad->conn_l
&& jc_pad->lstick_x > 0x400 && jc_pad->lstick_y > 0x400
&& jc_pad->lstick_x < 0xC00 && jc_pad->lstick_y < 0xC00)
{
jc_cal_ctx.clx_max = jc_pad->lstick_x + 0x72;
jc_cal_ctx.clx_min = jc_pad->lstick_x - 0x72;
jc_cal_ctx.cly_max = jc_pad->lstick_y + 0x72;
jc_cal_ctx.cly_min = jc_pad->lstick_y - 0x72;
jc_cal_ctx.cl_done = true;
}
else
return false;
}
// Calibrate right stick.
if (!jc_cal_ctx.cr_done)
{
if (jc_pad->conn_r
&& jc_pad->rstick_x > 0x400 && jc_pad->rstick_y > 0x400
&& jc_pad->rstick_x < 0xC00 && jc_pad->rstick_y < 0xC00)
{
jc_cal_ctx.crx_max = jc_pad->rstick_x + 0x72;
jc_cal_ctx.crx_min = jc_pad->rstick_x - 0x72;
jc_cal_ctx.cry_max = jc_pad->rstick_y + 0x72;
jc_cal_ctx.cry_min = jc_pad->rstick_y - 0x72;
jc_cal_ctx.cr_done = true;
}
else
return false;
}
return true;
}
static bool _jc_poll(gamepad_report_t *rpt)
{
// Poll Joy-Con.
jc_gamepad_rpt_t *jc_pad = joycon_poll();
if (!jc_pad)
return false;
// Exit emulation if Left stick and Home are pressed.
if (jc_pad->l3 && jc_pad->home)
return true;
if (!jc_cal_ctx.cl_done || !jc_cal_ctx.cr_done)
{
if (!_jc_calibration(jc_pad))
return false;
}
// Re-calibrate on disconnection.
if (!jc_pad->conn_l)
jc_cal_ctx.cl_done = false;
if (!jc_pad->conn_r)
jc_cal_ctx.cr_done = false;
// Calculate left analog stick.
if (jc_pad->lstick_x <= jc_cal_ctx.clx_max && jc_pad->lstick_x >= jc_cal_ctx.clx_min)
rpt->x = 0x7F;
else if (jc_pad->lstick_x > jc_cal_ctx.clx_max)
{
u16 x_raw = (jc_pad->lstick_x - jc_cal_ctx.clx_max) / 7;
if (x_raw > 0x7F)
x_raw = 0x7F;
rpt->x = 0x7F + x_raw;
}
else
{
u16 x_raw = (jc_cal_ctx.clx_min - jc_pad->lstick_x) / 7;
if (x_raw > 0x7F)
x_raw = 0x7F;
rpt->x = 0x7F - x_raw;
}
if (jc_pad->lstick_y <= jc_cal_ctx.cly_max && jc_pad->lstick_y >= jc_cal_ctx.cly_min)
rpt->y = 0x7F;
else if (jc_pad->lstick_y > jc_cal_ctx.cly_max)
{
u16 y_raw = (jc_pad->lstick_y - jc_cal_ctx.cly_max) / 7;
if (y_raw > 0x7F)
y_raw = 0x7F;
rpt->y = 0x7F - y_raw;
}
else
{
u16 y_raw = (jc_cal_ctx.cly_min - jc_pad->lstick_y) / 7;
if (y_raw > 0x7F)
y_raw = 0x7F;
rpt->y = 0x7F + y_raw;
}
// Calculate right analog stick.
if (jc_pad->rstick_x <= jc_cal_ctx.crx_max && jc_pad->rstick_x >= jc_cal_ctx.crx_min)
rpt->z = 0x7F;
else if (jc_pad->rstick_x > jc_cal_ctx.crx_max)
{
u16 x_raw = (jc_pad->rstick_x - jc_cal_ctx.crx_max) / 7;
if (x_raw > 0x7F)
x_raw = 0x7F;
rpt->z = 0x7F + x_raw;
}
else
{
u16 x_raw = (jc_cal_ctx.crx_min - jc_pad->rstick_x) / 7;
if (x_raw > 0x7F)
x_raw = 0x7F;
rpt->z = 0x7F - x_raw;
}
if (jc_pad->rstick_y <= jc_cal_ctx.cry_max && jc_pad->rstick_y >= jc_cal_ctx.cry_min)
rpt->rz = 0x7F;
else if (jc_pad->rstick_y > jc_cal_ctx.cry_max)
{
u16 y_raw = (jc_pad->rstick_y - jc_cal_ctx.cry_max) / 7;
if (y_raw > 0x7F)
y_raw = 0x7F;
rpt->rz = 0x7F - y_raw;
}
else
{
u16 y_raw = (jc_cal_ctx.cry_min - jc_pad->rstick_y) / 7;
if (y_raw > 0x7F)
y_raw = 0x7F;
rpt->rz = 0x7F + y_raw;
}
// Set D-pad.
switch ((jc_pad->buttons >> 16) & 0xF)
{
case 0: // none
rpt->hat = 0xF;
break;
case 1: // down
rpt->hat = 4;
break;
case 2: // up
rpt->hat = 0;
break;
case 4: // right
rpt->hat = 2;
break;
case 5: // down + right
rpt->hat = 3;
break;
case 6: // up + right
rpt->hat = 1;
break;
case 8: // left
rpt->hat = 6;
break;
case 9: // down + left
rpt->hat = 5;
break;
case 10: // up + left
rpt->hat = 7;
break;
default:
rpt->hat = 0xF;
break;
}
// Set buttons.
rpt->btn1 = jc_pad->b; // x.
rpt->btn2 = jc_pad->a; // a.
rpt->btn3 = jc_pad->y; // b.
rpt->btn4 = jc_pad->x; // y.
rpt->btn5 = jc_pad->l;
rpt->btn6 = jc_pad->r;
rpt->btn7 = jc_pad->zl;
rpt->btn8 = jc_pad->zr;
rpt->btn9 = jc_pad->minus;
rpt->btn10 = jc_pad->plus;
rpt->btn11 = jc_pad->l3;
rpt->btn12 = jc_pad->r3;
//rpt->btn13 = jc_pad->cap;
//rpt->btn14 = jc_pad->home;
return false;
}
typedef struct _touchpad_report_t
{
u8 rpt_id;
u8 tip_switch:1;
u8 count:7;
u8 id;
//u16 z;
u16 x;
u16 y;
} __attribute__((packed)) touchpad_report_t;
static bool _fts_touch_read(touchpad_report_t *rpt)
{
static touch_event touchpad;
touch_poll(&touchpad);
rpt->rpt_id = 5;
rpt->count = 1;
// Decide touch enable.
switch (touchpad.type & STMFTS_MASK_EVENT_ID)
{
//case STMFTS_EV_MULTI_TOUCH_ENTER:
case STMFTS_EV_MULTI_TOUCH_MOTION:
rpt->x = touchpad.x;
rpt->y = touchpad.y;
//rpt->z = touchpad.z;
rpt->id = touchpad.fingers ? touchpad.fingers - 1 : 0;
rpt->tip_switch = 1;
break;
case STMFTS_EV_MULTI_TOUCH_LEAVE:
rpt->x = touchpad.x;
rpt->y = touchpad.y;
//rpt->z = touchpad.z;
rpt->id = touchpad.fingers ? touchpad.fingers - 1 : 0;
rpt->tip_switch = 0;
break;
case STMFTS_EV_NO_EVENT:
return false;
}
return true;
}
static u8 _hid_transfer_start(usb_ctxt_t *usbs, u32 len)
{
u8 status = usb_ops.usb_device_ep1_in_write((u8 *)USB_EP_BULK_IN_BUF_ADDR, len, NULL, USB_XFER_SYNCED_CMD);
if (status == USB_ERROR_XFER_ERROR)
{
usbs->set_text(usbs->label, "#FFDD00 Error:# EP IN transfer!");
if (usb_ops.usbd_flush_endpoint)
usb_ops.usbd_flush_endpoint(USB_EP_BULK_IN);
}
// Linux mitigation: If timed out, clear status.
if (status == USB_ERROR_TIMEOUT)
return 0;
return status;
}
static bool _hid_poll_jc(usb_ctxt_t *usbs)
{
if (_jc_poll((gamepad_report_t *)USB_EP_BULK_IN_BUF_ADDR))
return true;
// Send HID report.
if (_hid_transfer_start(usbs, sizeof(gamepad_report_t)))
return true; // EP Error.
return false;
}
static bool _hid_poll_touch(usb_ctxt_t *usbs)
{
_fts_touch_read((touchpad_report_t *)USB_EP_BULK_IN_BUF_ADDR);
// Send HID report.
if (_hid_transfer_start(usbs, sizeof(touchpad_report_t)))
return true; // EP Error.
return false;
}
int usb_device_gadget_hid(usb_ctxt_t *usbs)
{
int res = 0;
u32 gadget_type;
u32 polling_time;
// Get USB Controller ops.
if (hw_get_chip_id() == GP_HIDREV_MAJOR_T210)
usb_device_get_ops(&usb_ops);
else
xusb_device_get_ops(&usb_ops);
if (usbs->type == USB_HID_GAMEPAD)
{
polling_time = 8000;
gadget_type = USB_GADGET_HID_GAMEPAD;
}
else
{
polling_time = 4000;
gadget_type = USB_GADGET_HID_TOUCHPAD;
}
usbs->set_text(usbs->label, "#C7EA46 Status:# Started USB");
if (usb_ops.usb_device_init())
{
usb_ops.usbd_end(false, true);
return 1;
}
usbs->set_text(usbs->label, "#C7EA46 Status:# Waiting for connection");
// Initialize Control Endpoint.
if (usb_ops.usb_device_enumerate(gadget_type))
goto error;
usbs->set_text(usbs->label, "#C7EA46 Status:# Waiting for HID report request");
if (usb_ops.usb_device_class_send_hid_report())
goto error;
usbs->set_text(usbs->label, "#C7EA46 Status:# Started HID emulation");
u32 timer_sys = get_tmr_ms() + 5000;
while (true)
{
u32 timer = get_tmr_us();
// Parse input device.
if (usbs->type == USB_HID_GAMEPAD)
{
if (_hid_poll_jc(usbs))
break;
}
else
{
if (_hid_poll_touch(usbs))
break;
}
// Check for suspended USB in case the cable was pulled.
if (usb_ops.usb_device_get_suspended())
break; // Disconnected.
// Handle control endpoint.
usb_ops.usbd_handle_ep0_ctrl_setup();
// Wait max gadget timing.
timer = get_tmr_us() - timer;
if (timer < polling_time)
usleep(polling_time - timer);
if (timer_sys < get_tmr_ms())
{
usbs->system_maintenance(true);
timer_sys = get_tmr_ms() + 5000;
}
}
usbs->set_text(usbs->label, "#C7EA46 Status:# HID ended");
goto exit;
error:
usbs->set_text(usbs->label, "#FFDD00 Error:# Timed out or canceled");
res = 1;
exit:
usb_ops.usbd_end(true, false);
return res;
}

1949
bdk/usb/usb_gadget_ums.c
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File diff suppressed because it is too large Load Diff

296
bdk/usb/usb_t210.h
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@@ -1,296 +0,0 @@
/*
* Enhanced & eXtensible USB device (EDCI & XDCI) driver for Tegra X1
*
* Copyright (c) 2019-2021 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _USB_T210_H_
#define _USB_T210_H_
#include <utils/types.h>
/* EHCI USB */
/* General USB registers */
#define USB1_IF_USB_SUSP_CTRL 0x400
#define SUSP_CTRL_USB_WAKE_ON_CNNT_EN_DEV BIT(3)
#define SUSP_CTRL_USB_WAKE_ON_DISCON_EN_DEV BIT(4)
#define SUSP_CTRL_USB_PHY_CLK_VALID BIT(7)
#define SUSP_CTRL_UTMIP_RESET BIT(11)
#define SUSP_CTRL_UTMIP_PHY_ENB BIT(12)
#define SUSP_CTRL_UTMIP_UTMIP_SUSPL1_SET BIT(25)
#define USB1_IF_USB_PHY_VBUS_SENSORS 0x404
#define USB1_UTMIP_XCVR_CFG0 0x808
#define USB1_UTMIP_BIAS_CFG0 0x80C
#define USB1_UTMIP_HSRX_CFG0 0x810
#define USB1_UTMIP_HSRX_CFG1 0x814
#define USB1_UTMIP_TX_CFG0 0x820
#define USB1_UTMIP_MISC_CFG1 0x828
#define USB1_UTMIP_DEBOUNCE_CFG0 0x82C
#define USB1_UTMIP_BAT_CHRG_CFG0 0x830
#define BAT_CHRG_CFG0_PWRDOWN_CHRG BIT(0)
#define BAT_CHRG_CFG0_OP_SRC_EN BIT(3)
#define USB1_UTMIP_SPARE_CFG0 0x834
#define USB1_UTMIP_XCVR_CFG1 0x838
#define USB1_UTMIP_BIAS_CFG1 0x83C
#define USB1_UTMIP_BIAS_CFG2 0x850
#define USB1_UTMIP_XCVR_CFG2 0x854
#define USB1_UTMIP_XCVR_CFG3 0x858
/* USB Queue Head Descriptor */
#define USB2_QH_USB2D_QH_EP_BASE (USB_BASE + 0x1000)
#define USB_QHD_EP_CAP_IOS_ENABLE BIT(15)
#define USB_QHD_EP_CAP_MAX_PKT_LEN_MASK 0x7FF
#define USB_QHD_EP_CAP_ZERO_LEN_TERM_DIS BIT(29)
#define USB_QHD_EP_CAP_MULTI_NON_ISO (0 << 30)
#define USB_QHD_EP_CAP_MULTI_1 (1 << 30)
#define USB_QHD_EP_CAP_MULTI_2 (2 << 30)
#define USB_QHD_EP_CAP_MULTI_3 (3 << 30)
#define USB_QHD_TOKEN_XFER_ERROR BIT(3)
#define USB_QHD_TOKEN_BUFFER_ERROR BIT(5)
#define USB_QHD_TOKEN_HALTED BIT(6)
#define USB_QHD_TOKEN_ACTIVE BIT(7)
#define USB_QHD_TOKEN_MULT_OVERR_MASK (2 << 10)
#define USB_QHD_TOKEN_IRQ_ON_COMPLETE BIT(15)
#define USB_QHD_TOKEN_TOTAL_BYTES_SHIFT 16
/* USB_OTG/USB_1 controllers register bits */
#define USB2D_PORTSC1_SUSP BIT(7)
#define USB2D_USBCMD_RUN BIT(0)
#define USB2D_USBCMD_RESET BIT(1)
#define USB2D_USBCMD_ITC_MASK (0xFF << 16)
#define USB2D_USBSTS_UI BIT(0)
#define USB2D_USBSTS_UEI BIT(1)
#define USB2D_USBSTS_PCI BIT(2)
#define USB2D_USBSTS_FRI BIT(3)
#define USB2D_USBSTS_SEI BIT(4)
#define USB2D_USBSTS_AAI BIT(5)
#define USB2D_USBSTS_URI BIT(6)
#define USB2D_USBSTS_SRI BIT(7)
#define USB2D_USBSTS_SLI BIT(8)
#define USB2D_USBMODE_CM_MASK (3 << 0)
#define USB2D_USBMODE_CM_IDLE 0
#define USB2D_USBMODE_CM_RSVD 1
#define USB2D_USBMODE_CM_DEVICE 2
#define USB2D_USBMODE_CM_HOST 3
#define USB2D_ENDPT_STATUS_RX_OFFSET BIT(0)
#define USB2D_ENDPT_STATUS_TX_OFFSET BIT(16)
#define USB2D_ENDPTCTRL_RX_EP_STALL BIT(0)
#define USB2D_ENDPTCTRL_RX_EP_TYPE_CTRL (0 << 2)
#define USB2D_ENDPTCTRL_RX_EP_TYPE_ISO (1 << 2)
#define USB2D_ENDPTCTRL_RX_EP_TYPE_BULK (2 << 2)
#define USB2D_ENDPTCTRL_RX_EP_TYPE_INTR (3 << 2)
#define USB2D_ENDPTCTRL_RX_EP_TYPE_MASK (3 << 2)
#define USB2D_ENDPTCTRL_RX_EP_INHIBIT BIT(5)
#define USB2D_ENDPTCTRL_RX_EP_RESET BIT(6)
#define USB2D_ENDPTCTRL_RX_EP_ENABLE BIT(7)
#define USB2D_ENDPTCTRL_TX_EP_STALL BIT(16)
#define USB2D_ENDPTCTRL_TX_EP_TYPE_CTRL (0 << 18)
#define USB2D_ENDPTCTRL_TX_EP_TYPE_ISO (1 << 18)
#define USB2D_ENDPTCTRL_TX_EP_TYPE_BULK (2 << 18)
#define USB2D_ENDPTCTRL_TX_EP_TYPE_INTR (3 << 18)
#define USB2D_ENDPTCTRL_TX_EP_TYPE_MASK (3 << 18)
#define USB2D_ENDPTCTRL_TX_EP_INHIBIT BIT(21)
#define USB2D_ENDPTCTRL_TX_EP_RESET BIT(22)
#define USB2D_ENDPTCTRL_TX_EP_ENABLE BIT(23)
#define USB2D_HOSTPC1_DEVLC_ASUS BIT(17)
#define USB2D_HOSTPC1_DEVLC_PHCD BIT(22)
#define USB2D_HOSTPC1_DEVLC_PSPD_MASK (3 << 25)
#define USB2D_OTGSC_USB_ID_PULLUP BIT(5)
#define USB2D_OTGSC_USB_IRQ_STS_MASK (0x7F << 16)
/* USB_OTG/USB_1 controllers registers */
typedef struct _t210_usb2d_t
{
vu32 id;
vu32 unk0;
vu32 hw_host;
vu32 hw_device;
vu32 hw_txbuf;
vu32 hw_rxbuf;
vu32 unk1[26];
vu32 gptimer0ld;
vu32 gptimer0ctrl;
vu32 gptimer1ld;
vu32 gptimer1ctrl;
vu32 unk2[28];
vu16 caplength;
vu16 hciversion;
vu32 hcsparams;
vu32 hccparams;
vu32 unk3[5];
vu32 dciversion;
vu32 dccparams;
vu32 extsts;
vu32 usbextintr;
vu32 usbcmd;
vu32 usbsts;
vu32 usbintr;
vu32 frindex;
vu32 unk4;
vu32 periodiclistbase;
vu32 asynclistaddr;
vu32 asyncttsts;
vu32 burstsize;
vu32 txfilltuning;
vu32 unk6;
vu32 icusb_ctrl;
vu32 ulpi_viewport;
vu32 rsvd0[4];
vu32 portsc1;
vu32 rsvd1[15];
vu32 hostpc1_devlc;
vu32 rsvd2[15];
vu32 otgsc;
vu32 usbmode;
vu32 unk10;
vu32 endptnak;
vu32 endptnak_enable;
vu32 endptsetupstat;
vu32 endptprime;
vu32 endptflush;
vu32 endptstatus;
vu32 endptcomplete;
vu32 endptctrl[16];
} t210_usb2d_t;
/* XHCI USB */
/* XUSB DEV XHCI registers */
#define XUSB_DEV_XHCI_DB 0x4
#define XUSB_DEV_XHCI_ERSTSZ 0x8
#define XUSB_DEV_XHCI_ERST0BALO 0x10
#define XUSB_DEV_XHCI_ERST0BAHI 0x14
#define XUSB_DEV_XHCI_ERST1BALO 0x18
#define XUSB_DEV_XHCI_ERST1BAHI 0x1C
#define XUSB_DEV_XHCI_ERDPLO 0x20
#define XHCI_ERDPLO_EHB BIT(3)
#define XUSB_DEV_XHCI_ERDPHI 0x24
#define XUSB_DEV_XHCI_EREPLO 0x28
#define XCHI_ECS BIT(0)
#define XUSB_DEV_XHCI_EREPHI 0x2C
#define XUSB_DEV_XHCI_CTRL 0x30
#define XHCI_CTRL_RUN BIT(0)
#define XHCI_CTRL_LSE BIT(1)
#define XHCI_CTRL_IE BIT(4)
#define XHCI_CTRL_ENABLE BIT(31)
#define XUSB_DEV_XHCI_ST 0x34
#define XHCI_ST_RC BIT(0)
#define XHCI_ST_IP BIT(4)
#define XUSB_DEV_XHCI_RT_IMOD 0x38
#define XUSB_DEV_XHCI_PORTSC 0x3C
#define XHCI_PORTSC_CCS BIT(0)
#define XHCI_PORTSC_PED BIT(1)
#define XHCI_PORTSC_PR BIT(4)
#define XHCI_PORTSC_PLS_MASK (0xF << 5)
#define XHCI_PORTSC_PLS_U0 (0 << 5)
#define XHCI_PORTSC_PLS_U1 (1 << 5)
#define XHCI_PORTSC_PLS_U2 (2 << 5)
#define XHCI_PORTSC_PLS_U3 (3 << 5)
#define XHCI_PORTSC_PLS_DISABLED (4 << 5)
#define XHCI_PORTSC_PLS_RXDETECT (5 << 5)
#define XHCI_PORTSC_PLS_INACTIVE (6 << 5)
#define XHCI_PORTSC_PLS_POLLING (7 << 5)
#define XHCI_PORTSC_PLS_RECOVERY (8 << 5)
#define XHCI_PORTSC_PLS_HOTRESET (9 << 5)
#define XHCI_PORTSC_PLS_COMPLIANCE (10 << 5)
#define XHCI_PORTSC_PLS_LOOPBACK (11 << 5)
#define XHCI_PORTSC_PLS_RESUME (15 << 5)
#define XHCI_PORTSC_PS (0xF << 10)
#define XHCI_PORTSC_LWS BIT(16)
#define XHCI_PORTSC_CSC BIT(17)
#define XHCI_PORTSC_WRC BIT(19)
#define XHCI_PORTSC_PRC BIT(21)
#define XHCI_PORTSC_PLC BIT(22)
#define XHCI_PORTSC_CEC BIT(23)
#define XHCI_PORTSC_WPR BIT(30)
#define XUSB_DEV_XHCI_ECPLO 0x40
#define XUSB_DEV_XHCI_ECPHI 0x44
#define XUSB_DEV_XHCI_EP_HALT 0x50
#define XHCI_EP_HALT_DCI_EP0_IN BIT(0)
#define XUSB_DEV_XHCI_EP_PAUSE 0x54
#define XUSB_DEV_XHCI_EP_RELOAD 0x58
#define XUSB_DEV_XHCI_EP_STCHG 0x5C
#define XUSB_DEV_XHCI_PORTHALT 0x6C
#define XUSB_DEV_XHCI_EP_STOPPED 0x78
#define XHCI_PORTHALT_HALT_LTSSM BIT(0)
#define XHCI_PORTHALT_STCHG_REQ BIT(20)
#define XUSB_DEV_XHCI_CFG_DEV_FE 0x85C
#define XHCI_CFG_DEV_FE_PORTREGSEL_MASK (3 << 0)
#define XHCI_CFG_DEV_FE_PORTREGSEL_SS (1 << 0)
#define XHCI_CFG_DEV_FE_PORTREGSEL_HSFS (2 << 0)
/* XUSB DEV PCI registers */
#define XUSB_CFG_1 0x4
#define CFG_1_IO_SPACE BIT(0)
#define CFG_1_MEMORY_SPACE BIT(1)
#define CFG_1_BUS_MASTER BIT(2)
#define XUSB_CFG_4 0x10
#define CFG_4_ADDRESS_TYPE_32_BIT (0 << 1)
#define CFG_4_ADDRESS_TYPE_64_BIT (2 << 1)
/* XUSB DEV Device registers */
#define XUSB_DEV_CONFIGURATION 0x180
#define DEV_CONFIGURATION_EN_FPCI BIT(0)
#define XUSB_DEV_INTR_MASK 0x188
#define DEV_INTR_MASK_IP_INT_MASK BIT(16)
/* XUSB Pad Control registers */
#define XUSB_PADCTL_USB2_PAD_MUX 0x4
#define PADCTL_USB2_PAD_MUX_USB2_OTG_PAD_PORT0_USB2 (0 << 0)
#define PADCTL_USB2_PAD_MUX_USB2_OTG_PAD_PORT0_XUSB (1 << 0)
#define PADCTL_USB2_PAD_MUX_USB2_OTG_PAD_PORT0_MASK (3 << 0)
#define PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_USB2 (0 << 18)
#define PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_XUSB (1 << 18)
#define PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_MASK (3 << 18)
#define XUSB_PADCTL_USB2_PORT_CAP 0x8
#define PADCTL_USB2_PORT_CAP_PORT_0_CAP_DIS (0 << 0)
#define PADCTL_USB2_PORT_CAP_PORT_0_CAP_HOST (1 << 0)
#define PADCTL_USB2_PORT_CAP_PORT_0_CAP_DEV (2 << 0)
#define PADCTL_USB2_PORT_CAP_PORT_0_CAP_OTG (3 << 0)
#define PADCTL_USB2_PORT_CAP_PORT_0_CAP_MASK (3 << 0)
#define XUSB_PADCTL_SS_PORT_MAP 0x14
#define PADCTL_SS_PORT_MAP_PORT0_MASK (0xF << 0)
#define XUSB_PADCTL_ELPG_PROGRAM_0 0x20
#define XUSB_PADCTL_ELPG_PROGRAM_1 0x24
#define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD0_CTL0 0x80
#define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD0_CTL1 0x84
#define XUSB_PADCTL_USB2_OTG_PAD0_CTL_0 0x88
#define XUSB_PADCTL_USB2_OTG_PAD0_CTL_1 0x8C
#define XUSB_PADCTL_USB2_BIAS_PAD_CTL_0 0x284
#define XUSB_PADCTL_USB2_BIAS_PAD_CTL_1 0x288
#define XUSB_PADCTL_USB2_VBUS_ID 0xC60
#define PADCTL_USB2_VBUS_ID_VBUS_OVR_EN (1 << 12)
#define PADCTL_USB2_VBUS_ID_VBUS_OVR_MASK (3 << 12)
#define PADCTL_USB2_VBUS_ID_VBUS_ON BIT(14)
#define PADCTL_USB2_VBUS_ID_SRC_ID_OVR_EN (1 << 16)
#define PADCTL_USB2_VBUS_ID_SRC_MASK (3 << 16)
#define PADCTL_USB2_VBUS_ID_OVR_GND (0 << 18)
#define PADCTL_USB2_VBUS_ID_OVR_C (1 << 18)
#define PADCTL_USB2_VBUS_ID_OVR_B (2 << 18)
#define PADCTL_USB2_VBUS_ID_OVR_A (4 << 18)
#define PADCTL_USB2_VBUS_ID_OVR_FLOAT (8 << 18)
#define PADCTL_USB2_VBUS_ID_OVR_MASK (0xF << 18)
#endif

1595
bdk/usb/usbd.c
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File diff suppressed because it is too large Load Diff

204
bdk/usb/usbd.h
View File

@@ -1,204 +0,0 @@
/*
* Enhanced & eXtensible USB Device (EDCI & XDCI) driver for Tegra X1
*
* Copyright (c) 2019-2021 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _USB_H_
#define _USB_H_
#include <utils/types.h>
#define USB_TD_BUFFER_PAGE_SIZE 0x1000
#define USB_TD_BUFFER_MAX_SIZE (USB_TD_BUFFER_PAGE_SIZE * 4)
//#define USB_HW_BUFFER_5_PAGES 0x5000
#define USB_EP_BUFFER_1_TD (USB_TD_BUFFER_MAX_SIZE)
#define USB_EP_BUFFER_2_TD (USB_TD_BUFFER_MAX_SIZE * 2)
#define USB_EP_BUFFER_4_TD (USB_TD_BUFFER_MAX_SIZE * 4)
#define USB_EP_BUFFER_MAX_SIZE (USB_EP_BUFFER_4_TD)
#define USB_EP_BUFFER_ALIGN (USB_TD_BUFFER_PAGE_SIZE)
#define USB_XFER_START 0
#define USB_XFER_SYNCED_ENUM 1000000
#define USB_XFER_SYNCED_CMD 1000000
#define USB_XFER_SYNCED_DATA 2000000
#define USB_XFER_SYNCED_CLASS 5000000
#define USB_XFER_SYNCED -1
typedef enum _usb_hid_type
{
USB_HID_GAMEPAD,
USB_HID_TOUCHPAD
} usb_hid_type;
typedef enum _usb_gadget_type
{
USB_GADGET_UMS = 0,
USB_GADGET_HID_GAMEPAD = 1,
USB_GADGET_HID_TOUCHPAD = 2,
} usb_gadget_type;
typedef enum {
USB_DIR_OUT = 0,
USB_DIR_IN = 1,
} usb_dir_t;
typedef enum
{
XUSB_EP_CTRL_IN = 0, // EP0.
XUSB_EP_CTRL_OUT = 1, // EP0.
USB_EP_CTRL_OUT = 0, // EP0.
USB_EP_CTRL_IN = 1, // EP0.
USB_EP_BULK_OUT = 2, // EP1.
USB_EP_BULK_IN = 3, // EP1.
USB_EP_ALL = 0xFFFFFFFF
} usb_ep_t;
typedef enum
{
USB_EP_ADDR_CTRL_OUT = 0x00,
USB_EP_ADDR_CTRL_IN = 0x80,
USB_EP_ADDR_BULK_OUT = 0x01,
USB_EP_ADDR_BULK_IN = 0x81,
} usb_ep_addr_t;
typedef enum
{
USB_EP_CFG_CLEAR = 0,
USB_EP_CFG_RESET = 0,
USB_EP_CFG_STALL = 1
} usb_ep_cfg_t;
typedef enum {
USB_STATUS_EP_OK = 0,
USB_STATUS_EP_HALTED = 1,
USB_STATUS_DEV_SELF_POWERED = 1,
USB_STATUS_DEV_REMOTE_WAKE = 2,
} usb_set_clear_feature_req_t;
typedef enum {
USB_SETUP_RECIPIENT_DEVICE = 0,
USB_SETUP_RECIPIENT_INTERFACE = 1,
USB_SETUP_RECIPIENT_ENDPOINT = 2,
USB_SETUP_RECIPIENT_OTHER = 3,
USB_SETUP_TYPE_STANDARD = 0x00,
USB_SETUP_TYPE_CLASS = 0x20,
USB_SETUP_TYPE_VENDOR = 0x40,
USB_SETUP_TYPE_RESERVED = 0x60,
USB_SETUP_HOST_TO_DEVICE = 0x00,
USB_SETUP_DEVICE_TO_HOST = 0x80,
} usb_setup_req_type_t;
typedef enum {
USB_REQUEST_GET_STATUS = 0,
USB_REQUEST_CLEAR_FEATURE = 1,
USB_REQUEST_SET_FEATURE = 3,
USB_REQUEST_SET_ADDRESS = 5,
USB_REQUEST_GET_DESCRIPTOR = 6,
USB_REQUEST_SET_DESCRIPTOR = 7,
USB_REQUEST_GET_CONFIGURATION = 8,
USB_REQUEST_SET_CONFIGURATION = 9,
USB_REQUEST_GET_INTERFACE = 10,
USB_REQUEST_SET_INTERFACE = 11,
USB_REQUEST_SYNCH_FRAME = 12,
USB_REQUEST_SET_SEL = 13,
USB_REQUEST_GET_MS_DESCRIPTOR = 0x99,
USB_REQUEST_BULK_GET_MAX_LUN = 0xFE,
USB_REQUEST_BULK_RESET = 0xFF
} usb_standard_req_t;
typedef enum {
USB_FEATURE_ENDPOINT_HALT = 0,
USB_FEATURE_DEVICE_REMOTE_WAKEUP = 1,
USB_FEATURE_TEST_MODE = 2,
} usb_get_status_req_t;
typedef enum _usb_error_t
{
USB_RES_OK = 0,
USB_RES_BULK_RESET = 1,
USB_ERROR_USER_ABORT = 2,
USB_ERROR_TIMEOUT = 3,
USB_ERROR_INIT = 4,
USB_ERROR_XFER_ERROR = 5,
USB2_ERROR_XFER_EP_DISABLED = 28,
USB2_ERROR_XFER_NOT_ALIGNED = 29,
XUSB_ERROR_INVALID_EP = USB_ERROR_XFER_ERROR, // From 2.
XUSB_ERROR_XFER_BULK_IN_RESIDUE = 7,
XUSB_ERROR_INVALID_CYCLE = USB2_ERROR_XFER_EP_DISABLED, // From 8.
XUSB_ERROR_BABBLE_DETECTED = 50,
XUSB_ERROR_SEQ_NUM = 51,
XUSB_ERROR_XFER_DIR = 52,
XUSB_ERROR_PORT_CFG = 54
} usb_error_t;
typedef struct _usb_ctrl_setup_t
{
u8 bmRequestType;
u8 bRequest;
u16 wValue;
u16 wIndex;
u16 wLength;
} usb_ctrl_setup_t;
typedef struct _usb_ops_t
{
int (*usbd_flush_endpoint)(u32);
int (*usbd_set_ep_stall)(u32, int);
int (*usbd_handle_ep0_ctrl_setup)();
void (*usbd_end)(bool, bool);
int (*usb_device_init)();
int (*usb_device_enumerate)(usb_gadget_type gadget);
int (*usb_device_class_send_max_lun)(u8);
int (*usb_device_class_send_hid_report)();
int (*usb_device_ep1_out_read)(u8 *, u32, u32 *, u32);
int (*usb_device_ep1_out_read_big)(u8 *, u32, u32 *);
int (*usb_device_ep1_out_reading_finish)(u32 *, u32);
int (*usb_device_ep1_in_write)(u8 *, u32, u32 *, u32);
int (*usb_device_ep1_in_writing_finish)(u32 *, u32);
bool (*usb_device_get_suspended)();
bool (*usb_device_get_port_in_sleep)();
} usb_ops_t;
typedef struct _usb_ctxt_t
{
u32 type;
u32 partition;
u32 offset;
u32 sectors;
u32 ro;
void (*system_maintenance)(bool);
void *label;
void (*set_text)(void *, const char *);
} usb_ctxt_t;
void usb_device_get_ops(usb_ops_t *ops);
void xusb_device_get_ops(usb_ops_t *ops);
int usb_device_gadget_ums(usb_ctxt_t *usbs);
int usb_device_gadget_hid(usb_ctxt_t *usbs);
#endif

2108
bdk/usb/xusbd.c
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File diff suppressed because it is too large Load Diff

7
bdk/utils/btn.c
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018 CTCaer
* Copyright (c) 2018-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -44,6 +44,11 @@ u8 btn_read_vol()
return res;
}
u8 btn_read_home()
{
return (!gpio_read(GPIO_PORT_Y, GPIO_PIN_1)) ? BTN_HOME : 0;
}
u8 btn_wait()
{
u8 res = 0, btn = btn_read();

4
bdk/utils/btn.h
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018 CTCaer
* Copyright (c) 2018-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -23,10 +23,12 @@
#define BTN_POWER BIT(0)
#define BTN_VOL_DOWN BIT(1)
#define BTN_VOL_UP BIT(2)
#define BTN_HOME BIT(3)
#define BTN_SINGLE BIT(7)
u8 btn_read();
u8 btn_read_vol();
u8 btn_read_home();
u8 btn_wait();
u8 btn_wait_timeout(u32 time_ms, u8 mask);
u8 btn_wait_timeout_single(u32 time_ms, u8 mask);

43
bdk/utils/ini.c
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018-2020 CTCaer
* Copyright (c) 2018-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -21,25 +21,7 @@
#include <libs/fatfs/ff.h>
#include <mem/heap.h>
#include <utils/dirlist.h>
static char *_strdup(char *str)
{
if (!str)
return NULL;
// Remove starting space.
if (str[0] == ' ' && strlen(str))
str++;
char *res = (char *)malloc(strlen(str) + 1);
strcpy(res, str);
// Remove trailing space.
if (strlen(res) && res[strlen(res) - 1] == ' ')
res[strlen(res) - 1] = 0;
return res;
}
#include <utils/util.h>
u32 _find_section_name(char *lbuf, u32 lblen, char schar)
{
@@ -57,8 +39,12 @@ ini_sec_t *_ini_create_section(link_t *dst, ini_sec_t *csec, char *name, u8 type
if (csec)
list_append(dst, &csec->link);
csec = (ini_sec_t *)calloc(sizeof(ini_sec_t), 1);
csec->name = _strdup(name);
// Calculate total allocation size.
u32 len = name ? strlen(name) + 1 : 0;
char *buf = calloc(sizeof(ini_sec_t) + len, 1);
csec = (ini_sec_t *)buf;
csec->name = strcpy_ns(buf + sizeof(ini_sec_t), name);
csec->type = type;
return csec;
@@ -155,9 +141,16 @@ int ini_parse(link_t *dst, char *ini_path, bool is_dir)
{
u32 i = _find_section_name(lbuf, lblen, '=');
ini_kv_t *kv = (ini_kv_t *)calloc(sizeof(ini_kv_t), 1);
kv->key = _strdup(&lbuf[0]);
kv->val = _strdup(&lbuf[i + 1]);
// Calculate total allocation size.
u32 klen = strlen(&lbuf[0]) + 1;
u32 vlen = strlen(&lbuf[i + 1]) + 1;
char *buf = calloc(sizeof(ini_kv_t) + klen + vlen, 1);
ini_kv_t *kv = (ini_kv_t *)buf;
buf += sizeof(ini_kv_t);
kv->key = strcpy_ns(buf, &lbuf[0]);
buf += klen;
kv->val = strcpy_ns(buf, &lbuf[i + 1]);
list_append(&csec->kvs, &kv->link);
}
} while (!f_eof(&fp));

292
bdk/utils/sprintf.c
View File

@@ -1,123 +1,201 @@
/*
* Copyright (c) 2019-2020 shchmue
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "sprintf.h"
* Copyright (c) 2018 naehrwert
* Copyright (c) 2019-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <stdarg.h>
#include <string.h>
static void _putc(char *buffer, const char c) {
*buffer = c;
#include <utils/types.h>
char **sout_buf;
static void _s_putc(char c)
{
**sout_buf = c;
*sout_buf += 1;
}
static u32 _puts(char *buffer, const char *s) {
u32 count = 0;
for (; *s; s++, count++)
_putc(buffer + count, *s);
return count;
static void _s_puts(char *s)
{
for (; *s; s++)
_s_putc(*s);
}
static u32 _putn(char *buffer, u32 v, int base, char fill, int fcnt) {
char buf[0x121];
static const char digits[] = "0123456789abcdefghijklmnopqrstuvwxyz";
char *p;
int c = fcnt;
static void _s_putn(u32 v, int base, char fill, int fcnt)
{
char buf[65];
static const char digits[] = "0123456789ABCDEFghijklmnopqrstuvwxyz";
char *p;
int c = fcnt;
if (base > 36)
return 0;
if (base > 36)
return;
p = buf + 0x120;
*p = 0;
do {
c--;
*--p = digits[v % base];
v /= base;
} while (v);
p = buf + 64;
*p = 0;
do
{
c--;
*--p = digits[v % base];
v /= base;
} while (v);
if (fill != 0) {
while (c > 0) {
*--p = fill;
c--;
}
}
if (fill != 0)
{
while (c > 0)
{
*--p = fill;
c--;
}
}
return _puts(buffer, p);
_s_puts(p);
}
u32 s_printf(char *buffer, const char *fmt, ...) {
va_list ap;
int fill, fcnt;
u32 count = 0;
void s_printf(char *out_buf, const char *fmt, ...)
{
va_list ap;
int fill, fcnt;
va_start(ap, fmt);
while(*fmt) {
if (*fmt == '%') {
fmt++;
fill = 0;
fcnt = 0;
if ((*fmt >= '0' && *fmt <= '9') || *fmt == ' ') {
fcnt = *fmt;
fmt++;
if (*fmt >= '0' && *fmt <= '9') {
fill = fcnt;
fcnt = *fmt - '0';
fmt++;
} else {
fill = ' ';
fcnt -= '0';
}
}
switch (*fmt) {
case 'c':
_putc(buffer + count, va_arg(ap, u32));
count++;
break;
case 's':
count += _puts(buffer + count, va_arg(ap, char *));
break;
case 'd':
count += _putn(buffer + count, va_arg(ap, u32), 10, fill, fcnt);
break;
case 'p':
case 'P':
case 'x':
case 'X':
count += _putn(buffer + count, va_arg(ap, u32), 16, fill, fcnt);
break;
case '%':
_putc(buffer + count, '%');
count++;
break;
case '\0':
goto out;
default:
_putc(buffer + count, '%');
count++;
_putc(buffer + count, *fmt);
count++;
break;
}
} else {
_putc(buffer + count, *fmt);
count++;
}
fmt++;
}
sout_buf = &out_buf;
out:
buffer[count] = 0;
va_end(ap);
return count;
}
va_start(ap, fmt);
while(*fmt)
{
if(*fmt == '%')
{
fmt++;
fill = 0;
fcnt = 0;
if ((*fmt >= '0' && *fmt <= '9') || *fmt == ' ')
{
fcnt = *fmt;
fmt++;
if (*fmt >= '0' && *fmt <= '9')
{
fill = fcnt;
fcnt = *fmt - '0';
fmt++;
}
else
{
fill = ' ';
fcnt -= '0';
}
}
switch(*fmt)
{
case 'c':
_s_putc(va_arg(ap, u32));
break;
case 's':
_s_puts(va_arg(ap, char *));
break;
case 'd':
_s_putn(va_arg(ap, u32), 10, fill, fcnt);
break;
case 'p':
case 'P':
case 'x':
case 'X':
_s_putn(va_arg(ap, u32), 16, fill, fcnt);
break;
case '%':
_s_putc('%');
break;
case '\0':
goto out;
default:
_s_putc('%');
_s_putc(*fmt);
break;
}
}
else
_s_putc(*fmt);
fmt++;
}
out:
**sout_buf = '\0';
va_end(ap);
}
void s_vprintf(char *out_buf, const char *fmt, va_list ap)
{
int fill, fcnt;
sout_buf = &out_buf;
while(*fmt)
{
if(*fmt == '%')
{
fmt++;
fill = 0;
fcnt = 0;
if ((*fmt >= '0' && *fmt <= '9') || *fmt == ' ')
{
fcnt = *fmt;
fmt++;
if (*fmt >= '0' && *fmt <= '9')
{
fill = fcnt;
fcnt = *fmt - '0';
fmt++;
}
else
{
fill = ' ';
fcnt -= '0';
}
}
switch(*fmt)
{
case 'c':
_s_putc(va_arg(ap, u32));
break;
case 's':
_s_puts(va_arg(ap, char *));
break;
case 'd':
_s_putn(va_arg(ap, u32), 10, fill, fcnt);
break;
case 'p':
case 'P':
case 'x':
case 'X':
_s_putn(va_arg(ap, u32), 16, fill, fcnt);
break;
case '%':
_s_putc('%');
break;
case '\0':
goto out;
default:
_s_putc('%');
_s_putc(*fmt);
break;
}
}
else
_s_putc(*fmt);
fmt++;
}
out:
**sout_buf = '\0';
}

37
bdk/utils/sprintf.h
View File

@@ -1,24 +1,27 @@
/*
* Copyright (c) 2019-2020 shchmue
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
* Copyright (c) 2019 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _SPRINTF_H_
#define _SPRINTF_H_
#include "types.h"
#include <stdarg.h>
u32 s_printf(char *buffer, const char *fmt, ...);
#include <utils/types.h>
#endif
void s_printf(char *out_buf, const char *fmt, ...);
void s_vprintf(char *out_buf, const char *fmt, va_list ap);
#endif

31
bdk/utils/types.h
View File

@@ -20,6 +20,16 @@
#include <assert.h>
#define ALWAYS_INLINE inline __attribute__((always_inline))
#define COLOR_RED 0xFFE70000
#define COLOR_ORANGE 0xFFFF8C00
#define COLOR_YELLOW 0xFFFFFF40
#define COLOR_GREEN 0xFF40FF00
#define COLOR_BLUE 0xFF00DDFF
#define COLOR_VIOLET 0xFF8040FF
/* Types */
typedef signed char s8;
typedef short s16;
@@ -46,21 +56,11 @@ typedef volatile unsigned short vu16;
typedef volatile unsigned int vu32;
#ifdef __aarch64__
typedef u64 uptr;
typedef unsigned long long uptr;
#else /* __arm__ or __thumb__ */
typedef u32 uptr;
typedef unsigned long uptr;
#endif
/* Colors */
#define COLOR_RED 0xFFE70000
#define COLOR_ORANGE 0xFFFF8C00
#define COLOR_YELLOW 0xFFFFFF40
#define COLOR_GREEN 0xFF40FF00
#define COLOR_BLUE 0xFF00DDFF
#define COLOR_VIOLET 0xFF8040FF
static const u32 colors[6] = {COLOR_RED, COLOR_ORANGE, COLOR_YELLOW, COLOR_GREEN, COLOR_BLUE, COLOR_VIOLET};
/* Important */
#define false 0
#define true 1
@@ -97,7 +97,6 @@ static const u32 colors[6] = {COLOR_RED, COLOR_ORANGE, COLOR_YELLOW, COLOR_GREEN
#define SZ_PAGE SZ_4K
/* Macros */
#define ALWAYS_INLINE inline __attribute__((always_inline))
#define ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1))
#define ALIGN_DOWN(x, a) ((x) & ~((a) - 1))
#define BIT(n) (1U << (n))
@@ -107,8 +106,6 @@ static const u32 colors[6] = {COLOR_RED, COLOR_ORANGE, COLOR_YELLOW, COLOR_GREEN
#define ARRAY_SIZE(x) (sizeof(x) / sizeof(*(x)))
#define LOG2(n) (32 - __builtin_clz(n) - 1)
#define CLZ(n) __builtin_clz(n)
#define CLO(n) __builtin_clz(~n)
#define OFFSET_OF(t, m) ((uptr)&((t *)NULL)->m)
#define CONTAINER_OF(mp, t, mn) ((t *)((uptr)mp - OFFSET_OF(t, mn)))
@@ -152,8 +149,8 @@ typedef struct __attribute__((__packed__)) _boot_cfg_t
{
struct
{
char id[8]; // 7 char ASCII null teminated.
char emummc_path[0x78]; // emuMMC/XXX, ASCII null teminated.
char id[8]; // 7 char ASCII null terminated.
char emummc_path[0x78]; // emuMMC/XXX, ASCII null terminated.
};
u8 ums; // nyx_ums_type.
u8 xt_str[0x80];

52
bdk/utils/util.c
View File

@@ -1,7 +1,6 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018-2020 CTCaer
# Copyright (c) 2022 shchmue
* Copyright (c) 2018-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -16,7 +15,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <utils/util.h>
#include <string.h>
#include <mem/heap.h>
#include <power/max77620.h>
#include <rtc/max77620-rtc.h>
@@ -25,7 +25,8 @@
#include <soc/i2c.h>
#include <soc/pmc.h>
#include <soc/t210.h>
#include <storage/nx_sd.h>
#include <storage/sd.h>
#include <utils/util.h>
#define USE_RTC_TIMER
@@ -52,6 +53,28 @@ u32 bit_count_mask(u8 bits)
return val;
}
char *strcpy_ns(char *dst, char *src)
{
if (!src || !dst)
return NULL;
// Remove starting space.
u32 len = strlen(src);
if (len && src[0] == ' ')
{
len--;
src++;
}
strcpy(dst, src);
// Remove trailing space.
if (len && dst[len - 1] == ' ')
dst[len - 1] = 0;
return dst;
}
u32 get_tmr_s()
{
return RTC(APBDEV_RTC_SECONDS);
@@ -103,27 +126,6 @@ void exec_cfg(u32 *base, const cfg_op_t *ops, u32 num_ops)
base[ops[i].off] = ops[i].val;
}
u16 crc16_calc(const u8 *buf, u32 len)
{
const u8 *p, *q;
u16 crc = 0x55aa;
static u16 table[16] = {
0x0000, 0xCC01, 0xD801, 0x1400, 0xF001, 0x3C00, 0x2800, 0xE401,
0xA001, 0x6C00, 0x7800, 0xB401, 0x5000, 0x9C01, 0x8801, 0x4400
};
q = buf + len;
for (p = buf; p < q; p++)
{
u8 oct = *p;
crc = (crc >> 4) ^ table[crc & 0xf] ^ table[(oct >> 0) & 0xf];
crc = (crc >> 4) ^ table[crc & 0xf] ^ table[(oct >> 4) & 0xf];
}
return crc;
}
u32 crc32_calc(u32 crc, const u8 *buf, u32 len)
{
const u8 *p, *q;

5
bdk/utils/util.h
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018-2021 CTCaer
* Copyright (c) 2018-2022 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -81,9 +81,9 @@ typedef struct _nyx_storage_t
u8 bit_count(u32 val);
u32 bit_count_mask(u8 bits);
char *strcpy_ns(char *dst, char *src);
void exec_cfg(u32 *base, const cfg_op_t *ops, u32 num_ops);
u16 crc16_calc(const u8 *buf, u32 len);
u32 crc32_calc(u32 crc, const u8 *buf, u32 len);
u32 get_tmr_us();
@@ -96,4 +96,5 @@ void panic(u32 val);
void power_set_state(power_state_t state);
void power_set_state_ex(void *param);
#endif

22
scripts/FirmwareDump.te
View File

@@ -15,22 +15,18 @@ fv={a=readsave("bis:/save/8000000000000120")
maj=((ver>>26)&((1<<6)- 1))
}.else(){print("Fw not found")pe()}
a=0 fwstr()}
if(mountsys("SYSTEM")){print("SYSTEM MOUNT FAIL")pe()}
fv()
sysfw=fw
p("Sys' fw is",fw)
emufw=""
if (emu()){if(!mountemu("SYSTEM")){fv()emufw=fw p("Emu's fw is",fw)}}
op=["Exit","Dump sysmmc"].copy()
if (emu()){op+"Dump emummc"}
if (emufw!=""){op+"Dump emummc"}
p()r=menu(op,0)clear()
if(r==0){exit()}
if(r==1){if(mountsys("SYSTEM")){print("SYSTEM MOUNT FAIL")pe()}}
if(r==2){if(mountemu("SYSTEM")){print("SYSTEM MOUNT FAIL")pe()}}
clear()
fv()
p("Found firmware",fw)
p("Press Power or A to dump firmware, any other key to exit")
a = pause()
if (!a.a) {exit()}
clear()
if(r==1){fw=sysfw if(mountsys("SYSTEM")){print("SYSTEM MOUNT FAIL")pe()}}
if(r==2){fw=emufw if(mountemu("SYSTEM")){print("SYSTEM MOUNT FAIL")pe()}}
mkdir("sd:/tegraexplorer")
mkdir("sd:/tegraexplorer/Firmware")
bsp="sd:/tegraexplorer/Firmware/"+fw

207
scripts/SystemWipe.te
View File

@@ -1,213 +1,30 @@
#REQUIRE KEYS
is=["8000000000000120","8000000000000053","8000000000000000"]
is=["8000000000000120","80000000000000d1","8000000000000047"]
p=println
pr=print
pe={pause() exit()}
wait={t=timer()while(timer()<(t+tw)){print("Wait for",(t+tw-timer()/1000),"seconds \r")}}
p("System wiper\n")
op=["Exit","Wipe sysmmc"].copy()
if (emu()){op+"Wipe emummc"}
r=menu(op,0)clear()
if(r==0){exit()}
if(r==1){
mount=mountsys
selected_target = "sysmmc"
}
if(r==2){
mount=mountemu
selected_target = "emummc"
}
if(r==1){p("Selected sysmmc")mount=mountsys}
if(r==2){p("Selected emummc")mount=mountemu}
if(mount("SYSTEM")){p("Mount failed!")pe()}
clear()
border = {
setpixels(0,0,1279,19,border_color)
setpixels(0,700,1279,719,border_color)
setpixels(0,20,19,699,border_color)
setpixels(1260,20,1279,699,border_color)
}
i = 10
x_pos = 10
y_pos = 12
["WARNING!!!",
"",
"Do you really want to wipe your system?",
"This will remove:",
"- Your Save Data",
"- Your Game Data",
"- Your User Data",
"",
"Restoring an emmc backup is always preferable over wiping.",
"Please only use this as a last resort.",
"This script is intended to be used in aid of unbricking."
].foreach("line")
{
printpos(x_pos, y_pos)
y_pos = y_pos + 1
print(line)
}
if (!fsexists("bis:/save/"+is[1]))
{
[
"",
"DeviceSettings save (8000000000000053) is missing!!!",
"This script cannot recover lost battery calibration data.",
"The system will initialize with default values.",
"These values are unsafe for lite systems!"
].foreach("line")
{
printpos(x_pos, y_pos)
y_pos = y_pos + 1
print(line)
}
}
time = 5000
y_pos = y_pos + 4
while (i > 0)
{
i = i - 1
if (i % 2 == 0){
border_color = 0xFF0000
}.else() {
border_color = 0x000000
}
border()
sleep(500)
time = time - 500
printpos(x_pos, y_pos)
print("Waiting for", time / 1000, "seconds")
}
printpos(x_pos, y_pos)
print("Ready to wipe", selected_target, " ")
y_pos = y_pos + 1
printpos(x_pos, y_pos)
print("Press the power button to wipe, any other key to exit")
result = pause(0x70F000F)
if (!result.power)
{
exit()
}
clear()
color(0xFF0000)
p("Are you sure you want to wipe everything?\nThis includes:\n- Saves\n- Game Data\n- All other data on the system\n\nUse this only as a last resort!")
color(0xFFFF00)
tw=10000
wait()
color(0x0000FF)
p("Press power to wipe, any other key to exit")a=pause()if(!a.power){exit()}clear()
color(0xFF0000)
pr("Deleting system saves... ")
f=readdir("bis:/save")
if(f.folders.len()!=0){p("Folders in save dir???")pe()}
f.files.foreach("x"){if(!is.contains(x)){if(delfile("bis:/save/"+x)){p("File deletion failed: ", x)pe()}}}
pr("Done!\nSetting up indexer save...")
if(fsexists("bis:/save/"+is[0]))
{
ba0=["BYTE[]",0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
ba120=["BYTE[]",0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x80]
ba53=["BYTE[]",0x53,0x00,0x00,0x00,0x00,0x00,0x00,0x80]
imen=["BYTE[]",0x49,0x4D,0x45,0x4E,0x40,0x00,0x00,0x00,0x40,0x00,0x00,0x00]
idb=["BYTE[]",0x49,0x4D,0x4B,0x56,0x00,0x00,0x00,0x00].copy() # imkv
skip53 = !fsexists("bis:/save/"+is[1])
if(skip53)
{
idb.add(0x01) # 0x01 imen
pr("053 save not found!!! Skip indexing it...")
}.else()
{
idb.add(0x02) # 0x02 imens
}
idb.add(0x00)
idb.add(0x00)
idb.add(0x00)
if(!skip53)
{
# 53 save
s=getfilesize("bis:/save/"+is[1])
s1=s&0xFF
s2=(s>>8)&0xFF
s3=(s>>16)&0xFF
s4=(s>>24)&0xFF
idb.addrange(imen)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba53)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba53)
idb.add(s1)
idb.add(s2)
idb.add(s3)
idb.add(s4)
idb.add(0x00)
idb.add(0x00)
idb.add(0x00)
idb.add(0x00)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba0)
}
# 120 save
s=getfilesize("bis:/save/"+is[0])
s1=s&0xFF
s2=(s>>8)&0xFF
s3=(s>>16)&0xFF
s4=(s>>24)&0xFF
idb.addrange(imen)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba120)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba120)
idb.add(s1)
idb.add(s2)
idb.add(s3)
idb.add(s4)
idb.add(0x00)
idb.add(0x00)
idb.add(0x00)
idb.add(0x00)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba0)
idb.addrange(ba0)
idxs=readsave("bis:/save/"+is[2])
if(idxs.resize("/imkvdb.arc",idb.len())){p("imkvdb resize failed")pe()}
if(idxs.write("/imkvdb.arc",idb)){p("imkvdb write failed")pe()}
if(idxs.resize("/lastPublishedId",ba0.len())){p("lastPublishedId resize failed")pe()}
if(idxs.write("/lastPublishedId",ba0)){p("lastPublishedId write failed")pe()}
if(idxs.commit()){p("Indexer save commit failed")pe()}
idxs=0
pr("Done!")
}.else()
{
pr("120 save not found!!! Skip editing indexer save!!!")
}
pr("\nDeleting user dirs...")ud=["Album","Contents","save","saveMeta","temp"]
pr("Done!\nDeleting user dirs...")ud=["Album","Contents","save","saveMeta","temp"]
if(mount("USER")){p("Mount failed!")pe()}
ud.foreach("x"){pr("\n"+x,"")if(deldir("bis:/"+x)){p("Dir deletion failed")pe()}mkdir("bis:/"+x)}
mkdir("bis:/Contents/placehld")mkdir("bis:/Contents/registered")

54
source/config.c
View File

@@ -1,54 +0,0 @@
/*
* Copyright (c) 2018-2020 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <string.h>
#include <stdlib.h>
#include "config.h"
#include <utils/ini.h>
#include <gfx_utils.h>
#include <libs/fatfs/ff.h>
#include <soc/fuse.h>
#include <soc/hw_init.h>
#include <soc/t210.h>
#include <storage/nx_sd.h>
#include <storage/sdmmc.h>
#include <utils/btn.h>
#include <utils/list.h>
#include <utils/util.h>
extern hekate_config h_cfg;
void set_default_configuration()
{
h_cfg.autoboot = 0;
h_cfg.autoboot_list = 0;
h_cfg.bootwait = 3;
h_cfg.se_keygen_done = 0;
h_cfg.backlight = 100;
h_cfg.autohosoff = 0;
h_cfg.autonogc = 1;
h_cfg.updater2p = 0;
h_cfg.bootprotect = 0;
h_cfg.errors = 0;
h_cfg.sept_run = 0;
h_cfg.aes_slots_new = false;
h_cfg.rcm_patched = fuse_check_patched_rcm();
h_cfg.emummc_force_disable = false;
h_cfg.t210b01 = hw_get_chip_id() == GP_HIDREV_MAJOR_T210B01;
sd_power_cycle_time_start = 0;
}

25
source/config.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2019 CTCaer
* Copyright (c) 2018-2021 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -16,35 +16,16 @@
#ifndef _CONFIG_H_
#define _CONFIG_H_
#include <utils/types.h>
#include <bdk.h>
typedef struct _hekate_config
{
// Non-volatile config.
u32 autoboot;
u32 autoboot_list;
u32 bootwait;
u32 backlight;
u32 autohosoff;
u32 autonogc;
u32 updater2p;
u32 bootprotect;
// Global temporary config.
bool t210b01;
bool se_keygen_done;
bool sept_run;
bool aes_slots_new;
bool emummc_force_disable;
bool rcm_patched;
u32 errors;
} hekate_config;
void set_default_configuration();
int create_config_entry();
void config_autoboot();
void config_bootdelay();
void config_backlight();
void config_auto_hos_poweroff();
void config_nogc();
#endif /* _CONFIG_H_ */

6
source/fs/fscopy.c
View File

@@ -1,14 +1,14 @@
#include "fscopy.h"
#include <libs/fatfs/ff.h>
#include <utils/btn.h>
#include <bdk.h>
#include <string.h>
#include "../tegraexplorer/tconf.h"
#include "../gfx/gfx.h"
#include <mem/heap.h>
#include <string.h>
#include "../gfx/gfxutils.h"
#include "fsutils.h"
#include "readers/folderReader.h"
ErrCode_t FileCopy(const char *locin, const char *locout, u8 options){
FIL in, out;
FILINFO in_info;

3
source/fs/fsutils.c
View File

@@ -1,8 +1,7 @@
#include <mem/heap.h>
#include <string.h>
#include "fsutils.h"
#include "../utils/utils.h"
#include <utils/sprintf.h>
#include <bdk.h>
#include <libs/fatfs/ff.h>
#include "readers/folderReader.h"

8
source/fs/menus/filemenu.c
View File

@@ -3,19 +3,17 @@
#include "../../gfx/menu.h"
#include "../../gfx/gfxutils.h"
#include "../fsutils.h"
#include <mem/heap.h>
#include <string.h>
#include <utils/sprintf.h>
#include "../../tegraexplorer/tconf.h"
#include "../../hid/hid.h"
#include <libs/fatfs/ff.h>
#include "../../utils/utils.h"
#include "../../keys/nca.h"
#include <storage/nx_sd.h>
#include "../../storage/emummc.h"
#include "../../script/eval.h"
#include "../../script/parser.h"
#include "../../script/garbageCollector.h"
#include <libs/fatfs/ff.h>
#include <string.h>
#include <bdk.h>
MenuEntry_t FileMenuEntries[] = {

4
source/fs/menus/foldermenu.c
View File

@@ -3,15 +3,13 @@
#include "../../gfx/menu.h"
#include "../../gfx/gfxutils.h"
#include "../fsutils.h"
#include <mem/heap.h>
#include <string.h>
#include <utils/sprintf.h>
#include "../../tegraexplorer/tconf.h"
#include "../../hid/hid.h"
#include <libs/fatfs/ff.h>
#include "../../utils/utils.h"
#include "../../keys/nca.h"
#include <storage/nx_sd.h>
#include <bdk.h>
#include "../fscopy.h"
MenuEntry_t FolderMenuEntries[] = {

2
source/fs/readers/folderReader.c
View File

@@ -1,7 +1,7 @@
#include "folderReader.h"
#include <libs/fatfs/ff.h>
#include "../../utils/utils.h"
#include <mem/heap.h>
#include <bdk.h>
void clearFileVector(Vector_t *v){
vecPDefArray(FSEntry_t*, entries, v);

9
source/hid/hid.c
View File

@@ -50,8 +50,8 @@ Input_t *hidRead(){
LbaseY = controller->lstick_y;
}
inputs.up = (controller->up || inputs.volp || (controller->lstick_y > LbaseY + 500)) ? 1 : 0;
inputs.down = (controller->down || inputs.volm || (controller->lstick_y < LbaseY - 500)) ? 1 : 0;
inputs.up = (controller->up || (controller->lstick_y > LbaseY + 500)) ? 1 : 0;
inputs.down = (controller->down || (controller->lstick_y < LbaseY - 500)) ? 1 : 0;
inputs.left = (controller->left || (controller->lstick_x < LbaseX - 500)) ? 1 : 0;
inputs.right = (controller->right || (controller->lstick_x > LbaseX + 500)) ? 1 : 0;
}
@@ -71,7 +71,8 @@ Input_t *hidRead(){
inputs.rLeft = (controller->rstick_x < RbaseX - 500) ? 1 : 0;
inputs.rRight = (controller->rstick_x > RbaseX + 500) ? 1 : 0;
}
inputs.a = inputs.a || inputs.power;
else
inputs.a = inputs.power;
return &inputs;
}
@@ -103,4 +104,4 @@ Input_t *hidWait(){
bool hidConnected(){
jc_gamepad_rpt_t *controller = joycon_poll();
return (controller->conn_l && controller->conn_r) ? 1 : 0;
}
}

2
source/keys/key_sources.inl
View File

@@ -14,6 +14,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
// Sha256 hash of the null string.
#include <bdk.h>
#define KB_FIRMWARE_VERSION_100_200 0
#define KB_FIRMWARE_VERSION_300 1

4
source/keys/keyfile.c
View File

@@ -1,11 +1,9 @@
#include "keys.h"
#include "keyfile.h"
#include <utils/types.h>
#include <libs/fatfs/ff.h>
#include <string.h>
#include <utils/ini.h>
#include <bdk.h>
#include "../tegraexplorer/tconf.h"
#include <storage/nx_sd.h>
#include "../gfx/gfx.h"
#define GetHexFromChar(c) ((c & 0x0F) + (c >= 'A' ? 9 : 0))

33
source/keys/keys.c
View File

@@ -1,31 +1,12 @@
#include "keys.h"
#include <libs/fatfs/ff.h>
#include <storage/nx_sd.h>
#include <storage/sdmmc.h>
#include <utils/btn.h>
#include <utils/list.h>
#include <utils/sprintf.h>
#include <utils/util.h>
#include <libs/fatfs/ff.h>
#include <mem/heap.h>
#include <mem/mc.h>
#include <mem/minerva.h>
#include <mem/sdram.h>
#include <sec/se.h>
#include <sec/se_t210.h>
#include <sec/tsec.h>
#include <soc/fuse.h>
#include <mem/smmu.h>
#include <soc/t210.h>
#include <display/di.h>
#include <gfx_utils.h>
#include <bdk.h>
#include "../config.h"
#include "../storage/emummc.h"
#include "../gfx/gfx.h"
#include "../tegraexplorer/tconf.h"
#include "../storage/mountmanager.h"
#include "../storage/nx_emmc.h"
#include "key_sources.inl"
@@ -118,7 +99,7 @@ static void _derive_bis_keys(key_derivation_ctx_t *keys) {
/* key = unwrap(source, wrapped_key):
key_set(ks, wrapped_key), block_ecb(ks, 0, key, source) -> final key in key
*/
minerva_periodic_training();
u32 key_generation = fuse_read_odm_keygen_rev();
if (key_generation)
key_generation--;
@@ -140,7 +121,7 @@ static void _derive_bis_keys(key_derivation_ctx_t *keys) {
}
static int _derive_master_keys_from_keyblobs(key_derivation_ctx_t *keys) {
u8 *keyblob_block = (u8 *)calloc(KB_FIRMWARE_VERSION_600 + 1, NX_EMMC_BLOCKSIZE);
u8 *keyblob_block = (u8 *)calloc(KB_FIRMWARE_VERSION_600 + 1, EMMC_BLOCKSIZE);
encrypted_keyblob_t *current_keyblob = (encrypted_keyblob_t *)keyblob_block;
u32 keyblob_mac[AES_128_KEY_SIZE / 4] = {0};
@@ -159,7 +140,7 @@ static int _derive_master_keys_from_keyblobs(key_derivation_ctx_t *keys) {
se_aes_key_set(8, keys->tsec_keys, sizeof(keys->tsec_keys) / 2);
se_aes_key_set(9, keys->sbk, 0x10);
if (!emummc_storage_read(&emmc_storage, KEYBLOB_OFFSET / NX_EMMC_BLOCKSIZE, KB_FIRMWARE_VERSION_600 + 1, keyblob_block)) {
if (!emummc_storage_read(KEYBLOB_OFFSET / EMMC_BLOCKSIZE, KB_FIRMWARE_VERSION_600 + 1, keyblob_block)) {
DPRINTF("Unable to read keyblobs.");
}
@@ -197,6 +178,8 @@ static bool _derive_tsec_keys(tsec_ctxt_t *tsec_ctxt, key_derivation_ctx_t *keys
return false;
}
minerva_periodic_training();
tsec_ctxt->size = _get_tsec_fw_size((tsec_key_data_t *)(tsec_ctxt->fw + TSEC_KEY_DATA_OFFSET));
if (tsec_ctxt->size > PKG1_MAX_SIZE) {
DPRINTF("Unexpected TSEC firmware size.");
@@ -240,11 +223,11 @@ static ALWAYS_INLINE u8 *_read_pkg1() {
// Read package1.
u8 *pkg1 = (u8 *)malloc(PKG1_MAX_SIZE);
if (!emummc_storage_set_mmc_partition(&emmc_storage, EMMC_BOOT0)) {
if (!emummc_storage_set_mmc_partition(EMMC_BOOT0)) {
DPRINTF("Unable to set partition.");
return NULL;
}
if (!emummc_storage_read(&emmc_storage, PKG1_OFFSET / NX_EMMC_BLOCKSIZE, PKG1_MAX_SIZE / NX_EMMC_BLOCKSIZE, pkg1)) {
if (!emummc_storage_read(PKG1_OFFSET / EMMC_BLOCKSIZE, PKG1_MAX_SIZE / EMMC_BLOCKSIZE, pkg1)) {
DPRINTF("Unable to read pkg1.");
return NULL;
}

10
source/libs/fatfs/diskio.c
View File

@@ -24,12 +24,8 @@
/*-----------------------------------------------------------------------*/
#include <string.h>
#include <bdk.h>
#include <libs/fatfs/diskio.h> /* FatFs lower layer API */
#include <memory_map.h>
#include <storage/nx_sd.h>
#include "../../storage/nx_emmc_bis.h"
#include <storage/sdmmc.h>
/*-----------------------------------------------------------------------*/
/* Get Drive Status */
@@ -67,7 +63,7 @@ DRESULT disk_read (
return sdmmc_storage_read(&sd_storage, sector, count, buff) ? RES_OK : RES_ERROR;
case DRIVE_BIS:
return nx_emmc_bis_read(sector, count, buff);
return nx_emmc_bis_read(sector, count, buff) ? RES_OK : RES_ERROR;
}
return RES_ERROR;
@@ -89,7 +85,7 @@ DRESULT disk_write (
return sdmmc_storage_write(&sd_storage, sector, count, (void *)buff) ? RES_OK : RES_ERROR;
case DRIVE_BIS:
return nx_emmc_bis_write(sector, count, (void *)buff);
return nx_emmc_bis_write(sector, count, (void *)buff) ? RES_OK : RES_ERROR;
}
return RES_ERROR;

25
source/libs/fatfs/ffconf.h
View File

@@ -41,15 +41,26 @@
#define FF_USE_MKFS 1
/* This option switches f_mkfs() function. (0:Disable or 1:Enable) */
#define FF_FASTFS 0
#if FF_FASTFS
#define FF_USE_FASTSEEK 1
#else
#define FF_USE_FASTSEEK 0
#if FF_USE_MKFS
#define FF_MKFS_LABEL "SWITCH SD "
#endif
/* This sets FAT/FAT32 label. Exactly 11 characters, all caps. */
#define FF_USE_FASTSEEK 0
/* This option switches fast seek function. (0:Disable or 1:Enable) */
#define FF_FASTFS 0
#if FF_FASTFS
#undef FF_USE_FASTSEEK
#define FF_USE_FASTSEEK 1
#endif
/* This option switches fast access to chained clusters. (0:Disable or 1:Enable) */
#define FF_SIMPLE_GPT 1
/* This option switches support for the first GPT partition. (0:Disable or 1:Enable) */
#define FF_USE_EXPAND 0
/* This option switches f_expand function. (0:Disable or 1:Enable) */
@@ -245,7 +256,7 @@
#define FF_FS_NORTC 1
#define FF_NORTC_MON 1
#define FF_NORTC_MDAY 1
#define FF_NORTC_YEAR 2020
#define FF_NORTC_YEAR 2022
/* The option FF_FS_NORTC switches timestamp function. If the system does not have
/ any RTC function or valid timestamp is not needed, set FF_FS_NORTC = 1 to disable
/ the timestamp function. Every object modified by FatFs will have a fixed timestamp

4
source/link.ld
View File

@@ -5,9 +5,7 @@ SECTIONS {
. = __ipl_start;
.text : {
*(.text._start);
KEEP(*(._boot_cfg));
KEEP(*(._ipl_version));
*(.text._irq_setup);
*(._boot_cfg);
*(.text*);
}
.data : {

50
source/main.c
View File

@@ -20,35 +20,15 @@
#include <string.h>
#include "config.h"
#include <display/di.h>
#include <gfx_utils.h>
#include <libs/fatfs/ff.h>
#include <mem/heap.h>
#include <mem/minerva.h>
#include <power/bq24193.h>
#include <power/max17050.h>
#include <power/max77620.h>
#include <rtc/max77620-rtc.h>
#include <soc/bpmp.h>
#include <soc/hw_init.h>
#include <bdk.h>
#include "storage/emummc.h"
#include "storage/nx_emmc.h"
#include <storage/nx_sd.h>
#include <storage/sdmmc.h>
#include <utils/btn.h>
#include <utils/dirlist.h>
#include <utils/ini.h>
#include <utils/sprintf.h>
#include <utils/util.h>
#include "hid/hid.h"
#include <input/joycon.h>
#include "gfx/menu.h"
#include "utils/vector.h"
#include "gfx/gfxutils.h"
#include "tegraexplorer/mainmenu.h"
#include "tegraexplorer/tconf.h"
#include "err.h"
#include <soc/pmc.h>
#include "keys/keys.h"
#include "keys/keyfile.h"
#include "storage/mountmanager.h"
@@ -241,8 +221,13 @@ void ipl_main()
uart_wait_idle(DEBUG_UART_PORT, UART_TX_IDLE);
#endif
// Set bootloader's default configuration.
set_default_configuration();
// Set hekate's default configuration
h_cfg.errors = 0;
h_cfg.rcm_patched = fuse_check_patched_rcm();
h_cfg.emummc_force_disable = false;
h_cfg.t210b01 = !!(hw_get_chip_id() == GP_HIDREV_MAJOR_T210B01);
display_init();
// Mount SD Card.
h_cfg.errors |= !sd_mount() ? ERR_SD_BOOT_EN : 0;
@@ -250,10 +235,10 @@ void ipl_main()
TConf.minervaEnabled = !minerva_init();
TConf.FSBuffSize = (TConf.minervaEnabled) ? 0x800000 : 0x10000;
if (!TConf.minervaEnabled) //!TODO: Add Tegra210B01 support to minerva.
// Train DRAM and switch to max frequency.
if (TConf.minervaEnabled) //!TODO: Add Tegra210B01 support to minerva.
h_cfg.errors |= ERR_LIBSYS_MTC;
display_init();
minerva_change_freq(FREQ_1600);
u32 *fb = display_init_framebuffer_pitch();
gfx_init_ctxt(fb, 720, 1280, 720);
@@ -265,7 +250,6 @@ void ipl_main()
// Overclock BPMP.
bpmp_clk_rate_set(BPMP_CLK_DEFAULT_BOOST);
minerva_change_freq(FREQ_800);
emummc_load_cfg();
// Ignore whether emummc is enabled.
@@ -276,11 +260,23 @@ void ipl_main()
TConf.pkg1ID = "Unk";
hidInit();
//gfx_clearscreen();
//Vector_t a = vecFromArray(testEntries, 9, sizeof(MenuEntry_t));
//u32 res = newMenu(&a, 0, 40, 5, testAdd, NULL);
//gfx_clearscreen();
//DrawError(newErrCode(1));
// TODO: Write exceptions in err.c and check them here
_show_errors();
gfx_clearscreen();
int res = -1;
if (btn_read() & BTN_VOL_DOWN || DumpKeys())
res = GetKeysFromFile("sd:/switch/prod.keys");

36
source/script/arrayClass.c
View File

@@ -65,27 +65,6 @@ int arrayClassAdd(Variable_t *caller, Variable_t *add){
return 0;
}
int arrayClassAddRange(Variable_t* caller, Variable_t* add)
{
// Check if IntArrayClass or StringArrayClass or ByteArrayClass
if ((caller->variableType == IntArrayClass) || (caller->variableType == StringArrayClass) || (caller->variableType == ByteArrayClass)) {
if (caller->variableType != add->variableType) {
return 1;
}
for (s64 i = 0; i < add->solvedArray.vector.count; i++)
{
Variable_t v = arrayClassGetIdx(add, i);
if (arrayClassAdd(caller, &v))
{
return 1;
}
}
}
return 0;
}
ClassFunction(getArrayIdx) {
s64 getVal = (*args)->integer.value;
// Out of bounds
@@ -188,20 +167,6 @@ ClassFunction(arrayAdd) {
return &emptyClass;
}
ClassFunction(arrayAddRange) {
Variable_t* arg = *args;
if (caller->readOnly) {
SCRIPT_FATAL_ERR("Array is read-only");
}
if (arrayClassAddRange(caller, arg)) {
SCRIPT_FATAL_ERR("Adding the wrong type to a typed array");
}
return &emptyClass;
}
ClassFunction(arrayContains) {
Vector_t* v = &caller->solvedArray.vector;
Variable_t* arg = *args;
@@ -293,7 +258,6 @@ ClassFunctionTableEntry_t arrayFunctions[] = {
{"set", arraySet, 2, oneIntOneAny},
{"+", arrayAdd, 1, anotherAnotherOneVarArg},
{"add", arrayAdd, 1, anotherAnotherOneVarArg},
{"addrange", arrayAddRange, 1, anotherAnotherOneVarArg},
{"-", arrayMinus, 1, anotherOneIntArg},
{"contains", arrayContains, 1, anotherAnotherOneVarArg},
{"bytestostr", bytesToStr, 0, 0},

4
source/script/parser.c
View File

@@ -15,7 +15,7 @@
#ifndef WIN32
#include "../tegraexplorer/tconf.h"
#include <storage/nx_sd.h>
#include <bdk.h>
#endif
static inline int isValidWord(char c) {
@@ -232,7 +232,7 @@ u8 nextToken(char** inPtr, void** val) {
if (!memcmp(t.strToken, in, (t.strToken[1] == '\0') ? 1 : 2)) {
//gfx_printf("Token: '%s'\n", t.strToken);
ret = Token_Token;
*val = (void*)t.token;
*val = t.token;
if (t.strToken[1] != '\0')
in++;

15
source/script/saveClass.c
View File

@@ -5,7 +5,6 @@
u8 oneStringArgSave[] = {StringClass};
u8 oneStrOneByteArrayArgSave[] = {StringClass, ByteArrayClass};
u8 oneStringOneIntArgSave[] = {StringClass, IntClass};
ClassFunction(readFile){
Variable_t *arg = (*args);
@@ -97,25 +96,11 @@ ClassFunction(saveClassCommit){
return newIntVariablePtr(!save_commit(&caller->save->saveCtx));
}
ClassFunction(writeFileSize) {
Variable_t* arg = (*args);
save_data_file_ctx_t dataArc;
if (!save_open_file(&caller->save->saveCtx, &dataArc, arg->string.value, OPEN_MODE_WRITE))
return newIntVariablePtr(1);
if (!save_data_file_set_size(&dataArc, args[1]->integer.value)) {
return newIntVariablePtr(2);
};
return newIntVariablePtr(0);
}
ClassFunctionTableEntry_t saveFunctions[] = {
{"read", readFile, 1, oneStringArgSave},
{"write", writeFile, 2, oneStrOneByteArrayArgSave},
//{"readdir", getFiles, 1, oneStringArgSave}, // Seems broken?
{"commit", saveClassCommit, 0, 0},
{"resize", writeFileSize, 2, oneStringOneIntArgSave},
};
Variable_t getSaveMember(Variable_t* var, char* memberName) {

1
source/script/scriptError.c
View File

@@ -1,7 +1,6 @@
#include "scriptError.h"
#include "compat.h"
#include <stdarg.h>
#include "../hid/hid.h"
s64 scriptCurrentLine;
u8 scriptLastError = 0;

31
source/script/standardLibrary.c
View File

@@ -15,18 +15,15 @@
#include "../keys/keys.h"
#include "../fs/readers/folderReader.h"
#include "../fs/fscopy.h"
#include <mem/heap.h>
#include "../keys/nca.h"
#include "../hid/hid.h"
#include "../gfx/menu.h"
#include "../gfx/gfxutils.h"
#include "../tegraexplorer/tconf.h"
#include "../storage/emummc.h"
#include <utils/util.h>
#include "../fs/fsutils.h"
#include <storage/nx_sd.h>
#include "../storage/emmcfile.h"
#include <soc/fuse.h>
#include <bdk.h>
#endif
// Takes [int, function]. Returns elseable.
ClassFunction(stdIf) {
@@ -46,19 +43,6 @@ ClassFunction(stdIf) {
return ret;
}
// Takes [int]. Returns empty.
ClassFunction(stdSleep)
{
s64 value = getIntValue(args[0]);
if (value)
{
msleep(value);
}
return &emptyClass;
}
// Takes [function, function]. Returns empty. Works by evaling the first function and running the 2nd if true.
ClassFunction(stdWhile) {
Variable_t* result = eval(args[0]->function.function.operations.data, args[0]->function.function.operations.count, 1);
@@ -412,16 +396,6 @@ ClassFunction(stdFileRead){
return copyVariableToPtr(v);
}
ClassFunction(stdFileReadSize) {
u32 fSize = 0;
u8* buff = sd_file_read(args[0]->string.value, &fSize);
if (buff == NULL) {
SCRIPT_FATAL_ERR("Failed to read file");
}
return newIntVariablePtr(fSize);
}
ClassFunction(stdFileWrite){
return newIntVariablePtr(sd_save_to_file(args[1]->solvedArray.vector.data, args[1]->solvedArray.vector.count, args[0]->string.value));
}
@@ -529,7 +503,6 @@ STUBBED(stdFileMove)
STUBBED(stdLaunchPayload)
STUBBED(stdFileWrite)
STUBBED(stdFileRead)
STUBBED(stdFileReadSize)
STUBBED(stdCombinePaths)
STUBBED(stdEmmcFileWrite)
STUBBED(stdEmmcFileRead)
@@ -579,7 +552,6 @@ ClassFunctionTableEntry_t standardFunctionDefenitions[] = {
{"menu", stdMenuFull, 3, menuArgsStd},
{"menu", stdMenuFull, 2, menuArgsStd},
{"power", stdPower, 1, threeIntsStd},
{"sleep", stdSleep, 1, threeIntsStd},
// System
{"mountsys", stdMountSysmmc, 1, twoStringArgStd},
@@ -604,7 +576,6 @@ ClassFunctionTableEntry_t standardFunctionDefenitions[] = {
{"movefile", stdFileMove, 2, twoStringArgStd},
{"delfile", stdFileDel, 1, twoStringArgStd},
{"readfile", stdFileRead, 1, twoStringArgStd},
{"getfilesize", stdFileReadSize, 1, twoStringArgStd},
{"writefile", stdFileWrite, 2, oneStringOneByteArrayStd},
// Utils

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