121 lines
3.5 KiB
C++
121 lines
3.5 KiB
C++
#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <stdbool.h>
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#include <inttypes.h>
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#include <switch.h>
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/* Recompile nx-hbloader with following added in config.json "kernel_capabilities"
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{
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"type": "map",
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"value": {
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"address": "0x60006000",
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"size": "0x1000",
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"is_ro": false,
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"is_io": true
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}
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}
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*/
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void waitForKeyA(PadState pad) {
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while (appletMainLoop()) {
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padUpdate(&pad);
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u64 kDown = padGetButtonsDown(&pad);
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if (kDown & HidNpadButton_A)
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break;
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consoleUpdate(NULL);
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}
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}
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int main() {
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consoleInit(NULL);
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PadState pad;
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padConfigureInput(1, HidNpadStyleSet_NpadStandard);
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padInitializeDefault(&pad);
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// Get clkrst MMIO virtual address
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#define CLK_RST_IO_BASE 0x60006000
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#define CLK_RST_IO_SIZE 0x1000
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u64 virtaddr_base = 0;
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u64 virtaddr_size = 0;
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Result rc = svcQueryIoMapping(&virtaddr_base, &virtaddr_size, CLK_RST_IO_BASE, CLK_RST_IO_SIZE);
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if (R_FAILED(rc)) {
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printf("[ERROR] svcQueryIoMapping: 0x%X\n", rc);
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consoleUpdate(NULL);
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waitForKeyA(pad);
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consoleExit(NULL);
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return -1;
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}
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printf("virtaddr_base: 0x%lX\nvirtaddr_size: 0x%lX\n", virtaddr_base, virtaddr_size);
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#define READ_REG(OFFSET) (*reinterpret_cast<volatile u32 *>(OFFSET))
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#define GET_BITS(VAL, HIGH, LOW) ((VAL & ((1UL << (HIGH + 1UL)) - 1UL)) >> LOW)
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#define GET_BIT(VAL, BIT) GET_BITS(VAL, BIT, BIT)
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{
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#define CLKRST_PLLX_BASE 0xE0
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u32 pllx_base = READ_REG(virtaddr_base + CLKRST_PLLX_BASE);
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printf("\n"\
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"PLLX_BASE: 0x%X\n"\
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"PLLX_ENABLE: %lu\n"\
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"PLLX_REF_DIS: %lu\n"\
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"PLLX_LOCK: %lu\n"\
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"PLLX_DIVP: %lu\n"\
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"PLLX_DIVN: %lu\n"\
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"PLLX_DIVM: %lu",
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pllx_base,
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GET_BIT(pllx_base, 30),
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GET_BIT(pllx_base, 29),
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GET_BIT(pllx_base, 27),
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GET_BITS(pllx_base, 24, 20),
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GET_BITS(pllx_base, 15, 8),
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GET_BITS(pllx_base, 7, 0));
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}
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{
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#define CLKRST_PLLX_MISC 0xE4
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u32 pllx_misc = READ_REG(virtaddr_base + CLKRST_PLLX_MISC);
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printf("\n"\
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"PLLX_MISC: 0x%X\n"\
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"PLLX_FO_G_DISABLE: %lu\n"\
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"PLLX_PTS: %lu\n"\
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"PLLX_LOCK_ENABLE: %lu",
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pllx_misc,
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GET_BIT(pllx_misc, 28),
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GET_BITS(pllx_misc, 23, 22),
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GET_BIT(pllx_misc, 18));
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}
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{
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#define CLKRST_PLLMB_SS_CFG 0x780
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u32 pllmb_ss_cfg = READ_REG(virtaddr_base + CLKRST_PLLMB_SS_CFG);
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printf("\n"\
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"PLLMB_SS_CFG: 0x%X\n"\
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"PLLMB_EN_SDM: %lu\n"\
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"PLLMB_EN_SSC: %lu",
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pllmb_ss_cfg,
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GET_BIT(pllmb_ss_cfg, 31),
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GET_BIT(pllmb_ss_cfg, 30));
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}
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{
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#define CLKRST_PLLMB_SS_CTRL1 0x784
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u32 pllmb_ss_ctrl1 = READ_REG(virtaddr_base + CLKRST_PLLMB_SS_CTRL1);
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printf("\n"\
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"PLLMB_SS_CTRL1: 0x%X\n"\
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"PLLMB_SDM_SSC_MAX: %lu\n"\
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"PLLMB_SDM_SSC_MIN: %lu",
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pllmb_ss_ctrl1,
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GET_BITS(pllmb_ss_ctrl1, 31, 16),
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GET_BITS(pllmb_ss_ctrl1, 15, 0));
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}
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consoleUpdate(NULL);
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waitForKeyA(pad);
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consoleExit(NULL);
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return 0;
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}
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