timing calculation cleanup
This commit is contained in:
@@ -20,6 +20,7 @@
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namespace ams::ldr::oc::pcv::mariko {
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u32 calcClock;
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u32 GetRext() {
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if (auto r = FindRext()) {
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return r->correct;
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@@ -129,9 +130,30 @@ namespace ams::ldr::oc::pcv::mariko {
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}
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}
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/* TODO: Refactor this into multiple functions. */
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void CalculateCore() {
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tCK_avg = 1000'000.0 / calcClock;
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tR2P = 12 + (C.mem_burst_read_latency / 2);
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tRTM = RL + 9 + (tDQSCK_max / tCK_avg) + FLOOR(tRPST) + CEIL(10 / tCK_avg); // Fix?
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tRATM = tRTM + CEIL(10 / tCK_avg) - 12; // Fix?
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quse = FLOOR((-0.0048159 * (calcClock / 1000.0)) + RL_DBI) + (FLOOR((calcClock / 1000.0) * 0.0050997) * 1.5134);
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einput = quse - ((calcClock / 1000.0) * 0.01);
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tW2P = (CEIL(WL * 1.7303) * 2) - 5;
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tW2R = CEIL(MAX(WL + (0.010322547033278747 * (calcClock / 1000.0)), (WL * -0.2067922202979121) + FLOOR(((RL_DBI * -0.1331159971685554) + WL) * 3.654131957826108)) - (tWTR / tCK_avg));
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tWTM = WL + (BL / 2) + 1 + CEIL(7.5 / tCK_avg);
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tWATM = tWTM + CEIL(tWR / tCK_avg);
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wdv = WL;
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wsv = WL - 2;
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wev = 0xA + C.mem_burst_write_latency;
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tCKE = CEIL(1.0795 * CEIL(0.0074472 * (calcClock / 1000.0)));
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tMMRI = tRCD + (tCK_avg * 3);
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pdex2mrr = tMMRI + 10; /* Do this properly? */
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}
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void CalculateTimings(u32 rate_khz) {
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calcClock = rate_khz;
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SetTableMaxClock(rate_khz);
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CalculateCore();
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CalculateMiscTimings();
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CalculateIbdly();
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CalculateObdly();
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@@ -144,4 +166,4 @@ namespace ams::ldr::oc::pcv::mariko {
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CalculateCke2pden();
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}
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}
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}
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@@ -23,6 +23,7 @@ namespace ams::ldr::oc::pcv::mariko {
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void SetTableMaxClock(u32 maxClock) {
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clkMax = maxClock;
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}
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const MiscTimings g_misc_table[] = {
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{1'866'000, 1, 0x20, 0x9, },
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{2'133'000, 1, 0x24, 0xA, },
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@@ -269,4 +270,4 @@ namespace ams::ldr::oc::pcv::mariko {
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return nullptr;
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}
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}
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}
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@@ -1,5 +1,4 @@
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/*
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*
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* Copyright (c) 2025 Lightos_
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*
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* This program is free software; you can redistribute it and/or modify it
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@@ -18,7 +17,7 @@
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#include "mtc_timing_value.hpp"
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namespace ams::ldr::oc::pcv::mariko {
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double tCK_avg = 1000'000.0 / C.marikoEmcMaxClock;
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double tCK_avg = 0;
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u32 tRCD = tRCD_values[C.t1_tRCD];
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u32 tRPpb = tRP_values[C.t2_tRP];
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u32 tRAS = tRAS_values[C.t3_tRAS];
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@@ -27,16 +26,16 @@ namespace ams::ldr::oc::pcv::mariko {
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u32 tWTR = 10 - tWTR_values[C.t7_tWTR];
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u32 tRC = tRAS + tRPpb;
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u32 tRFCab = tRFCpb * 2;
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double tXSR = (double) (tRFCab + 7.5);
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double tXSR = static_cast<double>(tRFCab + 7.5);
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u32 tFAW = static_cast<u32>(tRRD * 4.0);
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double tRPab = tRPpb + 3;
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u32 tR2P = 12 + (C.mem_burst_read_latency / 2);
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u32 tR2P = 0;
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u32 tR2W = 0;
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u32 tRTM = RL + 9 + (tDQSCK_max / tCK_avg) + FLOOR(tRPST) + CEIL(10 / tCK_avg);
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u32 tRATM = tRTM + CEIL(10 / tCK_avg) - 12;
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u32 tRTM = 0;
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u32 tRATM = 0;
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u32 rdv = 0;
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u32 quse = FLOOR((-0.0048159 * (C.marikoEmcMaxClock / 1000.0)) + RL_DBI) + (FLOOR((C.marikoEmcMaxClock / 1000.0) * 0.0050997) * 1.5134);
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u32 einput = quse - ((C.marikoEmcMaxClock / 1000.0) * 0.01);
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u32 quse = 0;
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u32 einput = 0;
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u32 einput_duration = 0;
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u32 ibdly = 0;
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u32 obdly = 0;
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@@ -45,17 +44,17 @@ namespace ams::ldr::oc::pcv::mariko {
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u32 qrst = 0;
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u32 qsafe = 0;
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u32 qpop = 0;
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u32 tW2P = (CEIL(WL * 1.7303) * 2) - 5;
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u32 tW2P = 0;
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u32 tWTPDEN = 0;
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u32 tW2R = CEIL(MAX(WL + (0.010322547033278747 * (C.marikoEmcMaxClock / 1000.0)), (WL * -0.2067922202979121) + FLOOR(((RL_DBI * -0.1331159971685554) + WL) * 3.654131957826108)) - (tWTR / tCK_avg));
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u32 tWTM = WL + (BL / 2) + 1 + CEIL(7.5 / tCK_avg);
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u32 tWATM = tWTM + CEIL(tWR / tCK_avg);
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u32 wdv = WL;
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u32 wsv = WL - 2;
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u32 wev = 0xA + C.mem_burst_write_latency;
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u32 tW2R = 0;
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u32 tWTM = 0;
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u32 tWATM = 0;
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u32 wdv = 0;
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u32 wsv = 0;
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u32 wev = 0;
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u32 pdex2rw = 0;
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u32 cke2pden = 0;
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u32 tCKE = CEIL(1.0795 * CEIL(0.0074472 * (C.marikoEmcMaxClock / 1000.0)));
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double tMMRI = tRCD + (tCK_avg * 3);
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double pdex2mrr = tMMRI + 10;
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}
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u32 tCKE = 0;
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double tMMRI = 0;
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double pdex2mrr = 0;
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}
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@@ -413,34 +413,6 @@ namespace ams::ldr::oc::pcv::mariko {
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}
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void MemMtcTableAutoAdjust(MarikoMtcTable *table) {
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tCK_avg = 1000'000.0 / table->rate_khz;
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tRCD = tRCD_values[C.t1_tRCD];
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tRPpb = tRP_values[C.t2_tRP];
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tRAS = tRAS_values[C.t3_tRAS];
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tRRD = tRRD_values[C.t4_tRRD];
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tRFCpb = tRFC_values[C.t5_tRFC];
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tWTR = 10 - tWTR_values[C.t7_tWTR];
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tRC = tRAS + tRPpb;
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tRFCab = tRFCpb * 2;
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tXSR = (double) (tRFCab + 7.5);
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tFAW = static_cast<u32>(tRRD * 4.0);
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tRPab = tRPpb + 3;
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tR2P = 12 + (C.mem_burst_read_latency / 2);
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tRTM = RL + 9 + (tDQSCK_max / tCK_avg) + FLOOR(tRPST) + CEIL(10 / tCK_avg); // Fix?
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tRATM = tRTM + CEIL(10 / tCK_avg) - 12; // Fix?
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quse = FLOOR((-0.0048159 * (table->rate_khz / 1000.0)) + RL_DBI) + (FLOOR((table->rate_khz / 1000.0) * 0.0050997) * 1.5134);
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einput = quse - ((table->rate_khz / 1000.0) * 0.01);
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tW2P = (CEIL(WL * 1.7303) * 2) - 5;
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tW2R = CEIL(MAX(WL + (0.010322547033278747 * (table->rate_khz / 1000.0)), (WL * -0.2067922202979121) + FLOOR(((RL_DBI * -0.1331159971685554) + WL) * 3.654131957826108)) - (tWTR / tCK_avg));
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tWTM = WL + (BL / 2) + 1 + CEIL(7.5 / tCK_avg);
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tWATM = tWTM + CEIL(tWR / tCK_avg);
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wdv = WL;
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wsv = WL - 2;
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wev = 0xA + C.mem_burst_write_latency;
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tCKE = CEIL(1.0795 * CEIL(0.0074472 * (table->rate_khz / 1000.0)));
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tMMRI = tRCD + (tCK_avg * 3);
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pdex2mrr = tMMRI + 10; /* Do this properly? */
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#define WRITE_PARAM_ALL_REG(TABLE, PARAM, VALUE) \
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TABLE->burst_regs.PARAM = VALUE; \
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TABLE->shadow_regs_ca_train.PARAM = VALUE; \
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@@ -616,7 +588,7 @@ namespace ams::ldr::oc::pcv::mariko {
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table->emc_mrw2 = 0x8802003F;
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table->emc_cfg_2 = 0x11083D;
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}
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// void MemMtcTableAutoAdjust(MarikoMtcTable *table) {
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// /* Official Tegra X1 TRM, sign up for nvidia developer program (free) to download:
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// * https://developer.nvidia.com/embedded/dlc/tegra-x1-technical-reference-manual
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