timing calculation cleanup

This commit is contained in:
Lightos1
2026-01-01 23:17:56 +01:00
parent ea20003df0
commit f1a13e0955
4 changed files with 44 additions and 50 deletions

View File

@@ -20,6 +20,7 @@
namespace ams::ldr::oc::pcv::mariko {
u32 calcClock;
u32 GetRext() {
if (auto r = FindRext()) {
return r->correct;
@@ -129,9 +130,30 @@ namespace ams::ldr::oc::pcv::mariko {
}
}
/* TODO: Refactor this into multiple functions. */
void CalculateCore() {
tCK_avg = 1000'000.0 / calcClock;
tR2P = 12 + (C.mem_burst_read_latency / 2);
tRTM = RL + 9 + (tDQSCK_max / tCK_avg) + FLOOR(tRPST) + CEIL(10 / tCK_avg); // Fix?
tRATM = tRTM + CEIL(10 / tCK_avg) - 12; // Fix?
quse = FLOOR((-0.0048159 * (calcClock / 1000.0)) + RL_DBI) + (FLOOR((calcClock / 1000.0) * 0.0050997) * 1.5134);
einput = quse - ((calcClock / 1000.0) * 0.01);
tW2P = (CEIL(WL * 1.7303) * 2) - 5;
tW2R = CEIL(MAX(WL + (0.010322547033278747 * (calcClock / 1000.0)), (WL * -0.2067922202979121) + FLOOR(((RL_DBI * -0.1331159971685554) + WL) * 3.654131957826108)) - (tWTR / tCK_avg));
tWTM = WL + (BL / 2) + 1 + CEIL(7.5 / tCK_avg);
tWATM = tWTM + CEIL(tWR / tCK_avg);
wdv = WL;
wsv = WL - 2;
wev = 0xA + C.mem_burst_write_latency;
tCKE = CEIL(1.0795 * CEIL(0.0074472 * (calcClock / 1000.0)));
tMMRI = tRCD + (tCK_avg * 3);
pdex2mrr = tMMRI + 10; /* Do this properly? */
}
void CalculateTimings(u32 rate_khz) {
calcClock = rate_khz;
SetTableMaxClock(rate_khz);
CalculateCore();
CalculateMiscTimings();
CalculateIbdly();
CalculateObdly();
@@ -144,4 +166,4 @@ namespace ams::ldr::oc::pcv::mariko {
CalculateCke2pden();
}
}
}

View File

@@ -23,6 +23,7 @@ namespace ams::ldr::oc::pcv::mariko {
void SetTableMaxClock(u32 maxClock) {
clkMax = maxClock;
}
const MiscTimings g_misc_table[] = {
{1'866'000, 1, 0x20, 0x9, },
{2'133'000, 1, 0x24, 0xA, },
@@ -269,4 +270,4 @@ namespace ams::ldr::oc::pcv::mariko {
return nullptr;
}
}
}

View File

@@ -1,5 +1,4 @@
/*
*
* Copyright (c) 2025 Lightos_
*
* This program is free software; you can redistribute it and/or modify it
@@ -18,7 +17,7 @@
#include "mtc_timing_value.hpp"
namespace ams::ldr::oc::pcv::mariko {
double tCK_avg = 1000'000.0 / C.marikoEmcMaxClock;
double tCK_avg = 0;
u32 tRCD = tRCD_values[C.t1_tRCD];
u32 tRPpb = tRP_values[C.t2_tRP];
u32 tRAS = tRAS_values[C.t3_tRAS];
@@ -27,16 +26,16 @@ namespace ams::ldr::oc::pcv::mariko {
u32 tWTR = 10 - tWTR_values[C.t7_tWTR];
u32 tRC = tRAS + tRPpb;
u32 tRFCab = tRFCpb * 2;
double tXSR = (double) (tRFCab + 7.5);
double tXSR = static_cast<double>(tRFCab + 7.5);
u32 tFAW = static_cast<u32>(tRRD * 4.0);
double tRPab = tRPpb + 3;
u32 tR2P = 12 + (C.mem_burst_read_latency / 2);
u32 tR2P = 0;
u32 tR2W = 0;
u32 tRTM = RL + 9 + (tDQSCK_max / tCK_avg) + FLOOR(tRPST) + CEIL(10 / tCK_avg);
u32 tRATM = tRTM + CEIL(10 / tCK_avg) - 12;
u32 tRTM = 0;
u32 tRATM = 0;
u32 rdv = 0;
u32 quse = FLOOR((-0.0048159 * (C.marikoEmcMaxClock / 1000.0)) + RL_DBI) + (FLOOR((C.marikoEmcMaxClock / 1000.0) * 0.0050997) * 1.5134);
u32 einput = quse - ((C.marikoEmcMaxClock / 1000.0) * 0.01);
u32 quse = 0;
u32 einput = 0;
u32 einput_duration = 0;
u32 ibdly = 0;
u32 obdly = 0;
@@ -45,17 +44,17 @@ namespace ams::ldr::oc::pcv::mariko {
u32 qrst = 0;
u32 qsafe = 0;
u32 qpop = 0;
u32 tW2P = (CEIL(WL * 1.7303) * 2) - 5;
u32 tW2P = 0;
u32 tWTPDEN = 0;
u32 tW2R = CEIL(MAX(WL + (0.010322547033278747 * (C.marikoEmcMaxClock / 1000.0)), (WL * -0.2067922202979121) + FLOOR(((RL_DBI * -0.1331159971685554) + WL) * 3.654131957826108)) - (tWTR / tCK_avg));
u32 tWTM = WL + (BL / 2) + 1 + CEIL(7.5 / tCK_avg);
u32 tWATM = tWTM + CEIL(tWR / tCK_avg);
u32 wdv = WL;
u32 wsv = WL - 2;
u32 wev = 0xA + C.mem_burst_write_latency;
u32 tW2R = 0;
u32 tWTM = 0;
u32 tWATM = 0;
u32 wdv = 0;
u32 wsv = 0;
u32 wev = 0;
u32 pdex2rw = 0;
u32 cke2pden = 0;
u32 tCKE = CEIL(1.0795 * CEIL(0.0074472 * (C.marikoEmcMaxClock / 1000.0)));
double tMMRI = tRCD + (tCK_avg * 3);
double pdex2mrr = tMMRI + 10;
}
u32 tCKE = 0;
double tMMRI = 0;
double pdex2mrr = 0;
}

View File

@@ -413,34 +413,6 @@ namespace ams::ldr::oc::pcv::mariko {
}
void MemMtcTableAutoAdjust(MarikoMtcTable *table) {
tCK_avg = 1000'000.0 / table->rate_khz;
tRCD = tRCD_values[C.t1_tRCD];
tRPpb = tRP_values[C.t2_tRP];
tRAS = tRAS_values[C.t3_tRAS];
tRRD = tRRD_values[C.t4_tRRD];
tRFCpb = tRFC_values[C.t5_tRFC];
tWTR = 10 - tWTR_values[C.t7_tWTR];
tRC = tRAS + tRPpb;
tRFCab = tRFCpb * 2;
tXSR = (double) (tRFCab + 7.5);
tFAW = static_cast<u32>(tRRD * 4.0);
tRPab = tRPpb + 3;
tR2P = 12 + (C.mem_burst_read_latency / 2);
tRTM = RL + 9 + (tDQSCK_max / tCK_avg) + FLOOR(tRPST) + CEIL(10 / tCK_avg); // Fix?
tRATM = tRTM + CEIL(10 / tCK_avg) - 12; // Fix?
quse = FLOOR((-0.0048159 * (table->rate_khz / 1000.0)) + RL_DBI) + (FLOOR((table->rate_khz / 1000.0) * 0.0050997) * 1.5134);
einput = quse - ((table->rate_khz / 1000.0) * 0.01);
tW2P = (CEIL(WL * 1.7303) * 2) - 5;
tW2R = CEIL(MAX(WL + (0.010322547033278747 * (table->rate_khz / 1000.0)), (WL * -0.2067922202979121) + FLOOR(((RL_DBI * -0.1331159971685554) + WL) * 3.654131957826108)) - (tWTR / tCK_avg));
tWTM = WL + (BL / 2) + 1 + CEIL(7.5 / tCK_avg);
tWATM = tWTM + CEIL(tWR / tCK_avg);
wdv = WL;
wsv = WL - 2;
wev = 0xA + C.mem_burst_write_latency;
tCKE = CEIL(1.0795 * CEIL(0.0074472 * (table->rate_khz / 1000.0)));
tMMRI = tRCD + (tCK_avg * 3);
pdex2mrr = tMMRI + 10; /* Do this properly? */
#define WRITE_PARAM_ALL_REG(TABLE, PARAM, VALUE) \
TABLE->burst_regs.PARAM = VALUE; \
TABLE->shadow_regs_ca_train.PARAM = VALUE; \
@@ -616,7 +588,7 @@ namespace ams::ldr::oc::pcv::mariko {
table->emc_mrw2 = 0x8802003F;
table->emc_cfg_2 = 0x11083D;
}
// void MemMtcTableAutoAdjust(MarikoMtcTable *table) {
// /* Official Tegra X1 TRM, sign up for nvidia developer program (free) to download:
// * https://developer.nvidia.com/embedded/dlc/tegra-x1-technical-reference-manual