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Mariko: Add CPU UV

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Lightos1
2025-12-09 21:30:56 +01:00
parent 89f91fda14
commit d11afd7c44
6 changed files with 514 additions and 372 deletions
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301
Source/Atmosphere/stratosphere/loader/source/oc/customize.cpp
View File

@@ -32,61 +32,52 @@ namespace ams::ldr::oc {
volatile CustomizeTable C = {
.mtcConf = AUTO_ADJ_BL,
.hpMode = ENABLED,
.commonCpuBoostClock = 2397000, // Default boost clock
.commonEmcMemVolt = 1175000, // LPDDR4X JEDEC Specification
.eristaCpuMaxVolt = 1235,
.eristaEmcMaxClock = 1862400, // Maximum HB-MGCH ram rating
.marikoCpuMaxVolt = 1185,
.marikoEmcMaxClock = 2133000, // Hynix NME and Samsung AM-MGCJ Rating (others are 4766MT, 2133MHz)
.marikoEmcMaxClock = 2933000, // Hynix NME and Samsung AM-MGCJ Rating (others are 4766MT, 2133MHz)
.marikoEmcVddqVolt = 640000,
.marikoCpuUV = 0, // No undervolt
.marikoGpuUV = 3,
.eristaCpuUV = 0,
.eristaGpuUV = 3,
.commonGpuVoltOffset = 0,
.emcDvbShift = 10,
// Primary
.t1_tRCD = 0,
.t2_tRP = 0,
.t3_tRAS = 0,
.t1_tRCD = 4,
.t2_tRP = 4,
.t3_tRAS = 8,
// Secondary
.t4_tRRD = 0,
.t5_tRFC = 0,
.t6_tRTW = 0,
.t7_tWTR = 0,
.t8_tREFI = 0,
.t4_tRRD = 5,
.t5_tRFC = 5,
.t6_tRTW = 7,
.t7_tWTR = 8,
.t8_tREFI = 6,
/* Set to 4 read and 2 write for 1866bl. */
/* For 2131bl: 8 read and 4 write. */
.mem_burst_read_latency = 8,
.mem_burst_write_latency = 4,
.marikoCpuHighVmin = 750,
.eristaCpuUV = 0,
.eristaCpuMaxVolt = 1235,
.marikoCpuLowVmin = 680,
.marikoCpuUVLow = 8, // No undervolt
.marikoCpuUVHigh = 1, // No undervolt
.tableConf = AUTO,
.marikoCpuLowVmin = 590,
.marikoCpuHighVmin = 735,
.marikoCpuMaxVolt = 1180,
.commonCpuBoostClock = 2397000, // Default boost clock
.eristaGpuUV = 3,
.eristaGpuVmin = 810,
.marikoGpuUV = 3,
.marikoGpuVmin = 610,
.marikoGpuVmax = 850,
.commonGpuVoltOffset = 0,
/* >1305 GPU unlock. */
/* WARNING! This removes ALL gpu frequency limits and risks permanent hardware damage. */
/* This setting is very dangerous and can damage your pmic, degrade your soc, damage the voltage rails and can cause various other damage. */
@@ -96,34 +87,6 @@ volatile CustomizeTable C = {
// NOTE: These tables should NOT BE USED and are only here as placeholders. Always try and find your own optimal tables.
// Ensure the voltages actually increase or stay the sameot
.marikoGpuVoltArray = {
785 /* 76 */,
785 /* 153 */,
785 /* 230 */,
785 /* 307 */,
785 /* 384 */,
785 /* 460 */,
785 /* 537 */,
785 /* 614 */,
785 /* 691 */,
785 /* 768 */,
785 /* 844 */,
785 /* 921 */,
785 /* 998 */,
785 /* 1075 */,
785 /* 1152 */,
785 /* 1228 */,
800 /* 1267 (Disabled by default) */,
810 /* 1305 (Disabled by default) */,
960 /* 1344 (Disabled by default) */,
960 /* 1382 (Disabled by default) */,
960 /* 1420 (Disabled by default) */,
960 /* 1459 (Disabled by default) */,
0 /* 1497 (Disabled by default) */,
0 /* 1536 (Disabled by default) */,
},
.eristaGpuVoltArray = {
750 /* 76 */,
750 /* 115 */,
@@ -154,7 +117,34 @@ volatile CustomizeTable C = {
0 /* 1075 (Disabled by default) */,
},
/* Advanced Settings:
.marikoGpuVoltArray = {
785 /* 76 */,
785 /* 153 */,
785 /* 230 */,
785 /* 307 */,
785 /* 384 */,
785 /* 460 */,
785 /* 537 */,
785 /* 614 */,
785 /* 691 */,
785 /* 768 */,
785 /* 844 */,
785 /* 921 */,
785 /* 998 */,
785 /* 1075 */,
785 /* 1152 */,
785 /* 1228 */,
800 /* 1267 (Disabled by default) */,
810 /* 1305 (Disabled by default) */,
960 /* 1344 (Disabled by default) */,
960 /* 1382 (Disabled by default) */,
960 /* 1420 (Disabled by default) */,
960 /* 1459 (Disabled by default) */,
0 /* 1497 (Disabled by default) */,
0 /* 1536 (Disabled by default) */,
},
/* Advanced settings:
* - Erista CPU DVFS Table:
*/
.eristaCpuDvfsTable = {
@@ -185,55 +175,140 @@ volatile CustomizeTable C = {
* 2397000 might not work for some SoCs.
*/
.marikoCpuDvfsTable = {
{ 204000, { 721589, -12695, 27 }, {} },
{ 306000, { 747134, -14195, 27 }, {} },
{ 408000, { 776324, -15705, 27 }, {} },
{ 510000, { 809160, -17205, 27 }, {} },
{ 612000, { 845641, -18715, 27 }, {} },
{ 714000, { 885768, -20215, 27 }, {} },
{ 816000, { 929540, -21725, 27 }, {} },
{ 918000, { 976958, -23225, 27 }, {} },
{ 1020000, { 1028021, -24725, 27 }, { 1120000 } },
{ 1122000, { 1082730, -26235, 27 }, { 1120000 } },
{ 1224000, { 1141084, -27735, 27 }, { 1120000 } },
{ 1326000, { 1203084, -29245, 27 }, { 1120000 } },
{ 1428000, { 1268729, -30745, 27 }, { 1120000 } },
{ 1581000, { 1374032, -33005, 27 }, { 1120000 } },
{ 1683000, { 1448791, -34505, 27 }, { 1120000 } },
{ 1785000, { 1527196, -36015, 27 }, { 1120000 } },
{ 1887000, { 1609246, -37515, 27 }, { 1120000 } },
{ 1963500, { 1675751, -38635, 27 }, { 1120000 } },
{ 2091000, { 1716501, -39395, 27 }, { CPU_MAX_MAX_VOLT } },
{ 2193000, { 1775132, -40505, 27 }, { CPU_MAX_MAX_VOLT } },
{ 2295000, { 1866287, -42005, 27 }, { CPU_MAX_MAX_VOLT } },
{ 204000, { 721589, -12695, 27, }, { } },
{ 306000, { 747134, -14195, 27, }, { } },
{ 408000, { 776324, -15705, 27, }, { } },
{ 510000, { 809160, -17205, 27, }, { } },
{ 612000, { 845641, -18715, 27, }, { } },
{ 714000, { 885768, -20215, 27, }, { } },
{ 816000, { 929540, -21725, 27, }, { } },
{ 918000, { 976958, -23225, 27, }, { } },
{ 1020000, { 1028021, -24725, 27, }, { 1120000, } },
{ 1122000, { 1082730, -26235, 27, }, { 1120000, } },
{ 1224000, { 1141084, -27735, 27, }, { 1120000, } },
{ 1326000, { 1203084, -29245, 27, }, { 1120000, } },
{ 1428000, { 1268729, -30745, 27, }, { 1120000, } },
{ 1581000, { 1374032, -33005, 27, }, { 1120000, } },
{ 1683000, { 1448791, -34505, 27, }, { 1120000, } },
{ 1785000, { 1527196, -36015, 27, }, { 1120000, } },
{ 1887000, { 1609246, -37515, 27, }, { 1120000, } },
{ 1963500, { 1675751, -38635, 27, }, { 1120000, } },
{ 2091000, { 1716501, -39395, 27, }, { CPU_MAX_MAX_VOLT, } },
{ 2193000, { 1775132, -40505, 27, }, { CPU_MAX_MAX_VOLT, } },
{ 2295000, { 1866287, -42005, 27, }, { CPU_MAX_MAX_VOLT, } },
{ 2397000, { 1961107, -43506, 27, }, { CPU_MAX_MAX_VOLT, } },
},
.marikoCpuDvfsTableSLT = {
{ 612000, { 853926, -20775, 113 }, {} },
{ 714000, { 889361, -21625, 113 }, {} },
{ 816000, { 926862, -22485, 113 }, {} },
{ 918000, { 966431, -23345, 113 }, {} },
{ 1020000, { 1008066, -24205, 113 }, { 1120000 } },
{ 1122000, { 1051768, -25065, 113 }, { 1120000 } },
{ 1224000, { 1097537, -25925, 113 }, { 1120000 } },
{ 1326000, { 1145373, -26785, 113 }, { 1120000 } },
{ 1428000, { 1195276, -27645, 113 }, { 1120000 } },
{ 1581000, { 1274006, -28935, 113 }, { 1120000 } },
{ 1683000, { 1329076, -29795, 113 }, { 1120000 } },
{ 1785000, { 1386213, -30655, 113 }, { 1120000 } },
{ 1887000, { 1445416, -31515, 113 }, { 1120000 } },
{ 1963500, { 1490873, -32155, 113 }, { 1120000 } },
// Appending table
{ 2091000, { 1580725, -33235, 113 }, { CPU_MAX_MAX_VOLT } },
{ 2193000, { 1580725, -33235, 113 }, { CPU_MAX_MAX_VOLT } },
{ 2295000, { 1635431, -34095, 113 }, { CPU_MAX_MAX_VOLT } },
{ 2397000, { 1702903, -34955, 113 }, { CPU_MAX_MAX_VOLT } },
{ 2499000, { 1754400, -35643, 113 }, { CPU_MAX_MAX_VOLT } },
{ 2601000, { 1805897, -36331, 113 }, { CPU_MAX_MAX_VOLT } },
{ 2703000, { 1857394, -37019, 113 }, { CPU_MAX_MAX_VOLT } },
{ 2805000, { 1908891, -37707, 113 }, { CPU_MAX_MAX_VOLT } },
{ 2907000, { 1960388, -38395, 113 }, { CPU_MAX_MAX_VOLT } },
{ 204000, { 732856, -17335, 113, }, { } },
{ 306000, { 760024, -18195, 113, }, { } },
{ 408000, { 789258, -19055, 113, }, { } },
{ 510000, { 789258, -19055, 113, }, { } },
{ 612000, { 789258, -19055, 113, }, { } },
{ 714000, { 789258, -19055, 113, }, { } },
{ 816000, { 789258, -19055, 113, }, { } },
{ 918000, { 820558, -19055, 113, }, { } },
{ 1020000, { 853926, -20775, 113, }, { 1120000, } },
{ 1122000, { 889361, -21625, 113, }, { 1120000, } },
{ 1224000, { 926862, -22485, 113, }, { 1120000, } },
{ 1326000, { 926862, -22485, 113, }, { 1120000, } },
{ 1428000, { 926862, -22485, 113, }, { 1120000, } },
{ 1581000, { 966431, -23345, 113, }, { 1120000, } },
{ 1683000, { 1097537, -25925, 113, }, { 1120000, } },
{ 1785000, { 1145373, -26785, 113, }, { 1120000, } },
{ 1887000, { 1195276, -27645, 113, }, { 1120000, } },
{ 1963500, { 1274006, -29795, 113, }, { 1120000, } },
{ 2091000, { 1349076, -33235, 113, }, { 1120000, } },
{ 2193000, { 1386213, -33235, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2295000, { 1445416, -34095, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2397000, { 1490873, -34955, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2499000, { 1580725, -35815, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2601000, { 1702903, -36675, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2703000, { 1770375, -37515, 113, }, { CPU_MAX_MAX_VOLT, } },
},
.marikoCpuDvfsTable1581Tbreak {
{ 204000, { 732856, -17335, 113, }, { } },
{ 306000, { 760024, -18195, 113, }, { } },
{ 408000, { 789258, -19055, 113, }, { } },
{ 510000, { 789258, -19055, 113, }, { } },
{ 612000, { 853926, -20775, 113, }, { } },
{ 714000, { 889361, -21625, 113, }, { } },
{ 816000, { 926862, -22485, 113, }, { } },
{ 918000, { 966431, -23345, 113, }, { } },
{ 1020000, { 1008066, -24205, 113, }, { 1120000, } },
{ 1122000, { 1008066, -24205, 113, }, { 1120000, } },
{ 1224000, { 1008066, -24205, 113, }, { 1120000, } },
{ 1326000, { 1008066, -24205, 113, }, { 1120000, } },
{ 1428000, { 1008066, -24205, 113, }, { 1120000, } },
{ 1581000, { 1274006, -28935, 113, }, { 1120000, } },
{ 1683000, { 1329076, -29795, 113, }, { 1120000, } },
{ 1785000, { 1386213, -30655, 113, }, { 1120000, } },
{ 1887000, { 1445416, -31515, 113, }, { 1120000, } },
{ 1963500, { 1490873, -32155, 113, }, { 1120000, } },
{ 2091000, { 1580725, -33235, 113, }, { 1120000, } },
{ 2193000, { 1580725, -33235, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2295000, { 1635431, -34095, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2397000, { 1702903, -34955, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2499000, { 1736856, -35286, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2601000, { 1787838, -35967, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2703000, { 1838820, -36648, 113, }, { CPU_MAX_MAX_VOLT, } },
},
.marikoCpuDvfsTable1683Tbreak {
{ 204000, { 732856, -17335, 113, }, { } },
{ 306000, { 760024, -18195, 113, }, { } },
{ 408000, { 789258, -19055, 113, }, { } },
{ 510000, { 789258, -19055, 113, }, { } },
{ 612000, { 853926, -20775, 113, }, { } },
{ 714000, { 889361, -21625, 113, }, { } },
{ 816000, { 926862, -22485, 113, }, { } },
{ 918000, { 966431, -23345, 113, }, { } },
{ 1020000, { 1008066, -24205, 113, }, { 1120000, } },
{ 1122000, { 1008066, -24205, 113, }, { 1120000, } },
{ 1224000, { 1008066, -24205, 113, }, { 1120000, } },
{ 1326000, { 1008066, -24205, 113, }, { 1120000, } },
{ 1428000, { 1008066, -24205, 113, }, { 1120000, } },
{ 1581000, { 1008066, -24205, 113, }, { 1120000, } },
{ 1683000, { 1329076, -29795, 113, }, { 1120000, } },
{ 1785000, { 1386213, -30655, 113, }, { 1120000, } },
{ 1887000, { 1445416, -31515, 113, }, { 1120000, } },
{ 1963500, { 1490873, -32155, 113, }, { 1120000, } },
{ 2091000, { 1580725, -33235, 113, }, { 1120000, } },
{ 2193000, { 1580725, -33235, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2295000, { 1635431, -34095, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2397000, { 1702903, -34955, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2499000, { 1736856, -35286, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2601000, { 1787838, -35967, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2703000, { 1838820, -36648, 113, }, { CPU_MAX_MAX_VOLT, } },
},
.marikoCpuDvfsTableHelios {
{ 204000, { 732856, -17335, 113, }, { } },
{ 306000, { 760024, -18195, 113, }, { } },
{ 408000, { 789258, -19055, 113, }, { } },
{ 510000, { 789258, -19915, 113, }, { } },
{ 612000, { 789258, -19055, 113, }, { } },
{ 714000, { 820558, -19915, 113, }, { } },
{ 816000, { 853926, -20775, 113, }, { } },
{ 918000, { 889361, -21625, 113, }, { } },
{ 1020000, { 926862, -22485, 113, }, { 1120000, } },
{ 1122000, { 926862, -22485, 113, }, { 1120000, } },
{ 1224000, { 926862, -22485, 113, }, { 1120000, } },
{ 1326000, { 966431, -23345, 113, }, { 1120000, } },
{ 1428000, { 1008066, -24205, 113, }, { 1120000, } },
{ 1581000, { 1051768, -25065, 113, }, { 1120000, } },
{ 1683000, { 1097537, -25925, 113, }, { 1120000, } },
{ 1785000, { 1145373, -26785, 113, }, { 1120000, } },
{ 1887000, { 1195276, -27645, 113, }, { 1120000, } },
{ 1963500, { 1274006, -29795, 113, }, { 1120000, } },
{ 2091000, { 1349076, -33235, 113, }, { 1120000, } },
{ 2193000, { 1386213, -33235, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2295000, { 1445416, -34095, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2397000, { 1490873, -34955, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2499000, { 1580725, -35815, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2601000, { 1702903, -36675, 113, }, { CPU_MAX_MAX_VOLT, } },
{ 2703000, { 1770375, -37515, 113, }, { CPU_MAX_MAX_VOLT, } },
},
/* - Erista GPU DVFS Table:
@@ -277,8 +352,8 @@ volatile CustomizeTable C = {
{ 307200, { }, { 898077, 8144, -940, 808, -21583, 226 } },
{ 345600, { }, { 939968, 8144, -940, 808, -21583, 226 } },
{ 384000, { }, { 939968, 8144, -940, 808, -21583, 226 } },
{ 422400, { }, { 981860, 8144, -940, 808, -21583, 226 } },
{ 460800, { }, { 981860, 8144, -940, 808, -21583, 226 } },
{ 422400, { }, { 981860, 8144, -940, 808, -21583, 226 } },
{ 460800, { }, { 981860, 8144, -940, 808, -21583, 226 } },
{ 499200, { }, { 1023751, 8144, -940, 808, -21583, 226 } },
{ 537600, { }, { 1023751, 8144, -940, 808, -21583, 226 } },
{ 576000, { }, { 1065642, 8144, -940, 808, -21583, 226 } },
@@ -306,10 +381,10 @@ volatile CustomizeTable C = {
{ 307200, { }, { 856185, 8144, -940, 808, -21583, 226 } },
{ 345600, { }, { 898077, 8144, -940, 808, -21583, 226 } },
{ 384000, { }, { 898077, 8144, -940, 808, -21583, 226 } },
{ 422400, { }, { 939968, 8144, -940, 808, -21583, 226 } },
{ 460800, { }, { 939968, 8144, -940, 808, -21583, 226 } },
{ 499200, { }, { 981860, 8144, -940, 808, -21583, 226 } },
{ 537600, { }, { 981860, 8144, -940, 808, -21583, 226 } },
{ 422400, { }, { 939968, 8144, -940, 808, -21583, 226 } },
{ 460800, { }, { 939968, 8144, -940, 808, -21583, 226 } },
{ 499200, { }, { 981860, 8144, -940, 808, -21583, 226 } },
{ 537600, { }, { 981860, 8144, -940, 808, -21583, 226 } },
{ 576000, { }, { 1023751, 8144, -940, 808, -21583, 226 } },
{ 614400, { }, { 1023751, 8144, -940, 808, -21583, 226 } },
{ 652800, { }, { 1065642, 8144, -940, 808, -21583, 226 } },

49
Source/Atmosphere/stratosphere/loader/source/oc/customize.hpp
View File

@@ -34,6 +34,14 @@ enum MtcConfig: u32 {
AUTO_ADJ_BL = 1,
};
enum TableConfig: u32 {
AUTO = 0,
DEFAULT_TABLE = 1,
TBREAK_1581 = 2,
TBREAK_1683 = 3,
HELIOS_TABLE = 4,
};
using CustomizeCpuDvfsTable = pcv::cvb_entry_t[pcv::DvfsTableEntryLimit];
using CustomizeGpuDvfsTable = pcv::cvb_entry_t[pcv::DvfsTableEntryLimit];
static_assert(sizeof(CustomizeCpuDvfsTable) == sizeof(CustomizeGpuDvfsTable));
@@ -45,24 +53,15 @@ constexpr uint32_t MARIKO_MTC_MAGIC = 0x43544D4D; // MMTC
typedef struct CustomizeTable {
u8 cust[4] = {'C', 'U', 'S', 'T'};
u32 custRev = CUST_REV;
u32 mtcConf = AUTO_ADJ;
u32 mtcConf;
u32 hpMode;
u32 commonCpuBoostClock;
u32 commonEmcMemVolt;
u32 eristaCpuMaxVolt;
u32 eristaEmcMaxClock;
u32 marikoCpuMaxVolt;
u32 marikoEmcMaxClock;
u32 marikoEmcVddqVolt;
u32 marikoCpuUV;
u32 marikoGpuUV;
u32 eristaCpuUV;
u32 eristaGpuUV;
u32 commonGpuVoltOffset;
u32 emcDvbShift;
// advanced config
@@ -78,21 +77,39 @@ typedef struct CustomizeTable {
u32 mem_burst_read_latency;
u32 mem_burst_write_latency;
u32 marikoCpuHighVmin;
u32 marikoCpuLowVmin;
u32 eristaCpuUV;
u32 eristaCpuMaxVolt;
u32 marikoCpuUVLow;
u32 marikoCpuUVHigh;
u32 tableConf;
u32 marikoCpuLowVmin;
u32 marikoCpuHighVmin;
u32 marikoCpuMaxVolt;
u32 commonCpuBoostClock;
u32 eristaGpuUV;
u32 eristaGpuVmin;
u32 marikoGpuUV;
u32 marikoGpuVmin;
u32 marikoGpuVmax;
u32 commonGpuVoltOffset;
u32 marikoGpuFullUnlock;
u32 marikoGpuVoltArray[24];
u32 eristaGpuVoltArray[27];
u32 marikoGpuVoltArray[24];
CustomizeCpuDvfsTable eristaCpuDvfsTable;
CustomizeCpuDvfsTable marikoCpuDvfsTable;
CustomizeCpuDvfsTable marikoCpuDvfsTableSLT;
CustomizeCpuDvfsTable marikoCpuDvfsTable1581Tbreak;
CustomizeCpuDvfsTable marikoCpuDvfsTable1683Tbreak;
CustomizeCpuDvfsTable marikoCpuDvfsTableHelios;
CustomizeGpuDvfsTable eristaGpuDvfsTable;
CustomizeGpuDvfsTable eristaGpuDvfsTableSLT;

3
Source/Atmosphere/stratosphere/loader/source/oc/mtc_timing_value.hpp
View File

@@ -38,7 +38,7 @@ namespace ams::ldr::oc {
const std::array<u32, 8> tRCD_values = {18, 17, 16, 15, 14, 13, 12, 11};
const std::array<u32, 8> tRP_values = {18, 17, 16, 15, 14, 13, 12, 11};
const std::array<u32, 10> tRAS_values = {42, 36, 34, 32, 30, 28, 26, 24, 22, 20};
const std::array<double, 8> tRRD_values = {/*10.0,*/7.5, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0};
const std::array<double, 7> tRRD_values = {/*10.0,*/ 7.5, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0}; /* 10.0 is used for <2133mhz; do we care? */
const std::array<u32, 11> tRFC_values = {140, 130, 120, 110, 100, 90, 80, 70, 60, 50, 40};
const std::array<u32, 10> tWTR_values = {10, 9, 8, 7, 6, 5, 4, 3, 3, 1};
const std::array<u32, 6> tREFpb_values = {3900, 5850, 7800, 11700, 15600, 99999};
@@ -160,4 +160,3 @@ namespace ams::ldr::oc {
}
}

2
Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv.cpp
View File

@@ -96,7 +96,7 @@ void SafetyCheck() {
};
u32 eristaCpuDvfsMaxFreq = static_cast<u32>(GetDvfsTableLastEntry(C.eristaCpuDvfsTable)->freq);
u32 marikoCpuDvfsMaxFreq;
if (C.marikoCpuUV) {
if (C.marikoCpuUVHigh) {
marikoCpuDvfsMaxFreq = static_cast<u32>(
GetDvfsTableLastEntry(C.marikoCpuDvfsTableSLT)->freq
);

249
Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv.hpp
View File

@@ -23,75 +23,65 @@
#include "../oc_common.hpp"
#include "pcv_common.hpp"
namespace ams::ldr::oc::pcv
{
namespace ams::ldr::oc::pcv {
namespace mariko {
constexpr cvb_entry_t CpuCvbTableDefault[] = {
// CPUB01_CVB_TABLE
{204000, {721589, -12695, 27}, {}},
{306000, {747134, -14195, 27}, {}},
{408000, {776324, -15705, 27}, {}},
{510000, {809160, -17205, 27}, {}},
{612000, {845641, -18715, 27}, {}},
{714000, {885768, -20215, 27}, {}},
{816000, {929540, -21725, 27}, {}},
{918000, {976958, -23225, 27}, {}},
{1020000, {1028021, -24725, 27}, {1120000}},
{1122000, {1082730, -26235, 27}, {1120000}},
{1224000, {1141084, -27735, 27}, {1120000}},
{1326000, {1203084, -29245, 27}, {1120000}},
{1428000, {1268729, -30745, 27}, {1120000}},
{1581000, {1374032, -33005, 27}, {1120000}},
{1683000, {1448791, -34505, 27}, {1120000}},
{1785000, {1527196, -36015, 27}, {1120000}},
{1887000, {1609246, -37515, 27}, {1120000}},
{1963500, {1675751, -38635, 27}, {1120000}},
{},
{ 204000, { 721589, -12695, 27 }, { } },
{ 306000, { 747134, -14195, 27 }, { } },
{ 408000, { 776324, -15705, 27 }, { } },
{ 510000, { 809160, -17205, 27 }, { } },
{ 612000, { 845641, -18715, 27 }, { } },
{ 714000, { 885768, -20215, 27 }, { } },
{ 816000, { 929540, -21725, 27 }, { } },
{ 918000, { 976958, -23225, 27 }, { } },
{ 1020000, { 1028021, -24725, 27 }, { 1120000 } },
{ 1122000, { 1082730, -26235, 27 }, { 1120000 } },
{ 1224000, { 1141084, -27735, 27 }, { 1120000 } },
{ 1326000, { 1203084, -29245, 27 }, { 1120000 } },
{ 1428000, { 1268729, -30745, 27 }, { 1120000 } },
{ 1581000, { 1374032, -33005, 27 }, { 1120000 } },
{ 1683000, { 1448791, -34505, 27 }, { 1120000 } },
{ 1785000, { 1527196, -36015, 27 }, { 1120000 } },
{ 1887000, { 1609246, -37515, 27 }, { 1120000 } },
{ 1963500, { 1675751, -38635, 27 }, { 1120000 } },
{ },
};
constexpr int gpuVmax = 750;
constexpr int gpuVmin = 610;
constexpr u32 CpuVminPatchValues[] = { 850, 38, 1120, 1000, 100, 1000, 0 };
constexpr s32 CpuVminPatchOffsets[] = { -2, -1, 5, 6, 7, 8, 9 };
constexpr u32 CpuVoltagePatchValues[] = { 850, 38, 1120, 1000, 100, 1000, 0 };
constexpr s32 CpuVoltagePatchOffsets[] = { -2, -1, 5, 6, 7, 8, 9 };
static_assert(sizeof(CpuVoltagePatchValues) == sizeof(CpuVoltagePatchOffsets), "Invalid CpuVoltagePatch size");
constexpr u32 CpuVoltageSecondaryPatchValues[] = { 800, 1120, 0, 800, 1120, 0, 620, 1120, 20000, 620, 1120, 70000, 950, 1132, 0, 950 };
constexpr s32 CpuVoltageSecondaryPatchOffsets[] = { -6, -5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 };
static_assert(sizeof(CpuVoltageSecondaryPatchValues) == sizeof(CpuVoltageSecondaryPatchOffsets), "Invalid secondary CpuVoltagePatch size");
constexpr u32 CpuClkOfficial = 1963'500;
constexpr u32 CpuVoltOfficial = 1120;
constexpr cvb_entry_t GpuCvbTableDefault[] = {
// GPUB01_NA_CVB_TABLE
{76800, {}, {
610000,
}},
{153600, {}, {
610000,
}},
{230400, {}, {
610000,
}},
{307200, {}, {
610000,
}},
{384000, {}, {
610000,
}},
{460800, {}, {
610000,
}},
{537600, {}, {801688, -10900, -163, 298, -10599, 162}},
{614400, {}, {824214, -5743, -452, 238, -6325, 81}},
{691200, {}, {848830, -3903, -552, 119, -4030, -2}},
{768000, {}, {891575, -4409, -584, 0, -2849, 39}},
{844800, {}, {940071, -5367, -602, -60, -63, -93}},
{921600, {}, {986765, -6637, -614, -179, 1905, -13}},
{998400, {}, {1098475, -13529, -497, -179, 3626, 9}},
{1075200, {}, {1163644, -12688, -648, 0, 1077, 40}},
{1152000, {}, {1204812, -9908, -830, 0, 1469, 110}},
{1228800, {}, {1277303, -11675, -859, 0, 3722, 313}},
{1267200, {}, {1335531, -12567, -867, 0, 3681, 559}},
{},
{ 76800, {}, { 610000, } },
{ 153600, {}, { 610000, } },
{ 230400, {}, { 610000, } },
{ 307200, {}, { 610000, } },
{ 384000, {}, { 610000, } },
{ 460800, {}, { 610000, } },
{ 537600, {}, { 801688, -10900, -163, 298, -10599, 162, } },
{ 614400, {}, { 824214, -5743, -452, 238, -6325, 81, } },
{ 691200, {}, { 848830, -3903, -552, 119, -4030, -2, } },
{ 768000, {}, { 891575, -4409, -584, 0, -2849, 39, } },
{ 844800, {}, { 940071, -5367, -602, -60, -63, -93, } },
{ 921600, {}, { 986765, -6637, -614, -179, 1905, -13, } },
{ 998400, {}, { 1098475, -13529, -497, -179, 3626, 9, } },
{ 1075200, {}, { 1163644, -12688, -648, 0, 1077, 40, } },
{ 1152000, {}, { 1204812, -9908, -830, 0, 1469, 110, } },
{ 1228800, {}, { 1277303, -11675, -859, 0, 3722, 313, } },
{ 1267200, {}, { 1335531, -12567, -867, 0, 3681, 559, } },
{ },
};
constexpr u32 GpuClkPllMax = 1300'000'000;
@@ -126,36 +116,12 @@ namespace ams::ldr::oc::pcv
}
constexpr emc_dvb_dvfs_table_t EmcDvbTableDefault[] = {
{204000, {
637,
637,
637,
}},
{408000, {
637,
637,
637,
}},
{800000, {
637,
637,
637,
}},
{1065600, {
637,
637,
637,
}},
{1331200, {
650,
637,
637,
}},
{1600000, {
675,
650,
637,
}},
{ 204000, { 637, 637, 637, } },
{ 408000, { 637, 637, 637, } },
{ 800000, { 637, 637, 637, } },
{ 1065600, { 637, 637, 637, } },
{ 1331200, { 650, 637, 637, } },
{ 1600000, { 675, 650, 637, } },
};
constexpr u32 EmcClkOSAlt = 1331'200;
@@ -172,23 +138,23 @@ namespace ams::ldr::oc::pcv
namespace erista {
constexpr cvb_entry_t CpuCvbTableDefault[] = {
// CPU_PLL_CVB_TABLE_ODN
{204000, {721094}, {}},
{306000, {754040}, {}},
{408000, {786986}, {}},
{510000, {819932}, {}},
{612000, {852878}, {}},
{714000, {885824}, {}},
{816000, {918770}, {}},
{918000, {951716}, {}},
{1020000, {984662}, {-2875621, 358099, -8585}},
{1122000, {1017608}, {-52225, 104159, -2816}},
{1224000, {1050554}, {1076868, 8356, -727}},
{1326000, {1083500}, {2208191, -84659, 1240}},
{1428000, {1116446}, {2519460, -105063, 1611}},
{1581000, {1130000}, {2889664, -122173, 1834}},
{1683000, {1168000}, {5100873, -279186, 4747}},
{1785000, {1227500}, {5100873, -279186, 4747}},
{},
{ 204000, {721094}, { } },
{ 306000, {754040}, { } },
{ 408000, {786986}, { } },
{ 510000, {819932}, { } },
{ 612000, {852878}, { } },
{ 714000, {885824}, { } },
{ 816000, {918770}, { } },
{ 918000, {951716}, { } },
{ 1020000, {984662}, { -2875621, 358099, -8585} },
{ 1122000, {1017608}, { -52225, 104159, -2816} },
{ 1224000, {1050554}, { 1076868, 8356, -727} },
{ 1326000, {1083500}, { 2208191, -84659, 1240} },
{ 1428000, {1116446}, { 2519460, -105063, 1611} },
{ 1581000, {1130000}, { 2889664, -122173, 1834} },
{ 1683000, {1168000}, { 5100873, -279186, 4747} },
{ 1785000, {1227500}, { 5100873, -279186, 4747} },
{ },
};
constexpr int gpuVmin = 810;
@@ -218,15 +184,25 @@ namespace ams::ldr::oc::pcv
* #31 |30 29|28 27 26 25 24 23|22 21|20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 |4 3 2 1 0
* 0 | 1 1 | 1 0 0 1 0 1| 0 1| 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 |0 1 0 1 1
*/
inline constexpr u32 asm_pattern[] = {0x52820000, 0x72A001C0};
inline auto asm_compare_no_rd = [](u32 ins1, u32 ins2)
{ return ((ins1 ^ ins2) >> 5) == 0; };
inline auto asm_get_rd = [](u32 ins)
{ return ins & ((1 << 5) - 1); };
inline auto asm_set_rd = [](u32 ins, u8 rd)
{ return (ins & 0xFFFFFFE0) | (rd & 0x1F); };
inline auto asm_set_imm16 = [](u32 ins, u16 imm)
{ return (ins & 0xFFE0001F) | ((imm & 0xFFFF) << 5); };
inline constexpr u32 asm_pattern[] = {
0x52820000, 0x72A001C0
};
inline auto asm_compare_no_rd = [](u32 ins1, u32 ins2) {
return ((ins1 ^ ins2) >> 5) == 0;
};
inline auto asm_get_rd = [](u32 ins) {
return ins & ((1 << 5) - 1);
};
inline auto asm_set_rd = [](u32 ins, u8 rd) {
return (ins & 0xFFFFFFE0) | (rd & 0x1F);
};
inline auto asm_set_imm16 = [](u32 ins, u16 imm) {
return (ins & 0xFFE0001F) | ((imm & 0xFFFF) << 5);
};
inline bool GpuMaxClockPatternFn(u32 *ptr32) {
return asm_compare_no_rd(*ptr32, asm_pattern[0]);
@@ -234,19 +210,19 @@ namespace ams::ldr::oc::pcv
constexpr cvb_entry_t GpuCvbTableDefault[] = {
// NA_FREQ_CVB_TABLE
{76800, {}, {814294, 8144, -940, 808, -21583, 226}},
{153600, {}, {856185, 8144, -940, 808, -21583, 226}},
{230400, {}, {898077, 8144, -940, 808, -21583, 226}},
{307200, {}, {939968, 8144, -940, 808, -21583, 226}},
{384000, {}, {981860, 8144, -940, 808, -21583, 226}},
{460800, {}, {1023751, 8144, -940, 808, -21583, 226}},
{537600, {}, {1065642, 8144, -940, 808, -21583, 226}},
{614400, {}, {1107534, 8144, -940, 808, -21583, 226}},
{691200, {}, {1149425, 8144, -940, 808, -21583, 226}},
{768000, {}, {1191317, 8144, -940, 808, -21583, 226}},
{844800, {}, {1233208, 8144, -940, 808, -21583, 226}},
{921600, {}, {1275100, 8144, -940, 808, -21583, 226}},
{},
{ 76800, {}, { 814294, 8144, -940, 808, -21583, 226, } },
{ 153600, {}, { 856185, 8144, -940, 808, -21583, 226, } },
{ 230400, {}, { 898077, 8144, -940, 808, -21583, 226, } },
{ 307200, {}, { 939968, 8144, -940, 808, -21583, 226, } },
{ 384000, {}, { 981860, 8144, -940, 808, -21583, 226, } },
{ 460800, {}, { 1023751, 8144, -940, 808, -21583, 226, } },
{ 537600, {}, { 1065642, 8144, -940, 808, -21583, 226, } },
{ 614400, {}, { 1107534, 8144, -940, 808, -21583, 226, } },
{ 691200, {}, { 1149425, 8144, -940, 808, -21583, 226, } },
{ 768000, {}, { 1191317, 8144, -940, 808, -21583, 226, } },
{ 844800, {}, { 1233208, 8144, -940, 808, -21583, 226, } },
{ 921600, {}, { 1275100, 8144, -940, 808, -21583, 226, } },
{ },
};
constexpr u32 MemVoltHOS = 1125'000;
@@ -260,23 +236,13 @@ namespace ams::ldr::oc::pcv
template <bool isMariko>
Result CpuFreqCvbTable(u32 *ptr) {
cvb_entry_t *default_table = isMariko ? (cvb_entry_t *)(&mariko::CpuCvbTableDefault) : (cvb_entry_t *)(&erista::CpuCvbTableDefault);
cvb_entry_t *customize_table = nullptr; // impossible to reach, there will always be a way to set a pointer
cvb_entry_t* customize_table = const_cast<cvb_entry_t *>(C.marikoCpuDvfsTableHelios);
if (isMariko) {
if (C.marikoCpuUV) {
customize_table = const_cast<cvb_entry_t *>(C.marikoCpuDvfsTableSLT);
} else {
customize_table = const_cast<cvb_entry_t *>(C.marikoCpuDvfsTable);
}
} else {
customize_table = const_cast<cvb_entry_t *>(C.eristaCpuDvfsTable);
}
u32 cpu_max_volt = isMariko ? C.marikoCpuMaxVolt : C.eristaCpuMaxVolt;
u32 cpu_freq_threshold = 1020'000;
if (isMariko) {
cpu_freq_threshold = C.marikoCpuUV ? 2193'000 : 2091'000;
} else {
cpu_freq_threshold = cpu_max_volt >= 1300 ? 1887'000 : 1428'000;
cpu_freq_threshold = 2193'000;
}
size_t default_entry_count = GetDvfsTableEntryCount(default_table);
@@ -284,7 +250,6 @@ namespace ams::ldr::oc::pcv
size_t customize_entry_count = GetDvfsTableEntryCount(customize_table);
size_t customize_table_size = customize_entry_count * sizeof(cvb_entry_t);
// Validate existing table
cvb_entry_t *table_free = reinterpret_cast<cvb_entry_t *>(ptr) + 1;
void *cpu_cvb_table_head = reinterpret_cast<u8 *>(table_free) - default_table_size;
bool validated = std::memcmp(cpu_cvb_table_head, default_table, default_table_size) == 0;
@@ -292,21 +257,15 @@ namespace ams::ldr::oc::pcv
std::memcpy(cpu_cvb_table_head, static_cast<void *>(customize_table), customize_table_size);
// Patch CPU max volt
if (cpu_max_volt) {
cvb_entry_t *entry = static_cast<cvb_entry_t *>(cpu_cvb_table_head);
for (size_t i = 0; i < customize_entry_count; i++) {
if (entry->freq >= cpu_freq_threshold) {
if (isMariko) {
PATCH_OFFSET(&(entry->cvb_pll_param.c0), cpu_max_volt * 1000);
} else {
PATCH_OFFSET(&(entry->cvb_dfll_param.c0), cpu_max_volt * 1000);
}
PATCH_OFFSET(&(entry->cvb_pll_param.c0), cpu_max_volt * 1000);
}
entry++;
}
}
R_SUCCEED();
}

282
Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv_mariko.cpp
View File

@@ -45,8 +45,7 @@ namespace ams::ldr::oc::pcv::mariko {
R_UNLESS(entry->min_mv == 250'000, ldr::ResultInvalidCpuFreqVddEntry());
R_UNLESS(entry->step_mv == 5000, ldr::ResultInvalidCpuFreqVddEntry());
R_UNLESS(entry->max_mv == 1525'000, ldr::ResultInvalidCpuFreqVddEntry());
if (C.marikoCpuUV)
{
if (C.marikoCpuUVHigh) {
PATCH_OFFSET(ptr, GetDvfsTableLastEntry(C.marikoCpuDvfsTableSLT)->freq);
} else {
PATCH_OFFSET(ptr, GetDvfsTableLastEntry(C.marikoCpuDvfsTable)->freq);
@@ -54,115 +53,207 @@ namespace ams::ldr::oc::pcv::mariko {
R_SUCCEED();
}
Result CpuVoltRange(u32 *ptr) {
for (size_t i = 0; i < std::size(CpuVminPatchOffsets); ++i) {
if (*(ptr + CpuVminPatchOffsets[i]) != CpuVminPatchValues[i]) {
R_THROW(ldr::ResultInvalidCpuMinVolt());
Result CpuVoltDVFS(u32 *ptr) {
auto MatchesPattern = [](u32 *base, const auto &offsets, const auto &values) {
for (size_t i = 0; i < std::size(values); ++i) {
if (*(base + offsets[i]) != values[i]) {
return false;
}
}
}
return true;
};
if (C.marikoCpuUV) {
/* Check first pattern. */
if (MatchesPattern(ptr, CpuVoltagePatchOffsets, CpuVoltagePatchValues)) {
if (C.marikoCpuLowVmin) {
PATCH_OFFSET(ptr, C.marikoCpuLowVmin);
}
if (C.marikoCpuHighVmin) {
PATCH_OFFSET((ptr - 2), C.marikoCpuHighVmin);
PATCH_OFFSET(ptr - 2, C.marikoCpuHighVmin);
}
if (C.marikoCpuMaxVolt) {
PATCH_OFFSET((ptr + 5), C.marikoCpuMaxVolt);
PATCH_OFFSET(ptr + 5, C.marikoCpuMaxVolt);
}
R_SUCCEED();
}
R_SUCCEED();
/* Check alternative pattern. */
if (MatchesPattern(ptr, CpuVoltageSecondaryPatchOffsets, CpuVoltageSecondaryPatchValues)) {
if (C.marikoCpuLowVmin) {
PATCH_OFFSET(ptr, C.marikoCpuLowVmin);
PATCH_OFFSET(ptr + 3,C.marikoCpuLowVmin);
}
if (C.marikoCpuMaxVolt) {
PATCH_OFFSET(ptr - 2, C.marikoCpuMaxVolt);
PATCH_OFFSET(ptr + 1, C.marikoCpuMaxVolt);
PATCH_OFFSET(ptr + 4, C.marikoCpuMaxVolt);
PATCH_OFFSET(ptr - 5, C.marikoCpuMaxVolt);
}
R_SUCCEED();
}
/* Both patterns fail. */
R_THROW(ldr::ResultInvalidCpuMinVolt());
}
Result CpuVoltDfll(u32 *ptr) {
cvb_cpu_dfll_data *entry = reinterpret_cast<cvb_cpu_dfll_data *>(ptr);
R_UNLESS(entry->tune0_low == 0x0000FFCF, ldr::ResultInvalidCpuVoltDfllEntry());
R_UNLESS(entry->tune0_high == 0x00000000, ldr::ResultInvalidCpuVoltDfllEntry());
R_UNLESS(entry->tune1_low == 0x012207FF, ldr::ResultInvalidCpuVoltDfllEntry());
R_UNLESS(entry->tune1_high == 0x03FFF7FF, ldr::ResultInvalidCpuVoltDfllEntry());
switch (C.marikoCpuUV) {
case 0:
break;
case 1:
PATCH_OFFSET(&(entry->tune0_low), 0x0000FFA0); // process_id 0 // EOS UV1
PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
PATCH_OFFSET(&(entry->tune1_high), 0x00000000);
break;
case 2:
PATCH_OFFSET(&(entry->tune0_low), 0x0000FF92); /// EOS Uv2
PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
PATCH_OFFSET(&(entry->tune1_high), 0x00000000);
break;
case 3:
PATCH_OFFSET(&(entry->tune0_low), 0x0000FF9A); // EOS UV3
PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
PATCH_OFFSET(&(entry->tune1_high), 0x00000000);
break;
case 4:
PATCH_OFFSET(&(entry->tune0_low), 0x0000FFA2); // EOS Uv4
PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
PATCH_OFFSET(&(entry->tune1_high), 0x00000000);
break;
case 5:
PATCH_OFFSET(&(entry->tune0_low), 0x0000FFFF); // EOS UV5
PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
PATCH_OFFSET(&(entry->tune1_high), 0x022217FF);
break;
case 6:
PATCH_OFFSET(&(entry->tune0_low), 0x0000FFFF); // EOS UV6
PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
PATCH_OFFSET(&(entry->tune1_high), 0x024417FF);
break;
case 7:
PATCH_OFFSET(&(entry->tune0_low), 0x0000FFFF); // EOS UV6
PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
PATCH_OFFSET(&(entry->tune1_high), 0x026617FF);
break;
case 8:
PATCH_OFFSET(&(entry->tune0_low), 0x0000FFFF); // EOS UV6
PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
PATCH_OFFSET(&(entry->tune1_high), 0x028817FF);
break;
case 9:
PATCH_OFFSET(&(entry->tune0_low), 0x0000FFFF); // EOS UV6
PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
PATCH_OFFSET(&(entry->tune1_high), 0x028817FF);
break;
case 10:
PATCH_OFFSET(&(entry->tune0_low), 0x0000FFFF); // EOS UV6
PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
PATCH_OFFSET(&(entry->tune1_high), 0x02AA17FF);
break;
case 11:
PATCH_OFFSET(&(entry->tune0_low), 0x0000FFFF); // EOS UV6
PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
PATCH_OFFSET(&(entry->tune1_high), 0x02CC17FF);
break;
case 12:
PATCH_OFFSET(&(entry->tune0_low), 0x0000FFFF); // EOS UV6
PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
PATCH_OFFSET(&(entry->tune1_high), 0x02FF17FF);
break;
default:
break;
R_UNLESS(entry->tune0_low == 0xFFCF, ldr::ResultInvalidCpuVoltDfllEntry());
R_UNLESS(entry->tune0_high == 0x0, ldr::ResultInvalidCpuVoltDfllEntry());
R_UNLESS(entry->tune1_low == 0x12207FF, ldr::ResultInvalidCpuVoltDfllEntry());
R_UNLESS(entry->tune1_high == 0x3FFF7FF, ldr::ResultInvalidCpuVoltDfllEntry());
switch (C.marikoCpuUVLow) {
case 0:
break;
case 1: {
PATCH_OFFSET(&(entry->tune0_low), 0xffa0);
PATCH_OFFSET(&(entry->tune0_high), 0xffff);
PATCH_OFFSET(&(entry->tune1_low), 0x21107ff);
PATCH_OFFSET(&(entry->tune1_high), 0x0);
break;
}
case 2: {
PATCH_OFFSET(&(entry->tune0_high), 0xffdf);
PATCH_OFFSET(&(entry->tune1_low), 0x21107ff);
PATCH_OFFSET(&(entry->tune1_high), 0x27207ff);
break;
}
case 3: {
PATCH_OFFSET(&(entry->tune0_low), 0xffdf);
PATCH_OFFSET(&(entry->tune0_high), 0xffdf);
PATCH_OFFSET(&(entry->tune1_low), 0x21107ff);
PATCH_OFFSET(&(entry->tune1_high), 0x27307ff);
break;
}
case 4: {
PATCH_OFFSET(&(entry->tune0_low), 0xffff);
PATCH_OFFSET(&(entry->tune0_high), 0xffdf);
PATCH_OFFSET(&(entry->tune1_low), 0x21107ff);
PATCH_OFFSET(&(entry->tune1_high), 0x27407ff);
break;
}
case 5: {
PATCH_OFFSET(&(entry->tune0_high), 0xffdf);
PATCH_OFFSET(&(entry->tune1_low), 0x21607ff);
PATCH_OFFSET(&(entry->tune1_high), 0x27707ff);
break;
}
case 6: {
PATCH_OFFSET(&(entry->tune0_high), 0xffdf);
PATCH_OFFSET(&(entry->tune1_low), 0x21607ff);
PATCH_OFFSET(&(entry->tune1_high), 0x27807ff);
break;
}
case 7: {
PATCH_OFFSET(&(entry->tune0_high), 0xdfff);
PATCH_OFFSET(&(entry->tune1_low), 0x21607ff);
PATCH_OFFSET(&(entry->tune1_high), 0x27b07ff);
break;
}
case 8: {
PATCH_OFFSET(&(entry->tune0_low), 0xdfff);
PATCH_OFFSET(&(entry->tune0_high), 0xdfff);
PATCH_OFFSET(&(entry->tune1_low), 0x21707ff);
PATCH_OFFSET(&(entry->tune1_high), 0x27b07ff);
break;
}
case 9: {
PATCH_OFFSET(&(entry->tune0_low), 0xdfff);
PATCH_OFFSET(&(entry->tune0_high), 0xdfff);
PATCH_OFFSET(&(entry->tune1_low), 0x21707ff);
PATCH_OFFSET(&(entry->tune1_high), 0x27c07ff);
break;
}
case 10: {
PATCH_OFFSET(&(entry->tune0_low), 0xdfff);
PATCH_OFFSET(&(entry->tune0_high), 0xdfff);
PATCH_OFFSET(&(entry->tune1_low), 0x21707ff);
PATCH_OFFSET(&(entry->tune1_high), 0x27d07ff);
break;
}
case 11: {
PATCH_OFFSET(&(entry->tune0_low), 0xdfff);
PATCH_OFFSET(&(entry->tune0_high), 0xdfff);
PATCH_OFFSET(&(entry->tune1_low), 0x21707ff);
PATCH_OFFSET(&(entry->tune1_high), 0x27e07ff);
break;
}
case 12: {
PATCH_OFFSET(&(entry->tune0_low), 0xdfff);
PATCH_OFFSET(&(entry->tune0_high), 0xdfff);
PATCH_OFFSET(&(entry->tune1_low), 0x21707ff);
PATCH_OFFSET(&(entry->tune1_high), 0x27f07ff);
break;
}
default:
break;
}
switch (C.marikoCpuUVHigh) {
case 0:
break;
case 1: {
PATCH_OFFSET(&(entry->tune0_high), 0xffff);
PATCH_OFFSET(&(entry->tune1_high), 0x0);
break;
}
case 2: {
PATCH_OFFSET(&(entry->tune0_high), 0xfffd);
PATCH_OFFSET(&(entry->tune1_high), 0x27207ff);
break;
}
case 3: {
PATCH_OFFSET(&(entry->tune0_high), 0xffdf);
PATCH_OFFSET(&(entry->tune1_high), 0x27307ff;);
break;
}
case 4: {
PATCH_OFFSET(&(entry->tune0_high), 0xffdf);
PATCH_OFFSET(&(entry->tune1_high), 0x27407ff;);
break;
}
case 5: {
PATCH_OFFSET(&(entry->tune0_high), 0xffdf);
PATCH_OFFSET(&(entry->tune1_high), 0x27707ff);
break;
}
case 6: {
PATCH_OFFSET(&(entry->tune0_high), 0xffdf);
PATCH_OFFSET(&(entry->tune1_high), 0x27807ff);
break;
}
case 7:
case 8: {
PATCH_OFFSET(&(entry->tune0_high), 0xdfff);
PATCH_OFFSET(&(entry->tune1_high), 0x27b07ff);
break;
}
case 9: {
PATCH_OFFSET(&(entry->tune0_high), 0xdfff);
PATCH_OFFSET(&(entry->tune1_high), 0x27c07ff);
break;
}
case 10: {
PATCH_OFFSET(&(entry->tune0_high), 0xdfff);
PATCH_OFFSET(&(entry->tune1_high), 0x27d07ff;);
break;
}
case 11: {
PATCH_OFFSET(&(entry->tune0_high), 0xdfff);
PATCH_OFFSET(&(entry->tune1_high), 0x27e07ff);
break;
}
case 12: {
PATCH_OFFSET(&(entry->tune0_high), 0xdfff);
PATCH_OFFSET(&(entry->tune1_high), 0x27f07ff);
break;
}
default:
break;
}
R_SUCCEED();
}
@@ -848,7 +939,8 @@ namespace ams::ldr::oc::pcv::mariko {
PatcherEntry<u32> patches[] = {
{"CPU Freq Vdd", &CpuFreqVdd, 1, nullptr, CpuClkOSLimit},
{"CPU Freq Table", CpuFreqCvbTable<true>, 1, nullptr, CpuCvbDefaultMaxFreq},
{"CPU Volt Range", &CpuVoltRange, 1, nullptr, CpuVminOfficial},
{"CPU Volt DVFS", &CpuVoltDVFS, 2, nullptr, /*CpuVminOfficial*/ 620},
// {"CPU Volt Thermals", &CpuVoltThermals, 1, nullptr, /*CpuVminOfficial*/ 620},
{"CPU Volt Dfll", &CpuVoltDfll, 1, nullptr, 0x0000FFCF},
{"GPU Freq Table", GpuFreqCvbTable<true>, 1, nullptr, GpuCvbDefaultMaxFreq},
{"GPU Freq Asm", &GpuFreqMaxAsm, 2, &GpuMaxClockPatternFn},