Remove lazy rl_dbi stuff
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@@ -20,9 +20,9 @@
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namespace ams::ldr::hoc::pcv::erista {
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void CalculateTimings(double tCK_avg) {
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tR2W = FLOOR(FLOOR((5.0 / tCK_avg) + ((FLOOR(48.0 / WL) - 0.478) * 3.0)) / 1.501) + RL_DBI - (C.t6_tRTW * 3) + finetRTW;
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tWTPDEN = CEIL(((1.803 / tCK_avg) + MAX(RL_DBI + (2.694 / tCK_avg), static_cast<double>(tW2P))) + (BL / 2));
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tW2R = FLOOR(MAX((5.020 / tCK_avg) + 1.130, WL - MAX(-CEIL(0.258 * (WL - RL_DBI)), 1.964)) * 1.964) + WL - CEIL(tWTR / tCK_avg) + finetWTR;
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tR2W = FLOOR(FLOOR((5.0 / tCK_avg) + ((FLOOR(48.0 / WL) - 0.478) * 3.0)) / 1.501) + RL - (C.t6_tRTW * 3) + finetRTW;
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tWTPDEN = CEIL(((1.803 / tCK_avg) + MAX(RL + (2.694 / tCK_avg), static_cast<double>(tW2P))) + (BL / 2));
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tW2R = FLOOR(MAX((5.020 / tCK_avg) + 1.130, WL - MAX(-CEIL(0.258 * (WL - RL)), 1.964)) * 1.964) + WL - CEIL(tWTR / tCK_avg) + finetWTR;
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pdex2rw = CEIL((CEIL(12.335 - tCK_avg) + (7.430 / tCK_avg) - CEIL(tCK_avg * 11.361)));
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tCLKSTOP = FLOOR(MIN(8.488 / tCK_avg, 23.0)) + 8.0;
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@@ -43,7 +43,7 @@ namespace ams::ldr::hoc::pcv::mariko {
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u32 wlIndex = 0;
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for (u32 i = 0; i < std::size(rlMapDBI); ++i) {
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if (rlMapDBI[i] == RL_DBI) {
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if (rlMapDBI[i] == RL) {
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rlIndex = i;
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break;
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}
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@@ -34,12 +34,9 @@ namespace ams::ldr::hoc {
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const u32 BL = 16;
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/* Base latency for read and write (tWRL). */
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const u32 RL = C.mem_burst_read_latency - 4; /* (This is a lazy fix for now) */
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const u32 RL = C.mem_burst_read_latency;
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const u32 WL = C.mem_burst_write_latency;
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/* Switch uses RL_DBI, todo: get rid of non DBI_RL. */
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const u32 RL_DBI = RL + 4;
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/* Precharge to Precharge Delay. (tCK) */
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const u32 tPPD = 4;
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@@ -90,7 +87,7 @@ namespace ams::ldr::hoc {
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const u32 tFAW = static_cast<u32>(tRRD * 4.0);
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const double tRPab = tRPpb + 3;
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const u32 tR2P = CEIL((RL_DBI * 0.426) - 2.0);
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const u32 tR2P = CEIL((RL * 0.426) - 2.0);
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inline u32 tR2W;
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inline u32 rext;
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@@ -131,16 +128,16 @@ namespace ams::ldr::hoc {
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const u32 tFAW = static_cast<u32>(tRRD * 4.0);
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const double tRPab = tRPpb + 3;
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const u32 tR2P = CEIL((RL_DBI * 0.426) - 2.0);
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const u32 tR2W = FLOOR(FLOOR((5.0 / tCK_avg) + ((FLOOR(48.0 / WL) - 0.478) * 3.0)) / 1.501) + RL_DBI - (C.t6_tRTW * 3) + finetRTW;
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const u32 tRTM = FLOOR((10.0 + RL_DBI) + (3.502 / tCK_avg)) + FLOOR(7.489 / tCK_avg);
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const u32 tRATM = CEIL((tRTM - 10.0) + (RL_DBI * 0.426));
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const u32 tR2P = CEIL((RL * 0.426) - 2.0);
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const u32 tR2W = FLOOR(FLOOR((5.0 / tCK_avg) + ((FLOOR(48.0 / WL) - 0.478) * 3.0)) / 1.501) + RL - (C.t6_tRTW * 3) + finetRTW;
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const u32 tRTM = FLOOR((10.0 + RL) + (3.502 / tCK_avg)) + FLOOR(7.489 / tCK_avg);
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const u32 tRATM = CEIL((tRTM - 10.0) + (RL * 0.426));
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inline u32 rext;
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const u32 rdv = RL_DBI + FLOOR((5.105 / tCK_avg) + 17.017);
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const u32 rdv = RL + FLOOR((5.105 / tCK_avg) + 17.017);
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const u32 qpop = rdv - 14;
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const u32 quse_width = CEIL(((4.897 / tCK_avg) - FLOOR(2.538 / tCK_avg)) + 3.782);
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const u32 quse = FLOOR(RL_DBI + ((5.082 / tCK_avg) + FLOOR(2.560 / tCK_avg))) - CEIL(4.820 / tCK_avg);
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const u32 quse = FLOOR(RL + ((5.082 / tCK_avg) + FLOOR(2.560 / tCK_avg))) - CEIL(4.820 / tCK_avg);
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const u32 einput_duration = FLOOR(9.936 / tCK_avg) + 5.0 + quse_width;
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const u32 einput = quse - CEIL(9.928 / tCK_avg);
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const u32 qrst_duration = FLOOR(8.399 - tCK_avg);
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@@ -149,8 +146,8 @@ namespace ams::ldr::hoc {
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const u32 ibdly = PACK_U32_NIBBLE_HIGH_BYTE_LOW(1, quse - qrst_duration - 2.0);
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const u32 qsafe = (einput_duration + 3) + MAX(MIN(qrstLow * rdv, qrst_duration + qrst_duration), einput);
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const u32 tW2P = (CEIL(WL * 1.7303) * 2) - 5;
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const u32 tWTPDEN = CEIL(((1.803 / tCK_avg) + MAX(RL_DBI + (2.694 / tCK_avg), static_cast<double>(tW2P))) + (BL / 2));
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const u32 tW2R = FLOOR(MAX((5.020 / tCK_avg) + 1.130, WL - MAX(-CEIL(0.258 * (WL - RL_DBI)), 1.964)) * 1.964) + WL - CEIL(tWTR / tCK_avg) + finetWTR;
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const u32 tWTPDEN = CEIL(((1.803 / tCK_avg) + MAX(RL + (2.694 / tCK_avg), static_cast<double>(tW2P))) + (BL / 2));
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const u32 tW2R = FLOOR(MAX((5.020 / tCK_avg) + 1.130, WL - MAX(-CEIL(0.258 * (WL - RL)), 1.964)) * 1.964) + WL - CEIL(tWTR / tCK_avg) + finetWTR;
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const u32 tWTM = CEIL(WL + ((7.570 / tCK_avg) + 8.753));
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const u32 tWATM = (tWTM + (FLOOR(WL / 0.816) * 2.0)) - 4.0;
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@@ -202,7 +202,6 @@ namespace ams::ldr::hoc::pcv {
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{ },
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};
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constexpr u32 CpuVoltOfficial = 1235;
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constexpr u32 CpuVminOfficial = 825;
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@@ -285,7 +285,7 @@ namespace ams::ldr::hoc::pcv::erista {
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// WRITE_PARAM_ALL_REG(table, emc_tr_rdv, rdv);
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// ams::ldr::hoc::pcv::mariko::CalculateMrw2();
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// table->emc_mrw2 = (table->emc_mrw2 & ~0xFFu) | static_cast<u32>(mrw2);
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// table->dram_timings.rl = RL_DBI;
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// table->dram_timings.rl = RL;
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/* This needs some clean up. */
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constexpr double MC_ARB_DIV = 4.0;
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@@ -568,7 +568,7 @@ namespace ams::ldr::hoc::pcv::mariko {
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table->dram_timings.t_rp = tRFCpb;
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table->dram_timings.t_rfc = tRFCab;
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table->dram_timings.rl = RL_DBI;
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table->dram_timings.rl = RL;
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table->emc_mrw2 = (table->emc_mrw2 & ~0xFFu) | static_cast<u32>(mrw2);
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table->emc_cfg_2 = 0x11083D;
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