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[WIP] RAM overvolting for Mariko

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KazushiM
2021-11-20 14:08:25 +08:00
parent 2d174509e4
commit 92a16bd307
2 changed files with 65 additions and 4 deletions
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16
README.md
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@@ -27,7 +27,8 @@ Overclocking suite for Switch **(Mariko Only)** running on Atmosphere CFW. Suppo
- Game recording and SysDVR streaming @ 60fps with high video bitrate - Game recording and SysDVR streaming @ 60fps with high video bitrate
- Option to change the threshold for chargers providing enough power - Option to change the threshold for chargers providing enough power
- **TinyMemBenchNX**: DRAM throughput and latency test based on [tinymembench](https://github.com/ssvb/tinymembench) - **TinyMemBenchNX**: DRAM throughput and latency test based on [tinymembench](https://github.com/ssvb/tinymembench)
- **MemTesterNX**: A userspace utility for testing memory faults and stability based on [memtester](https://pyropus.ca/software/memtester/) - **MemTesterNX**: A userspace utility for testing memory faults ~~and stability~~ based on [memtester](https://pyropus.ca/software/memtester/)
- For testing stability, DRAM-heavy games like BotW/MHR will do better jobs as it's easier to spot framebuffer corruption/freeze
#### Details #### Details
@@ -35,11 +36,17 @@ Overclocking suite for Switch **(Mariko Only)** running on Atmosphere CFW. Suppo
- **Safe CPU/GPU OC clock: 1963.5/1267.2 MHz**. - **Safe CPU/GPU OC clock: 1963.5/1267.2 MHz**.
- Anything above that are not in the table of official module and are all wild guess. - Anything above that are not in the table of official module and are all wild guess.
- Max clock(2397.0/1344.0 MHz) may not work on some SoCs. - Max clock(2397.0/1344.0 MHz) may not work on some SoCs.
- **Recommended RAM clock: 1862.4 MHz**, **1795.2 MHz for Hynix** ones. - **Recommended RAM clock: 1862.4 MHz** @ 600mV, (**1795.2 MHz for Hynix** ones).
- **RAM clock is set permanently** via **ptm-patch**, rather than sys-clk. - **RAM clock is set permanently** via **ptm-patch**, rather than sys-clk.
- Use Hekate to check out the brand of your RAM chips. - Use Hekate to check out the brand of your RAM chips.
- Proper EM shielding for RAM chips and testing with emuNAND before long-term usage is preferred. - EM shielding & thermal paste for RAM chips and testing with emuNAND before long-term usage.
- Once RAM overvolting is available on Mariko, we may gain more stability and reach higher clock. - [WIP] Mariko RAM overvolting: rebuilding hekate is required.
- Let me know if you get stable 1996.8/2131.2MHz to work. Open an issue or Discord: Hirochi_6831(replace _ with #)
- ```shell
cd $hekate_repo
curl https://github.com/KazushiMe/Switch-OC-Suite/raw/master/Source/hekate.diff | git apply
```
- change voltage (600000) and `make -j`
- Mariko variants have much lower power consumption compared to Erista, therefore **GPU clock capping is lifted for Mariko**. - Mariko variants have much lower power consumption compared to Erista, therefore **GPU clock capping is lifted for Mariko**.
- For more info, see [README.md](https://github.com/KazushiMe/Switch-OC-Suite/tree/master/Source/sys-clk-OC) in sys-clk-OC. - For more info, see [README.md](https://github.com/KazushiMe/Switch-OC-Suite/tree/master/Source/sys-clk-OC) in sys-clk-OC.
- **Auto-Boost CPU for faster game loading** - **Auto-Boost CPU for faster game loading**
@@ -49,6 +56,7 @@ Overclocking suite for Switch **(Mariko Only)** running on Atmosphere CFW. Suppo
- **Fan Control Optimization** at high load - **Fan Control Optimization** at high load
- Higher tolerable temperature and smoother fan curve. Set `holdable_tskin` to 56˚C. Previously it's set to 48˚C, so by default the fan would go crazy (80~100%) easily with a slight degree of OC. - Higher tolerable temperature and smoother fan curve. Set `holdable_tskin` to 56˚C. Previously it's set to 48˚C, so by default the fan would go crazy (80~100%) easily with a slight degree of OC.
- Replace crappy factory thermal paste is preferred. - Replace crappy factory thermal paste is preferred.
- Place a thermal pad onto Wi-Fi/BT module (shielded, adjacent to antennas) to lower tskin temperature.
- **Modded sys-clk and ReverseNX**(-Tools and -RT) - **Modded sys-clk and ReverseNX**(-Tools and -RT)
- **No need to change clocks manually** after toggling modes in ReverseNX - **No need to change clocks manually** after toggling modes in ReverseNX
- Add `/config/sys-clk/downclock_dock.flag` to use handheld clocks in Docked mode when Handheld mode is set in ReverseNX. - Add `/config/sys-clk/downclock_dock.flag` to use handheld clocks in Docked mode when Handheld mode is set in ReverseNX.

53
Source/hekate.diff Normal file
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@@ -0,0 +1,53 @@
diff --git a/bdk/mem/sdram.c b/bdk/mem/sdram.c
index 00ec355..da4b149 100644
--- a/bdk/mem/sdram.c
+++ b/bdk/mem/sdram.c
@@ -34,6 +34,8 @@
#include <soc/t210.h>
#include <utils/util.h>
+#define DRAM_OVERVOLT 600000 // default: 600mV
+
#define CONFIG_SDRAM_KEEP_ALIVE
typedef struct _sdram_vendor_patch_t
@@ -1481,6 +1483,11 @@ static void _sdram_init_t210b01()
{
const sdram_params_t210b01_t *params = (const sdram_params_t210b01_t *)sdram_get_params_t210b01();
+#ifdef DRAM_OVERVOLT
+ // Set DRAM voltage.
+ max7762x_regulator_set_voltage(REGULATOR_77812_DRAM, DRAM_OVERVOLT);
+#endif
+
// VDDP Select.
PMC(APBDEV_PMC_VDDP_SEL) = params->pmc_vddp_sel;
usleep(params->pmc_vddp_sel_wait);
diff --git a/bdk/power/max7762x.c b/bdk/power/max7762x.c
index a7d30ce..376c87e 100644
--- a/bdk/power/max7762x.c
+++ b/bdk/power/max7762x.c
@@ -92,7 +92,7 @@ static const max77620_regulator_t _pmic_regulators[] = {
{ "max77621_GPU", 6250, 606250, 1200000, 1400000, REGULATOR_BC0, MAX77621_VOUT_REG, MAX77621_VOUT_DVS_REG, MAX77621_DVC_DVS_VOLT_MASK, {{ MAX77621_CPU_CTRL1_POR_DEFAULT, MAX77621_CPU_CTRL1_HOS_DEFAULT, MAX77621_CPU_CTRL2_POR_DEFAULT, MAX77621_CPU_CTRL2_HOS_DEFAULT }} },
{ "max77812_CPU", 5000, 250000, 600000, 1525000, REGULATOR_BC1, MAX77812_REG_M4_VOUT, MAX77812_REG_EN_CTRL, MAX77812_BUCK_VOLT_MASK, {{ MAX77812_EN_CTRL_EN_M4_MASK, MAX77812_EN_CTRL_EN_M4_SHIFT, 0, 0 }} },
//{ "max77812_GPU", 5000, 250000, 600000, 1525000, REGULATOR_BC1, MAX77812_REG_M1_VOUT, MAX77812_REG_EN_CTRL, MAX77812_BUCK_VOLT_MASK, {{ MAX77812_EN_CTRL_EN_M1_MASK, MAX77812_EN_CTRL_EN_M1_SHIFT, 0, 0 }} },
- //{ "max77812_RAM", 5000, 250000, 600000, 1525000, REGULATOR_BC1, MAX77812_REG_M3_VOUT, MAX77812_REG_EN_CTRL, MAX77812_BUCK_VOLT_MASK, {{ MAX77812_EN_CTRL_EN_M3_MASK, MAX77812_EN_CTRL_EN_M3_SHIFT, 0, 0 }} } // Only on PHASE211 configuration.
+ { "max77812_RAM", 5000, 250000, 600000, 1525000, REGULATOR_BC1, MAX77812_REG_M3_VOUT, MAX77812_REG_EN_CTRL, MAX77812_BUCK_VOLT_MASK, {{ MAX77812_EN_CTRL_EN_M3_MASK, MAX77812_EN_CTRL_EN_M3_SHIFT, 0, 0 }} } // Only on PHASE211 configuration.
};
static u8 _max77812_get_address()
diff --git a/bdk/power/max7762x.h b/bdk/power/max7762x.h
index 3478530..d01f787 100644
--- a/bdk/power/max7762x.h
+++ b/bdk/power/max7762x.h
@@ -62,8 +62,8 @@
#define REGULATOR_GPU0 14
#define REGULATOR_CPU1 15
//#define REGULATOR_GPU1 16
-//#define REGULATOR_GPU1 17
-#define REGULATOR_MAX 15
+#define REGULATOR_77812_DRAM 16
+#define REGULATOR_MAX 16
#define MAX77621_CPU_I2C_ADDR 0x1B
#define MAX77621_GPU_I2C_ADDR 0x1C