Public multiple ram freqs for erista
First ever release of public multiple ram freqs You get three extra frequencies on erista
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@@ -56,7 +56,13 @@ volatile CustomizeTable C = {
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* - System instabilities
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* - NAND corruption
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*/
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.eristaEmcMaxClock = 2240000,
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.eristaEmcClock1 = 1862400, // Lowest
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.eristaEmcClock2 = 1996800, // Middle
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.eristaEmcClock3 = 2132640, // Highest
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/* Mariko CPU:
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* - Max Voltage in mV:
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@@ -50,7 +50,9 @@
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u32 commonCpuBoostClock;
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u32 commonEmcMemVolt;
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u32 eristaCpuMaxVolt;
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u32 eristaEmcMaxClock;
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u32 eristaEmcClock1;
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u32 eristaEmcClock2;
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u32 eristaEmcClock3;
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u32 marikoCpuMaxVolt;
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u32 marikoEmcMaxClock;
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u32 marikoEmcVddqVolt;
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@@ -155,9 +155,9 @@
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// p78 The first valid data is available RL × t CK + t DQSCK + t DQSQ
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//const u32 QUSE = RL + CEIL(tDQSCK_min/tCK_avg + tDQSQ);
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namespace pcv::erista {
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namespace pcv::erista { // TODO: Adjust timings properly for all freqs
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// tCK_avg (average clock period) in ns
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const double tCK_avg = 1000'000. / C.eristaEmcMaxClock;
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const double tCK_avg = 1000'000. / C.eristaEmcClock3;
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// Write Latency
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const u32 WL = 14 + C.mem_burst_latency;
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@@ -178,7 +178,7 @@
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// {REFRESH, REFRESH_LO} = max[(tREF/#_of_rows) / (emc_clk_period) - 64, (tREF/#_of_rows) / (emc_clk_period) * 97%]
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// emc_clk_period = dram_clk / 2;
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// 1600 MHz: 5894, but N' set to 6176 (~4.8% margin)
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const u32 REFRESH = MIN((u32)65472, u32(std::ceil((double(tREFpb) * C.eristaEmcMaxClock / numOfRows * 1.048 / 2 - 64))) / 4 * 4);
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const u32 REFRESH = MIN((u32)65472, u32(std::ceil((double(tREFpb) * C.eristaEmcClock3 / numOfRows * 1.048 / 2 - 64))) / 4 * 4);
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const u32 REFBW = MIN((u32)65536, REFRESH+64);
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// Write With Auto Precharge to to Power-Down Entry
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@@ -161,7 +161,7 @@ void SafetyCheck() {
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{ C.commonCpuBoostClock, 1020'000, 3000'000, true },
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{ C.commonEmcMemVolt, 1100'000, 1500'000 }, // Official burst vmax for the RAMs
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{ C.eristaCpuMaxVolt, 1100, 1300 },
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{ C.eristaEmcMaxClock, 1600'000, 2600'200 },
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{ C.eristaEmcClock3, 1600'000, 2600'200 },
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{ C.marikoCpuMaxVolt, 1100, 1300 },
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{ C.marikoEmcMaxClock, 1600'000, 3500'000 },
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{ C.marikoEmcVddqVolt, 550'000, 700'000 },
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@@ -246,7 +246,7 @@
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{
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u32 khz_list[] = {1600000, 1331200, 1065600, 800000, 665600, 408000, 204000, 102000, 68000, 40800};
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u32 khz_list_size = sizeof(khz_list) / sizeof(u32);
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// Generate list for mtc table pointers
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EristaMtcTable *table_list[khz_list_size];
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for (u32 i = 0; i < khz_list_size; i++)
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@@ -256,32 +256,49 @@
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R_UNLESS(table_list[i]->rate_khz == khz_list[i], ldr::ResultInvalidMtcTable());
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R_UNLESS(table_list[i]->rev == MTC_TABLE_REV, ldr::ResultInvalidMtcTable());
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}
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if (C.eristaEmcMaxClock <= EmcClkOSLimit)
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if (C.eristaEmcClock1 <= EmcClkOSLimit ||
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C.eristaEmcClock2 <= EmcClkOSLimit ||
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C.eristaEmcClock3 <= EmcClkOSLimit)
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R_SKIP();
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// Make room for new mtc table, discarding useless 40.8 MHz table
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// 40800 overwritten by 68000, ..., 1331200 overwritten by 1600000, leaving table_list[0] not overwritten
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for (u32 i = khz_list_size - 1; i > 0; i--)
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std::memcpy(static_cast<void *>(table_list[i]), static_cast<void *>(table_list[i - 1]), sizeof(EristaMtcTable));
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// Make room for three new mtc tables, discarding useless 40.8, 68.0, and 102 MHz tables
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for (u32 i = khz_list_size - 1; i > 2; i--)
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std::memcpy(static_cast<void *>(table_list[i]),
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static_cast<void *>(table_list[i - 3]),
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sizeof(EristaMtcTable));
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// Adjust all three new tables
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MemMtcTableAutoAdjust(table_list[0]);
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PATCH_OFFSET(ptr, C.eristaEmcMaxClock);
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MemMtcTableAutoAdjust(table_list[1]);
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MemMtcTableAutoAdjust(table_list[2]);
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// Patch pointers for 3 custom clocks
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u32 *patch_ptr1 = ptr;
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u32 *patch_ptr2 = ptr - sizeof(EristaMtcTable) / sizeof(u32);
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u32 *patch_ptr3 = ptr - 2 * (sizeof(EristaMtcTable) / sizeof(u32));
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if (C.eristaEmcClock3 > EmcClkOSLimit)
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PATCH_OFFSET(patch_ptr1, C.eristaEmcClock3);
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if (C.eristaEmcClock2 > EmcClkOSLimit)
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PATCH_OFFSET(patch_ptr2, C.eristaEmcClock2);
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if (C.eristaEmcClock3 > EmcClkOSLimit)
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PATCH_OFFSET(patch_ptr3, C.eristaEmcClock1);
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// Handle customize table replacement
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// if (C.mtcConf == CUSTOMIZED_ALL) {
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// MemMtcCustomizeTable(table_list[0], const_cast<EristaMtcTable *>(C.eristaMtcTable));
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//}
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R_SUCCEED();
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}
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}
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Result MemFreqMax(u32 *ptr)
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{
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if (C.eristaEmcMaxClock <= EmcClkOSLimit)
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if (C.eristaEmcClock3 <= EmcClkOSLimit)
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R_SKIP();
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PATCH_OFFSET(ptr, C.eristaEmcMaxClock);
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PATCH_OFFSET(ptr, C.eristaEmcClock3);
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R_SUCCEED();
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}
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