OmniNX/Horizon-OC
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

ldr/sysclk: update tWRL setting method

Browse Source
This commit is contained in:
souldbminersmwc
2026-01-21 15:45:51 -05:00
parent 382f6d5834
commit 6d0399f352
3 changed files with 12 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
Source/Atmosphere/stratosphere/loader/source/oc/customize.cpp
View File

@@ -54,8 +54,8 @@ volatile CustomizeTable C = {
/* Set to 4 read and 2 write for 1866b tWRL. */
/* For 2133 tWRL: 8 read and 4 write. */
.mem_burst_read_latency = 8,
.mem_burst_write_latency = 4,
.mem_burst_read_latency = 40,
.mem_burst_write_latency = 18,
.eristaCpuUV = 0,
.eristaCpuVmin = 800,

4
Source/Atmosphere/stratosphere/loader/source/oc/mtc_timing_value.hpp
View File

@@ -42,8 +42,8 @@ namespace ams::ldr::oc {
const u32 BL = 16;
/* Base latency for read and write (tWRL). */
const u32 RL = 28 + C.mem_burst_read_latency;
const u32 WL = 14 + C.mem_burst_write_latency;
const u32 RL = C.mem_burst_read_latency;
const u32 WL = C.mem_burst_write_latency;
/* Switch uses RL_DBI, todo: get rid of non DBI_RL. */
const u32 RL_DBI = RL + 4;

14
Source/sys-clk/overlay/src/ui/gui/misc_gui.cpp
View File

@@ -692,15 +692,17 @@ protected:
this->listElement->addItem(new tsl::elm::CategoryHeader("Memory Latencies"));
std::vector<NamedValue> rlLabels = {
NamedValue("1600BL", 0),
NamedValue("1866BL", 4),
NamedValue("2133BL", 8)
NamedValue("2133RL", 40)
NamedValue("1866RL", 36),
NamedValue("1600RL", 32),
NamedValue("1333RL", 28),
};
std::vector<NamedValue> wlLabels = {
NamedValue("1600BL", 0),
NamedValue("1866BL", 2),
NamedValue("2133BL", 4)
NamedValue("2133WL", 18),
NamedValue("1866WL", 16),
NamedValue("1600WL", 14),
NamedValue("1333WL", 12)
};
addConfigButton(