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fix tr2ref and logic error

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This commit is contained in:
souldbminersmwc
2025-09-13 11:03:51 -04:00
parent a761e5ad2f
commit 4e0c77aa12
4 changed files with 10 additions and 10 deletions
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7
Source/Atmosphere/stratosphere/loader/source/oc/customize.cpp
View File

@@ -51,7 +51,6 @@ volatile CustomizeTable C = {
.tRC = 60,
.tWTR = 10,
.tWR = 18,
.tR2REF = 26,
.tRCD = 18,
.tREFpb = 488,
.tMRWCKEL = 14,
@@ -59,6 +58,7 @@ volatile CustomizeTable C = {
.tFAW = 40,
// --- double fields ---
.tR2REF = 25.5,
.tDQSCK_min = 1.5,
.tDQSCK_max = 3.5,
.tWPRE = 1.8,
@@ -103,6 +103,8 @@ volatile CustomizeTable C = {
{ 1887000, { 1235000 }, { 5100873, -279186, 4747 } },
{ 1963500, { 1235000 }, { 5100873, -279186, 4747 } },
{ 2091000, { 1235000 }, { 5100873, -279186, 4747 } },
{ 2193000, { 1235000 }, { 5100873, -279186, 4747 } },
{ 2295000, { 1235000 }, { 5100873, -279186, 4747 } },
},
/* - Mariko CPU DVFS Table:
@@ -160,9 +162,10 @@ volatile CustomizeTable C = {
{ 2397000, { 1702903, -34955, 113 }, { 1235000 } },
{ 2499000, { 1754400, -35643, 113 }, { 1235000 } },
{ 2601000, { 1805897, -36331, 113 }, { 1235000 } },
{ 2703000, { 1857394, -37019, 113 }, { 1235000 } },
{ 2703000, { 1857394, -37019, 113 }, { 1235000 } },
{ 2805000, { 1908891, -37707, 113 }, { 1235000 } },
{ 2907000, { 1960388, -38395, 113 }, { 1235000 } },
},
/* - Erista GPU DVFS Table:

2
Source/Atmosphere/stratosphere/loader/source/oc/customize.hpp
View File

@@ -80,7 +80,6 @@ typedef struct CustomizeTable {
u32 tRC;
u32 tWTR;
u32 tWR;
u32 tR2REF;
u32 tRCD;
u32 tREFpb;
u32 tMRWCKEL;
@@ -88,6 +87,7 @@ typedef struct CustomizeTable {
u32 tFAW;
// RAM timings (double)
double tR2REF;
double tDQSCK_min;
double tDQSCK_max;
double tWPRE;

4
Source/Atmosphere/stratosphere/loader/source/oc/mtc_timing_value.hpp
View File

@@ -66,9 +66,9 @@ namespace ams::ldr::oc {
// tCK_avg (average clock period) in ns
const double tCK_avg = 1000'000. / C.marikoEmcMaxClock;
// Write Latency
const u32 WL = 14 - 2*C.latency;
const u32 WL = 14 + C.latency;
// Read Latency
const u32 RL = 32 - 4*C.latency;
const u32 RL = 32 + C.latency;
// minimum number of cycles from any read command to any write command, irrespective of bank
const u32 R2W = CEIL (RL + CEIL(C.tDQSCK_max/tCK_avg) + C.BL/2 - WL + C.tWPRE + FLOOR(C.tRPST));

7
Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv.hpp
View File

@@ -318,9 +318,6 @@ namespace ams::ldr::oc::pcv
case 2:
customize_table = const_cast<cvb_entry_t *>(C.marikoGpuDvfsTableHiOPT);
break;
case 3:
customize_table = const_cast<cvb_entry_t *>(C.marikoGpuDvfsTableUv3);
break;
default:
customize_table = const_cast<cvb_entry_t *>(C.marikoGpuDvfsTable);
break;
@@ -350,10 +347,10 @@ namespace ams::ldr::oc::pcv
cvb_entry_t *entry = static_cast<cvb_entry_t *>(gpu_cvb_table_head);
for (size_t i = 0; i < customize_entry_count; i++)
{
if (!(C.marikoGpuVoltArray[i] < C.gpuVmin))
if (C.marikoGpuVoltArray[i] < C.gpuVmin)
{
u32 patched_voltage = C.marikoGpuVoltArray[i];
if(!C.gpuVmax) {
if(C.gpuVmax) {
if(patched_voltage > C.gpuVmax) {
patched_voltage = C.gpuVmax;
}