auto adj fixes
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@@ -82,13 +82,13 @@ Result GpuFreqPllLimit(u32* ptr) {
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R_SUCCEED();
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}
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const std::array<u32, 7> tRCD_values = {19, 18, 17, 16, 15, 14, 13};
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const std::array<u32, 7> tRP_values = {19, 18, 17, 16, 15, 14, 13};
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const std::array<u32, 7> tRAS_values = {44, 42, 39, 36, 35, 34, 33};
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const std::array<u32, 6> tRCD_values = {18, 17, 16, 15, 14, 13};
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const std::array<u32, 6> tRP_values = {18, 17, 16, 15, 14, 13};
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const std::array<u32, 6> tRAS_values = {42, 39, 36, 35, 34, 33};
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const std::array<double, 6> tRRD_values = {12, 10, 7.5, 6, 4, 2};
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const std::array<double, 6> tFAW_values = {48, 40, 30, 24, 16, 8};
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const std::array<double, 6> tRTP_values = {10, 7.5, 7.5, 6, 6, 5};
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const std::array<double, 5> tRRD_values = {10, 7.5, 6, 4, 2};
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const std::array<double, 5> tFAW_values = {40, 30, 24, 16, 8};
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const std::array<double, 5> tRTP_values = {7.5, 7.5, 6, 6, 5};
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void MemMtcTableAutoAdjust(MarikoMtcTable* table, const MarikoMtcTable* ref) {
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/* Official Tegra X1 TRM, sign up for nvidia developer program (free) to download:
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@@ -129,23 +129,23 @@ void MemMtcTableAutoAdjust(MarikoMtcTable* table, const MarikoMtcTable* ref) {
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TABLE->shadow_regs_ca_train.PARAM = VALUE; \
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TABLE->shadow_regs_rdwr_train.PARAM = VALUE;
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ADJUST_PARAM_ALL_REG(table, emc_r2w, ref); //0x140
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ADJUST_PARAM_ALL_REG(table, emc_w2r, ref); //0x144
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//ADJUST_PARAM_ALL_REG(table, emc_r2p, ref); //0x148
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ADJUST_PARAM_ALL_REG(table, emc_w2p, ref); //0x14c
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ADJUST_PARAM_ALL_REG(table, emc_trtm, ref); //0x158
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ADJUST_PARAM_ALL_REG(table, emc_twtm, ref); //0x15c
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ADJUST_PARAM_ALL_REG(table, emc_tratm, ref); //0x160
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ADJUST_PARAM_ALL_REG(table, emc_twatm, ref); //0x164
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ADJUST_PARAM_ALL_REG(table, emc_r2w, ref); //0x140 0x4f0 0x880
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ADJUST_PARAM_ALL_REG(table, emc_w2r, ref); //0x144 0x4f4 0x884
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//ADJUST_PARAM_ALL_REG(table, emc_r2p, ref); //0x148 0x4f8 0x888
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//ADJUST_PARAM_ALL_REG(table, emc_w2p, ref); //0x14c 0x4fc 0x88c
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ADJUST_PARAM_ALL_REG(table, emc_trtm, ref); //0x158 0x508 0x898
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ADJUST_PARAM_ALL_REG(table, emc_twtm, ref); //0x15c 0x50c 0x89c
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ADJUST_PARAM_ALL_REG(table, emc_tratm, ref); //0x160 0x510 0x8a0
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ADJUST_PARAM_ALL_REG(table, emc_twatm, ref); //0x164 0x514 0x8a4
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ADJUST_PARAM_ALL_REG(table, emc_rw2pden, ref); //0x1fc
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ADJUST_PARAM_ALL_REG(table, emc_rw2pden, ref); //0x1fc 0x5ac 0x93c
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ADJUST_PARAM_ALL_REG(table, emc_tclkstop, ref); //0x22c
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ADJUST_PARAM_ALL_REG(table, emc_tclkstop, ref); //0x22c 0x5dc 0x96c
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ADJUST_PARAM_ALL_REG(table, emc_pmacro_dll_cfg_2, ref); // EMC_DLL_CFG_2_0: level select for VDDA? //0x380
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ADJUST_PARAM_ALL_REG(table, emc_pmacro_dll_cfg_2, ref); // EMC_DLL_CFG_2_0: level select for VDDA? //0x380 0x730 0xac0
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ADJUST_PARAM_TABLE(table, la_scale_regs.mc_mll_mpcorer_ptsa_rate, ref);
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ADJUST_PARAM_TABLE(table, la_scale_regs.mc_ptsa_grant_decrement, ref);
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ADJUST_PARAM_TABLE(table, la_scale_regs.mc_mll_mpcorer_ptsa_rate, ref); //0xfa4
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ADJUST_PARAM_TABLE(table, la_scale_regs.mc_ptsa_grant_decrement, ref); //0xfac
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#define MAX(A, B) std::max(A, B)
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#define MIN(A, B) std::min(A, B)
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@@ -214,11 +214,13 @@ void MemMtcTableAutoAdjust(MarikoMtcTable* table, const MarikoMtcTable* ref) {
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// Internal READ-to-PRE-CHARGE command delay in ns
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const double tRTP = !TIMING_SECOND_PRESET ? 7.5 : tRTP_values[TIMING_SECOND_PRESET-1];
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const u32 WL = 10;
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const u32 BL = 16;
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// write-to-precharge time for commands to the same bank in cycles
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const double WTP = WL + BL/2 + 1 + std::ceil(18/tCK_avg);
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const double tWDV = 8.75;
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const double tDQSCK_max = 3.5;
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const u32 RL = 32;
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const u32 BL = 32;
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const double RTPDEN = RL + tDQSCK_max / tCK_avg + BL/2 + 2;
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// Valid Clock requirement before CKE Input HIGH in ns
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const double tCKCKEH = MAX(1.75, 3*tCK_avg);
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@@ -230,9 +232,11 @@ void MemMtcTableAutoAdjust(MarikoMtcTable* table, const MarikoMtcTable* ref) {
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WRITE_PARAM_ALL_REG(table, emc_ras, GET_CYCLE_CEIL(tRAS)); //0x138
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WRITE_PARAM_ALL_REG(table, emc_rp, GET_CYCLE_CEIL(tRPpb)); //0x13c
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WRITE_PARAM_ALL_REG(table, emc_r2p, GET_CYCLE_CEIL(tRTP));
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WRITE_PARAM_ALL_REG(table, emc_w2p, GET_CYCLE_CEIL(WTP));
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WRITE_PARAM_ALL_REG(table, emc_rd_rcd, GET_CYCLE_CEIL(tRCD)); //0x170
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WRITE_PARAM_ALL_REG(table, emc_wr_rcd, GET_CYCLE_CEIL(tRCD)); //0x174
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WRITE_PARAM_ALL_REG(table, emc_rrd, GET_CYCLE_CEIL(tRRD)); //0x178
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WRITE_PARAM_ALL_REG(table, emc_wdv, GET_CYCLE_CEIL(tWDV));
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WRITE_PARAM_ALL_REG(table, emc_refresh, REFRESH); //0x1dc
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WRITE_PARAM_ALL_REG(table, emc_pre_refresh_req_cnt, REFRESH / 4); //0x1e4
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WRITE_PARAM_ALL_REG(table, emc_pdex2wr, GET_CYCLE_CEIL(tXP)); //0x1e8
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@@ -240,19 +244,19 @@ void MemMtcTableAutoAdjust(MarikoMtcTable* table, const MarikoMtcTable* ref) {
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WRITE_PARAM_ALL_REG(table, emc_pchg2pden, GET_CYCLE_CEIL(tCMDCKE));
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WRITE_PARAM_ALL_REG(table, emc_act2pden,GET_CYCLE_CEIL(tACT2PDEN)); //0x1f4
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WRITE_PARAM_ALL_REG(table, emc_ar2pden, GET_CYCLE_CEIL(tCMDCKE));
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WRITE_PARAM_ALL_REG(table, emc_rw2pden, RTPDEN);
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//WRITE_PARAM_ALL_REG(table, emc_rw2pden, RTPDEN);
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WRITE_PARAM_ALL_REG(table, emc_txsr, MIN(GET_CYCLE_CEIL(tXSR), (u32)0x3fe)); //0x20c
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//WRITE_PARAM_ALL_REG(table, emc_txsrdll, GET_CYCLE_CEIL(tXSR)); //0x210
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WRITE_PARAM_ALL_REG(table, emc_txsrdll, MIN(GET_CYCLE_CEIL(tXSR), (u32)0x3fe)); //0x210
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WRITE_PARAM_ALL_REG(table, emc_tcke, GET_CYCLE_CEIL(tCKE)); //0x214
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WRITE_PARAM_ALL_REG(table, emc_tfaw, GET_CYCLE_CEIL(tFAW)); //0x220
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WRITE_PARAM_ALL_REG(table, emc_trpab, GET_CYCLE_CEIL(tRPab)); //0x224
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WRITE_PARAM_ALL_REG(table, emc_tclkstable, GET_CYCLE_CEIL(tCKCKEH));
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WRITE_PARAM_ALL_REG(table, emc_trefbw, REFRESH + 64); //0x234
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WRITE_PARAM_ALL_REG(table, emc_pdex2mrr,GET_CYCLE_CEIL(tPDEX2MRR)); //0x208
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WRITE_PARAM_ALL_REG(table, emc_cke2pden,GET_CYCLE_CEIL(tCKE2PDEN)); //0x200
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WRITE_PARAM_ALL_REG(table, emc_tckesr, GET_CYCLE_CEIL(tCKELPD)); //0x218
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WRITE_PARAM_ALL_REG(table, emc_tpd, GET_CYCLE_CEIL(tPD)); //0x21c
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WRITE_PARAM_ALL_REG(table, emc_trefbw, REFRESH + 64); //0x234
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constexpr u32 MC_ARB_DIV = 4; // Guessed
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constexpr u32 SFA = 2; // Guessed
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table->burst_mc_regs.mc_emem_arb_timing_rcd = std::ceil(GET_CYCLE_CEIL(tRCD) / MC_ARB_DIV) - 2; //0xf30
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@@ -280,15 +280,14 @@ var AdvTable: Array<AdvEntry> = [
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"Select Timing Preset for both AUTO_ADJ and CUSTOM_ADJ",
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"Values are : tRCD - tRP - tRAS (tRC = tRP + tRAS)",
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"0 : Do Not Adjust (CUST_ADJ only)",
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"1 : 19 - 19 - 44",
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"2 : 18 - 18 - 42 (Default timing)",
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"3 : 17 - 17 - 39",
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"4 : 16 - 16 - 36",
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"5 : 15 - 15 - 35",
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"6 : 14 - 14 - 34",
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"7 : 13 - 13 - 33"],
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0,
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[0,7],
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"1 : 18 - 18 - 42 (Default timing)",
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"2 : 17 - 17 - 39",
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"3 : 16 - 16 - 36",
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"4 : 15 - 15 - 35",
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"5 : 14 - 14 - 34",
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"6 : 13 - 13 - 33"],
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1,
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[0,6],
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1,
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),
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new AdvEntry(
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@@ -300,14 +299,13 @@ var AdvTable: Array<AdvEntry> = [
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"Secondary Timing Preset for both AUTO_ADJ and CUSTOM_ADJ",
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"Values are : tRRD - tFAW - tRTP",
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"0 : Do Not Adjust (CUST_ADJ only)",
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"1 : 12 - 48 - 10",
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"2 : 10 - 40 - 7.5 (Default timing) (3733 specs)",
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"3 : 7.5 - 30 - 7.5 (4266 specs)",
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"4 : 6 - 24 - 6",
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"5 : 4 - 16 - 6",
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"6 : 2 - 8 - 5",],
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0,
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[0,6],
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"1 : 10 - 40 - 7.5 (Default timing) (3733 specs)",
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"2 : 7.5 - 30 - 7.5 (4266 specs)",
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"3 : 6 - 24 - 6",
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"4 : 4 - 16 - 6",
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"5 : 2 - 8 - 5",],
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1,
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[0,5],
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1,
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)
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];
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