Erista: MRf and timing fixes
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@@ -73,7 +73,7 @@ namespace ams::ldr::hoc {
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const std::array<u32, 8> tRP_values = { 18, 17, 16, 15, 14, 13, 12, 11 };
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const std::array<u32, 10> tRAS_values = { 42, 36, 34, 32, 30, 28, 26, 24, 22, 20 };
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const std::array<double, 8> tRRD_values = { 10.0, 7.5, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0 };
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const std::array<u32, 11> tRFC_values = { 140, 130, 120, 110, 100, 90, 80, 70, 60, 50, 40 };
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const std::array<u32, 6> tRFC_values = { 90, 80, 70, 60, 50, 40 };
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const std::array<u32, 10> tWTR_values = { 10, 9, 8, 7, 6, 5, 4, 3, 2, 1 };
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const std::array<u32, 6> tREFpb_values = { 3900, 5850, 7800, 11700, 15600, 99999 };
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@@ -144,7 +144,7 @@ void SafetyCheck() {
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{ C.marikoCpuBoostClock, 1020'000, 2703'000, true },
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{ C.commonEmcMemVolt, 912'500, 1350'000 }, // Official burst vmax for the RAMs is 1500mV
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{ C.eristaCpuMaxVolt, 1000, 1257 },
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{ GET_MAX_OF_ARR(erista::maxClocks), 1600'000, 2600'000 },
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{ GET_MAX_OF_ARR(erista::maxEmcClocks), 1600'000, 2600'000 },
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{ C.marikoCpuMaxVolt, 1000, 1235 },
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{ C.marikoEmcMaxClock, 1600'000, 3500'000 },
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{ C.marikoEmcVddqVolt, 250'000, 700'000 },
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@@ -178,7 +178,7 @@ namespace ams::ldr::hoc::pcv {
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}
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namespace erista {
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const u32 maxClocks[] = { C.eristaEmcMaxClock2, C.eristaEmcMaxClock1, C.eristaEmcMaxClock, };
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static u32 maxEmcClocks[] = { C.eristaEmcMaxClock2, C.eristaEmcMaxClock1, C.eristaEmcMaxClock, };
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#define GET_MAX_OF_ARR(ARR) (*std::max_element(ARR, ARR + std::size(ARR)))
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constexpr cvb_entry_t CpuCvbTableDefault[] = {
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@@ -324,13 +324,13 @@ namespace ams::ldr::hoc::pcv::erista {
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table->burst_mc_regs.mc_emem_arb_misc0 = (table->burst_mc_regs.mc_emem_arb_misc0 & 0xFFE08000) | (table->burst_mc_regs.mc_emem_arb_timing_rc + 1);
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u32 mpcorer_ptsa_rate = MAX(static_cast<u32>(227), (table->rate_khz / 1600000) * 208);
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u32 mpcorer_ptsa_rate = MIN(static_cast<u32>(227), (table->rate_khz / 1600000) * 208);
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table->la_scale_regs.mc_mll_mpcorer_ptsa_rate = mpcorer_ptsa_rate;
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u32 ftop_ptsa_rate = MAX(static_cast<u32>(31), (table->rate_khz / 1600000) * 24);
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u32 ftop_ptsa_rate = MIN(static_cast<u32>(31), (table->rate_khz / 1600000) * 24);
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table->la_scale_regs.mc_ftop_ptsa_rate = ftop_ptsa_rate;
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u32 grant_decrement = MAX(static_cast<u32>(6143), (table->rate_khz / 1600000) * 4611);
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u32 grant_decrement = MIN(static_cast<u32>(6143), (table->rate_khz / 1600000) * 4611);
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table->la_scale_regs.mc_ptsa_grant_decrement = grant_decrement;
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constexpr u32 MaskHigh = 0xFF00FFFF;
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@@ -370,7 +370,12 @@ namespace ams::ldr::hoc::pcv::erista {
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}
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Result MemFreqMtcTable(u32 *ptr) {
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if (GET_MAX_OF_ARR(maxEmcClocks) <= EmcClkOSLimit) {
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R_SKIP();
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}
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u32 khz_list[] = {1600000, 1331200, 1065600, 800000, 665600, 408000, 204000, 102000, 68000, 40800};
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std::sort(maxEmcClocks, maxEmcClocks + std::size(maxEmcClocks), std::greater<>());
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u32 khz_list_size = sizeof(khz_list) / sizeof(u32);
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// Generate list for mtc table pointers
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@@ -382,32 +387,37 @@ namespace ams::ldr::hoc::pcv::erista {
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R_UNLESS(table_list[i]->rev == MTC_TABLE_REV, ldr::ResultInvalidMtcTable());
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}
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if (GET_MAX_OF_ARR(maxClocks) <= EmcClkOSLimit) {
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R_SKIP();
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u32 additionalFreqs = 0;
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for (u32 i = 0; i < std::size(maxEmcClocks); ++i) {
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if (maxEmcClocks[i] > EmcClkOSLimit) {
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++additionalFreqs;
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} else {
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break;
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}
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}
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// Make room for new mtc table, discarding useless 40.8, 68000 and 102000 MHz table
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// 40800 overwritten by 68000, ..., 1331200 overwritten by 1600000, leaving table_list[0], table_list[1] and table_list[2] not overwritten
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for (u32 i = khz_list_size - 1; i > 2; --i) {
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std::memcpy(static_cast<void *>(table_list[i]), static_cast<void *>(table_list[i - 3]), sizeof(EristaMtcTable));
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// 40800 overwritten by 204000, ..., 1331200 overwritten by 1600000, leaving table_list[0], table_list[1] and table_list[2] not overwritten
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for (u32 i = khz_list_size - 1; i > additionalFreqs - 1; --i) {
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std::memcpy(static_cast<void *>(table_list[i]), static_cast<void *>(table_list[i - additionalFreqs]), sizeof(EristaMtcTable));
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}
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for (u32 i = 0; i < std::size(maxClocks); ++i) {
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if (maxClocks[i] > EmcClkOSLimit) {
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table_list[i]->rate_khz = maxClocks[i];
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MemMtcTableAutoAdjust(table_list[i]);
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}
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for (u32 i = 0; i < additionalFreqs; ++i) {
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/* Since we're not scaling latency timings properly, copy over the 1600Mhz table to get the closest timings. */
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std::memcpy(table_list[i], table_list[additionalFreqs], sizeof(EristaMtcTable));
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table_list[i]->rate_khz = maxEmcClocks[i];
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MemMtcTableAutoAdjust(table_list[i]);
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}
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R_SUCCEED();
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}
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Result MemFreqMax(u32 *ptr) {
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if (GET_MAX_OF_ARR(maxClocks) <= EmcClkOSLimit) {
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if (GET_MAX_OF_ARR(maxEmcClocks) <= EmcClkOSLimit) {
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R_SKIP();
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}
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PATCH_OFFSET(ptr, GET_MAX_OF_ARR(maxClocks));
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PATCH_OFFSET(ptr, GET_MAX_OF_ARR(maxEmcClocks));
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R_SUCCEED();
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}
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@@ -445,4 +455,5 @@ namespace ams::ldr::hoc::pcv::erista {
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}
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}
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}
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}
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@@ -575,14 +575,6 @@ namespace ams::ldr::hoc::pcv::mariko {
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table->emc_cfg_2 = 0x11083D;
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}
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// WRITE_PARAM_ALL_REG(table, emc_pdex2wr, GET_CYCLE(10.0));
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// WRITE_PARAM_ALL_REG(table, emc_pdex2rd, GET_CYCLE(10.0));
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// WRITE_PARAM_ALL_REG(table, emc_pchg2pden, GET_CYCLE(1.75));
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// WRITE_PARAM_ALL_REG(table, emc_ar2pden, GET_CYCLE(1.75));
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// WRITE_PARAM_ALL_REG(table, emc_pdex2cke, GET_CYCLE(1.75));
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// WRITE_PARAM_ALL_REG(table, emc_act2pden, GET_CYCLE(14.0));
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// WRITE_PARAM_ALL_REG(table, emc_cke2pden, GET_CYCLE(5.0));
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void MemMtcPllmbDivisor(MarikoMtcTable *table) {
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constexpr u32 PllOscInKHz = 38400;
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constexpr u32 PllOscHalfKHz = 19200;
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