cleanup
This commit is contained in:
54
README.md
54
README.md
@@ -2,7 +2,7 @@
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[](https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html) [](https://gitter.im/Switch-OC-Suite/community?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge)
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Overclocking suite for (Mariko Only) Nintendo Switch™ running on Atmosphere CFW.
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Overclocking suite for (Mariko Only) Nintendo Switch™ running on Atmosphere CFW. Should support Horizon OS (HOS) >= 1.0.
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This project will not be actively maintained or regularly updated along with Atmosphere CFW.
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@@ -12,16 +12,14 @@ I'd appreciate if someone is willing to contribute or upload latest binaries. Bu
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## DISCLAIMER: USE AT YOUR OWN RISK!
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- Auto-patching and Erista support (DRAM OC loader.kip only) is under WIP
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- Overclocking in general (often combined with overvolting and overheating) will _degrade internal components_ - SoC, VRM(Voltage Regulator Module), Battery, etc. - _faster_ than you and the manufacturer have expected.
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- There is **no dynamic frequency scaling** in HorizonOS (HOS), which makes _overclocking acts differently than PC_ or other mobile devices. The console will be _sticking to what frequency you've set in the long term_, until you close the game or put it into sleep.
|
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- There is **no dynamic frequency scaling** in HOS, which makes _overclocking acts differently than PC_ or other mobile devices. The console will be _sticking to what frequency you've set in the long term_, until you close the game or put it into sleep.
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- **ONLY ramp up RAM clock** beyond HOS maximum to 1862 or 1996 MHz if you want to _stay safe_.
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- **ONLY ramp up RAM clock** beyond HOS maximum to 1862 / 1996 MHz if you want to _stay safe_. Higher RAM clock could be UNSTABLE and cause graphical glitches / instabilities / filesystem corruption.
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### Why no CPU/GPU OC for Erista?
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## Why no CPU/GPU OC for Erista?
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- Tegra X1 on Erista is on TSMC 20nm HPM node, consumes much more power (~2x) and generates much more heat, compared to Tegra X1+ on Mariko (TSMC 16nm FinFET).
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- Erista Switch uses lower speedo (=== lower quality === higher voltage required) SoC from NVIDIA. You will NOT get comparable performance to NVIDIA Shield TV no matter what.
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@@ -45,8 +43,16 @@ I'd appreciate if someone is willing to contribute or upload latest binaries. Bu
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- Unsafe: 2131.2 MHz or Overvolting
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- 2131.2 MHz might be stable for some chips without overvolting.
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- No obvious evidence suggests that DRAM bus overvolting is useful.
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- [Use this to set DRAM bus voltage](https://gist.github.com/KazushiMe/6bb0fcbefe0e03b1274079522516d56d).
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- **[System Settings (Optional)](https://github.com/KazushiMe/Switch-OC-Suite/blob/master/system_settings.md)**
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- **TinyMemBenchNX**: DRAM throughput and latency test based on [tinymembench](https://github.com/ssvb/tinymembench)
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- **MemTesterNX**: A userspace utility for testing DRAM faults and stability based on [memtester](https://pyropus.ca/software/memtester/)
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- Now with multi-thread support and "stress DRAM" option, it should be able to test DRAM stability with adjusted timings.
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### Mariko Only
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@@ -90,46 +96,14 @@ I'd appreciate if someone is willing to contribute or upload latest binaries. Bu
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- Extend battery life expectancy by maintaining battery charge at 40% - 60% and disabling fast charging if possible.
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- Known issue: Fast charging toggle will be reset in-game.
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- System Settings (Optional)
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- Cherry-pick from below and add them manually.
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- Fan Control Optimization (safe OC)
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- `[tc]`
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- Set `holdable_tskin` to 52˚C (default 48˚C).
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- Replacing stock thermal paste and adding thermal pad on Wi-Fi/BT module(shielded, adjacent to antennas) is recommended.
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- Beware that Aula (OLED model) has worse cooling compared to all previous models.
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- Disable background services, less heat and power consumption in standby mode
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- `;Disable Background service`
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- Don't add this if you **use Nintendo Online services**.
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- Game recording and SysDVR streaming @ 60fps with high video bitrate (7.5Mbps)
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- `[am.debug]`
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- Recommended: [dvr-patches](https://github.com/exelix11/dvr-patches): Allow screenshot/recording in any games and remove overlay image (copyright notice or logo).
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- For optimal streaming experience, SysDVR via USB interface is recommended.
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- Known Issues (won't fix)
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- Game recordings may be less than 30 seconds if higher bitrate is used.
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- It has noticeable performance impacts in demanding games.
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- Video duration shown in album will be doubled, while the playback speed or mp4 file itself are not affected.
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- Change the threshold for chargers providing enough power
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- `[psm]`
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- `enough_power_threshold_mw` is be the threshold of "Official Charger"
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- E.g. set it to `0x4268` (17,000 mW) and 18W power bank will be "Official Charger".
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- **TinyMemBenchNX**: DRAM throughput and latency test based on [tinymembench](https://github.com/ssvb/tinymembench)
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- **MemTesterNX**: A userspace utility for testing DRAM faults and stability based on [memtester](https://pyropus.ca/software/memtester/)
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- Now with multi-thread support and "stress DRAM" option, it should be able to test DRAM stability with adjusted timings.
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## Installation
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1. Download latest release.
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2. Manually edit `system_settings.ini` and copy all the files in `SdOut` to the root of SD card.
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2. Copy all files in `SdOut` to the root of SD card. (Mariko Only)
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- Erista: Sys-clk-OC will NOT work, use official sys-clk instead. Only `loader.kip` and some benchmark homebrew are available.
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3. Grab `x.x.x_loader_xxxx.x.kip` for your Atmosphere version and desired RAM frequency, rename it to `loader.kip` and place it in `/atmosphere/kips/`.
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@@ -939,8 +939,8 @@ namespace ams::ldr {
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if (value == memPtmLimit)
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{
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confTable = reinterpret_cast<perf_conf_entry *>(ptr - offsetof(perf_conf_entry, emc_freq_1));
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uintptr_t confTableEntryNew = reinterpret_cast<uintptr_t>(confTable + entryCnt);
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if (confTableEntryNew > mapped_nso + nso_size)
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uintptr_t entry_end_offset = reinterpret_cast<uintptr_t>(confTable + entryCnt) - sizeof(u32);
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if (entry_end_offset > mapped_nso + nso_size)
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return;
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break;
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}
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@@ -953,21 +953,21 @@ namespace ams::ldr {
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for (u32 i = 0; i < entryCnt; i++)
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{
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perf_conf_entry* PerfConfEntryCurrent = confTable + i;
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perf_conf_entry* entry_current = confTable + i;
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if (PerfConfEntryCurrent->emc_freq_1 != PerfConfEntryCurrent->emc_freq_2)
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if (entry_current->emc_freq_1 != entry_current->emc_freq_2)
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return;
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switch (PerfConfEntryCurrent->emc_freq_1)
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switch (entry_current->emc_freq_1)
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{
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case memPtmLimit:
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PatchOffset(std::addressof(PerfConfEntryCurrent->emc_freq_1), memPtmMax);
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PatchOffset(std::addressof(PerfConfEntryCurrent->emc_freq_2), memPtmMax);
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PatchOffset(std::addressof(entry_current->emc_freq_1), memPtmMax);
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PatchOffset(std::addressof(entry_current->emc_freq_2), memPtmMax);
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break;
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case 1331'200'000:
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case 1065'600'000:
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PatchOffset(std::addressof(PerfConfEntryCurrent->emc_freq_1), memPtmLimit);
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PatchOffset(std::addressof(PerfConfEntryCurrent->emc_freq_2), memPtmLimit);
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PatchOffset(std::addressof(entry_current->emc_freq_1), memPtmLimit);
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PatchOffset(std::addressof(entry_current->emc_freq_2), memPtmLimit);
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break;
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default:
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return;
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@@ -1,71 +0,0 @@
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diff --git a/bdk/power/max7762x.c b/bdk/power/max7762x.c
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index a7d30ce..d074009 100644
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--- a/bdk/power/max7762x.c
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+++ b/bdk/power/max7762x.c
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@@ -91,8 +91,8 @@ static const max77620_regulator_t _pmic_regulators[] = {
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{ "max77621_CPU", 6250, 606250, 1000000, 1400000, REGULATOR_BC0, MAX77621_VOUT_REG, MAX77621_VOUT_DVS_REG, MAX77621_DVC_DVS_VOLT_MASK, {{ MAX77621_CPU_CTRL1_POR_DEFAULT, MAX77621_CPU_CTRL1_HOS_DEFAULT, MAX77621_CPU_CTRL2_POR_DEFAULT, MAX77621_CPU_CTRL2_HOS_DEFAULT }} },
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{ "max77621_GPU", 6250, 606250, 1200000, 1400000, REGULATOR_BC0, MAX77621_VOUT_REG, MAX77621_VOUT_DVS_REG, MAX77621_DVC_DVS_VOLT_MASK, {{ MAX77621_CPU_CTRL1_POR_DEFAULT, MAX77621_CPU_CTRL1_HOS_DEFAULT, MAX77621_CPU_CTRL2_POR_DEFAULT, MAX77621_CPU_CTRL2_HOS_DEFAULT }} },
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{ "max77812_CPU", 5000, 250000, 600000, 1525000, REGULATOR_BC1, MAX77812_REG_M4_VOUT, MAX77812_REG_EN_CTRL, MAX77812_BUCK_VOLT_MASK, {{ MAX77812_EN_CTRL_EN_M4_MASK, MAX77812_EN_CTRL_EN_M4_SHIFT, 0, 0 }} },
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- //{ "max77812_GPU", 5000, 250000, 600000, 1525000, REGULATOR_BC1, MAX77812_REG_M1_VOUT, MAX77812_REG_EN_CTRL, MAX77812_BUCK_VOLT_MASK, {{ MAX77812_EN_CTRL_EN_M1_MASK, MAX77812_EN_CTRL_EN_M1_SHIFT, 0, 0 }} },
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- //{ "max77812_RAM", 5000, 250000, 600000, 1525000, REGULATOR_BC1, MAX77812_REG_M3_VOUT, MAX77812_REG_EN_CTRL, MAX77812_BUCK_VOLT_MASK, {{ MAX77812_EN_CTRL_EN_M3_MASK, MAX77812_EN_CTRL_EN_M3_SHIFT, 0, 0 }} } // Only on PHASE211 configuration.
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+ { "max77812_GPU", 5000, 250000, 600000, 1525000, REGULATOR_BC1, MAX77812_REG_M1_VOUT, MAX77812_REG_EN_CTRL, MAX77812_BUCK_VOLT_MASK, {{ MAX77812_EN_CTRL_EN_M1_MASK, MAX77812_EN_CTRL_EN_M1_SHIFT, 0, 0 }} },
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+ { "max77812_RAM", 5000, 250000, 600000, 1525000, REGULATOR_BC1, MAX77812_REG_M3_VOUT, MAX77812_REG_EN_CTRL, MAX77812_BUCK_VOLT_MASK, {{ MAX77812_EN_CTRL_EN_M3_MASK, MAX77812_EN_CTRL_EN_M3_SHIFT, 0, 0 }} } // Only on PHASE211 configuration.
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};
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static u8 _max77812_get_address()
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diff --git a/bdk/power/max7762x.h b/bdk/power/max7762x.h
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index 3478530..7a3e518 100644
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--- a/bdk/power/max7762x.h
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+++ b/bdk/power/max7762x.h
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@@ -61,9 +61,9 @@
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#define REGULATOR_CPU0 13
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#define REGULATOR_GPU0 14
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#define REGULATOR_CPU1 15
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-//#define REGULATOR_GPU1 16
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-//#define REGULATOR_GPU1 17
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-#define REGULATOR_MAX 15
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+#define REGULATOR_GPU1 16
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+#define REGULATOR_DRAM 17
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+#define REGULATOR_MAX 17
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#define MAX77621_CPU_I2C_ADDR 0x1B
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#define MAX77621_GPU_I2C_ADDR 0x1C
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diff --git a/bootloader/main.c b/bootloader/main.c
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index 62f4f5d..9506869 100644
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--- a/bootloader/main.c
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+++ b/bootloader/main.c
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@@ -1503,6 +1503,34 @@ void ipl_main()
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if (minerva_init()) //!TODO: Add Tegra210B01 support to minerva.
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h_cfg.errors |= ERR_LIBSYS_MTC;
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+ // DRAM overvolt.
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+ if (h_cfg.t210b01)
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+ {
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+ u32 dram_uV = 0;
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+
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+ LIST_INIT(ini_sections);
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+ if (ini_parse(&ini_sections, "oc.ini", false))
|
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+ {
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+ LIST_FOREACH_ENTRY(ini_sec_t, ini_sec, &ini_sections, link)
|
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+ {
|
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+ // Only parse emc section.
|
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+ if (strcmp(ini_sec->name, "emc"))
|
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+ continue;
|
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+
|
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+ LIST_FOREACH_ENTRY(ini_kv_t, kv, &ini_sec->kvs, link)
|
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+ {
|
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+ if (!strcmp("volt", kv->key))
|
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+ dram_uV = atoi(kv->val);
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+ }
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+
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+ break;
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+ }
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+ }
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+
|
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+ if (dram_uV)
|
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+ max7762x_regulator_set_voltage(REGULATOR_DRAM, dram_uV);
|
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+ }
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+
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display_init();
|
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|
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u32 *fb = display_init_framebuffer_pitch();
|
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@@ -1,166 +0,0 @@
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@nsobid-A79706954C6C45568B0FFE610627E2E89D8FB0D4
|
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@flag offset_shift 0x100
|
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|
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// PTM PerformanceConfiguration Patch for 12.0.x-12.1.0
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// Change all RAM freqs to 1862.4 MHz and Boost CPU freqs to 1963.5 MHz by default
|
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// RAM
|
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// 1600.0 MHz - 00105E5F
|
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// 1728.0 MHz - 0030FF66
|
||||
// 1795.2 MHz - 0094006B
|
||||
// 1862.4 MHz - 00F8016F
|
||||
// 1894.4 MHz - 0040EA70
|
||||
// 1932.8 MHz - 00303473
|
||||
// 1996.8 MHz - 00C00477
|
||||
// 2064.0 MHz - 0024067B
|
||||
// 2099.2 MHz - 00401F7D
|
||||
// 2131.2 MHz - 0088077F
|
||||
// CPU
|
||||
// 1963.5 MHz - E0A10875
|
||||
// 2295.0 MHz - C0EBCA88
|
||||
// All values are Little-Endian
|
||||
// See https://switchbrew.org/wiki/PTM_services#PerformanceConfiguration for details
|
||||
// Use IPSwitch(https://github.com/3096/ipswitch/) to convert into ips patch
|
||||
|
||||
//0x00010000: 1020, 384.0, 1600.0
|
||||
@enabled
|
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000C5E14 00F7CB3C
|
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000C5E18 00F7CB3C
|
||||
000C5E1C 0060E316
|
||||
000C5E20 0060E316
|
||||
000C5E24 00F8016F
|
||||
000C5E28 00F8016F
|
||||
|
||||
//0x00010001: 1020, 768.0, 1600.0
|
||||
@enabled
|
||||
000C5E34 00F7CB3C
|
||||
000C5E38 00F7CB3C
|
||||
000C5E3C 00C0C62D
|
||||
000C5E40 00C0C62D
|
||||
000C5E44 00F8016F
|
||||
000C5E48 00F8016F
|
||||
|
||||
//0x00010002: 1224, 691.0, 1600.0
|
||||
@enabled
|
||||
000C5E54 00C2F448
|
||||
000C5E58 00C2F448
|
||||
000C5E5C 00E03229
|
||||
000C5E60 00E03229
|
||||
000C5E64 00F8016F
|
||||
000C5E68 00F8016F
|
||||
|
||||
//0x00020000: 1020, 230.4, 1600.0
|
||||
@enabled
|
||||
000C5E74 00F7CB3C
|
||||
000C5E78 00F7CB3C
|
||||
000C5E7C 00A0BB0D
|
||||
000C5E80 00A0BB0D
|
||||
000C5E84 00F8016F
|
||||
000C5E88 00F8016F
|
||||
|
||||
//0x00020001: 1020, 307.2, 1600.0
|
||||
@enabled
|
||||
000C5E94 00F7CB3C
|
||||
000C5E98 00F7CB3C
|
||||
000C5E9C 00804F12
|
||||
000C5EA0 00804F12
|
||||
000C5EA4 00F8016F
|
||||
000C5EA8 00F8016F
|
||||
|
||||
//0x00020002: 1224, 230.4, 1600.0
|
||||
@enabled
|
||||
000C5EB4 00C2F448
|
||||
000C5EB8 00C2F448
|
||||
000C5EBC 00A0BB0D
|
||||
000C5EC0 00A0BB0D
|
||||
000C5EC4 00F8016F
|
||||
000C5EC8 00F8016F
|
||||
|
||||
//0x00020003: 1020, 307.2, 1331.2
|
||||
@enabled
|
||||
000C5ED4 00F7CB3C
|
||||
000C5ED8 00F7CB3C
|
||||
000C5EDC 00804F12
|
||||
000C5EE0 00804F12
|
||||
000C5EE4 00F8016F
|
||||
000C5EE8 00F8016F
|
||||
|
||||
//0x00020004: 1020, 384.0, 1331.2
|
||||
@enabled
|
||||
000C5EF4 00F7CB3C
|
||||
000C5EF8 00F7CB3C
|
||||
000C5EFC 0060E316
|
||||
000C5F00 0060E316
|
||||
000C5F04 00F8016F
|
||||
000C5F08 00F8016F
|
||||
|
||||
//0x00020005: 1020, 307.0, 1065.6
|
||||
@enabled
|
||||
000C5F14 00F7CB3C
|
||||
000C5F18 00F7CB3C
|
||||
000C5F1C 00804F12
|
||||
000C5F20 00804F12
|
||||
000C5F24 00F8016F
|
||||
000C5F28 00F8016F
|
||||
|
||||
//0x00020006: 1020, 384.0, 1065.6
|
||||
@enabled
|
||||
000C5F34 00F7CB3C
|
||||
000C5F38 00F7CB3C
|
||||
000C5F3C 0060E316
|
||||
000C5F40 0060E316
|
||||
000C5F44 00F8016F
|
||||
000C5F48 00F8016F
|
||||
|
||||
//0x92220007: 1020, 460.0, 1600.0
|
||||
@enabled
|
||||
000C5F54 00F7CB3C
|
||||
000C5F58 00F7CB3C
|
||||
000C5F5C 0040771B
|
||||
000C5F60 0040771B
|
||||
000C5F64 00F8016F
|
||||
000C5F68 00F8016F
|
||||
|
||||
//0x92220008: 1020, 460.0, 1331.2
|
||||
@enabled
|
||||
000C5F74 00F7CB3C
|
||||
000C5F78 00F7CB3C
|
||||
000C5F7C 0040771B
|
||||
000C5F80 0040771B
|
||||
000C5F84 00F8016F
|
||||
000C5F88 00F8016F
|
||||
|
||||
//0x92220009: 1785, 76.8, 1600.0
|
||||
@enabled
|
||||
000C5F94 E0A10875
|
||||
000C5F98 E0A10875
|
||||
000C5F9C 00E09304
|
||||
000C5FA0 00E09304
|
||||
000C5FA4 00F8016F
|
||||
000C5FA8 00F8016F
|
||||
|
||||
//0x9222000A: 1785, 76.8, 1331.2
|
||||
@enabled
|
||||
000C5FB4 E0A10875
|
||||
000C5FB8 E0A10875
|
||||
000C5FBC 00E09304
|
||||
000C5FC0 00E09304
|
||||
000C5FC4 00F8016F
|
||||
000C5FC8 00F8016F
|
||||
|
||||
//0x9222000B: 1020, 76.8, 1600.0
|
||||
@enabled
|
||||
000C5FD4 00F7CB3C
|
||||
000C5FD8 00F7CB3C
|
||||
000C5FDC 00E09304
|
||||
000C5FE0 00E09304
|
||||
000C5FE4 00F8016F
|
||||
000C5FE8 00F8016F
|
||||
|
||||
//0x9222000C: 1020, 76.8, 1331.2
|
||||
@enabled
|
||||
000C5FF4 00F7CB3C
|
||||
000C5FF8 00F7CB3C
|
||||
000C5FFC 00E09304
|
||||
000C6000 00E09304
|
||||
000C6004 00F8016F
|
||||
000C6008 00F8016F
|
||||
@@ -1,166 +0,0 @@
|
||||
@nsobid-2CA78D4066C1C11317CC2705EBADA9A51D3AC981
|
||||
@flag offset_shift 0x100
|
||||
|
||||
// PTM PerformanceConfiguration Patch for 13.0.0
|
||||
// Change all RAM freqs to 1862.4 MHz and Boost CPU freqs to 1963.5 MHz by default
|
||||
// RAM
|
||||
// 1600.0 MHz - 00105E5F
|
||||
// 1728.0 MHz - 0030FF66
|
||||
// 1795.2 MHz - 0094006B
|
||||
// 1862.4 MHz - 00F8016F
|
||||
// 1894.4 MHz - 0040EA70
|
||||
// 1932.8 MHz - 00303473
|
||||
// 1996.8 MHz - 00C00477
|
||||
// 2064.0 MHz - 0024067B
|
||||
// 2099.2 MHz - 00401F7D
|
||||
// 2131.2 MHz - 0088077F
|
||||
// CPU
|
||||
// 1963.5 MHz - E0A10875
|
||||
// 2295.0 MHz - C0EBCA88
|
||||
// All values are Little-Endian
|
||||
// See https://switchbrew.org/wiki/PTM_services#PerformanceConfiguration for details
|
||||
// Use IPSwitch(https://github.com/3096/ipswitch/) to convert into ips patch
|
||||
|
||||
//0x00010000: 1020, 384.0, 1600.0
|
||||
@enabled
|
||||
000A031C 00F7CB3C
|
||||
000A0320 00F7CB3C
|
||||
000A0324 0060E316
|
||||
000A0328 0060E316
|
||||
000A032C 00F8016F
|
||||
000A0330 00F8016F
|
||||
|
||||
//0x00010001: 1020, 768.0, 1600.0
|
||||
@enabled
|
||||
000A033C 00F7CB3C
|
||||
000A0340 00F7CB3C
|
||||
000A0344 00C0C62D
|
||||
000A0348 00C0C62D
|
||||
000A034C 00F8016F
|
||||
000A0350 00F8016F
|
||||
|
||||
//0x00010002: 1224, 691.0, 1600.0
|
||||
@enabled
|
||||
000A035C 00C2F448
|
||||
000A0360 00C2F448
|
||||
000A0364 00E03229
|
||||
000A0368 00E03229
|
||||
000A036C 00F8016F
|
||||
000A0370 00F8016F
|
||||
|
||||
//0x00020000: 1020, 230.4, 1600.0
|
||||
@enabled
|
||||
000A037C 00F7CB3C
|
||||
000A0380 00F7CB3C
|
||||
000A0384 00A0BB0D
|
||||
000A0388 00A0BB0D
|
||||
000A038C 00F8016F
|
||||
000A0390 00F8016F
|
||||
|
||||
//0x00020001: 1020, 307.2, 1600.0
|
||||
@enabled
|
||||
000A039C 00F7CB3C
|
||||
000A03A0 00F7CB3C
|
||||
000A03A4 00804F12
|
||||
000A03A8 00804F12
|
||||
000A03AC 00F8016F
|
||||
000A03B0 00F8016F
|
||||
|
||||
//0x00020002: 1224, 230.4, 1600.0
|
||||
@enabled
|
||||
000A03BC 00C2F448
|
||||
000A03C0 00C2F448
|
||||
000A03C4 00A0BB0D
|
||||
000A03C8 00A0BB0D
|
||||
000A03CC 00F8016F
|
||||
000A03D0 00F8016F
|
||||
|
||||
//0x00020003: 1020, 307.2, 1331.2
|
||||
@enabled
|
||||
000A03DC 00F7CB3C
|
||||
000A03E0 00F7CB3C
|
||||
000A03E4 00804F12
|
||||
000A03E8 00804F12
|
||||
000A03EC 00F8016F
|
||||
000A03F0 00F8016F
|
||||
|
||||
//0x00020004: 1020, 384.0, 1331.2
|
||||
@enabled
|
||||
000A03FC 00F7CB3C
|
||||
000A0400 00F7CB3C
|
||||
000A0404 0060E316
|
||||
000A0408 0060E316
|
||||
000A040C 00F8016F
|
||||
000A0410 00F8016F
|
||||
|
||||
//0x00020005: 1020, 307.0, 1065.6
|
||||
@enabled
|
||||
000A041C 00F7CB3C
|
||||
000A0420 00F7CB3C
|
||||
000A0424 00804F12
|
||||
000A0428 00804F12
|
||||
000A042C 00F8016F
|
||||
000A0430 00F8016F
|
||||
|
||||
//0x00020006: 1020, 384.0, 1065.6
|
||||
@enabled
|
||||
000A043C 00F7CB3C
|
||||
000A0440 00F7CB3C
|
||||
000A0444 0060E316
|
||||
000A0448 0060E316
|
||||
000A044C 00F8016F
|
||||
000A0450 00F8016F
|
||||
|
||||
//0x92220007: 1020, 460.0, 1600.0
|
||||
@enabled
|
||||
000A045C 00F7CB3C
|
||||
000A0460 00F7CB3C
|
||||
000A0464 0040771B
|
||||
000A0468 0040771B
|
||||
000A046C 00F8016F
|
||||
000A0470 00F8016F
|
||||
|
||||
//0x92220008: 1020, 460.0, 1331.2
|
||||
@enabled
|
||||
000A047C 00F7CB3C
|
||||
000A0480 00F7CB3C
|
||||
000A0484 0040771B
|
||||
000A0488 0040771B
|
||||
000A048C 00F8016F
|
||||
000A0490 00F8016F
|
||||
|
||||
//0x92220009: 1785, 76.8, 1600.0
|
||||
@enabled
|
||||
000A049C E0A10875
|
||||
000A04A0 E0A10875
|
||||
000A04A4 00E09304
|
||||
000A04A8 00E09304
|
||||
000A04AC 00F8016F
|
||||
000A04B0 00F8016F
|
||||
|
||||
//0x9222000A: 1785, 76.8, 1331.2
|
||||
@enabled
|
||||
000A04BC E0A10875
|
||||
000A04C0 E0A10875
|
||||
000A04C4 00E09304
|
||||
000A04C8 00E09304
|
||||
000A04CC 00F8016F
|
||||
000A04D0 00F8016F
|
||||
|
||||
//0x9222000B: 1020, 76.8, 1600.0
|
||||
@enabled
|
||||
000A04DC 00F7CB3C
|
||||
000A04E0 00F7CB3C
|
||||
000A04E4 00E09304
|
||||
000A04E8 00E09304
|
||||
000A04EC 00F8016F
|
||||
000A04F0 00F8016F
|
||||
|
||||
//0x9222000C: 1020, 76.8, 1331.2
|
||||
@enabled
|
||||
000A04FC 00F7CB3C
|
||||
000A0500 00F7CB3C
|
||||
000A0504 00E09304
|
||||
000A0508 00E09304
|
||||
000A050C 00F8016F
|
||||
000A0510 00F8016F
|
||||
27
system_settings.md
Normal file
27
system_settings.md
Normal file
@@ -0,0 +1,27 @@
|
||||
## `system_settings.ini`
|
||||
|
||||
### Cherry-pick from below and add them manually.
|
||||
|
||||
- Fan Control Optimization (Mariko only)
|
||||
- `[tc]`
|
||||
- Set `holdable_tskin` to 52˚C (default 48˚C).
|
||||
- Replacing stock thermal paste and adding thermal pad on Wi-Fi/BT module(shielded, adjacent to antennas) is recommended.
|
||||
- Beware that Aula (OLED model) has worse cooling compared to all previous models.
|
||||
|
||||
- Disable background services, less heat and power consumption in standby mode
|
||||
- `;Disable Background service`
|
||||
- Don't add this if you **use Nintendo Online services**.
|
||||
|
||||
- Game recording and SysDVR streaming @ 60fps with high video bitrate (7.5Mbps)
|
||||
- `[am.debug]`
|
||||
- Recommended: [dvr-patches](https://github.com/exelix11/dvr-patches): Allow screenshot/recording in any games and remove overlay image (copyright notice or logo).
|
||||
- For optimal streaming experience, SysDVR via USB interface is recommended.
|
||||
- Known Issues (won't fix)
|
||||
- Game recordings may be less than 30 seconds if higher bitrate is used.
|
||||
- It has noticeable performance impacts in demanding games.
|
||||
- Video duration shown in album will be doubled, while the playback speed or mp4 file itself are not affected.
|
||||
|
||||
- Change the threshold for chargers providing enough power
|
||||
- `[psm]`
|
||||
- `enough_power_threshold_mw` is be the threshold of "Official Charger"
|
||||
- E.g. set it to `0x4268` (17,000 mW) and 18W power bank will be "Official Charger".
|
||||
Reference in New Issue
Block a user