14 Commits

Include renames

Author	SHA1	Message	Date
Lightos1	2a60fe1a04	ldr: fix rext fallback	2026-08-26 21:04:00 +02:00
Lightos1	4cf2aab755	pcv: act2pden was correct	2026-08-26 20:46:39 +02:00
Lightos1	0a9f412c51	ldr: add erista rext timings	2026-08-26 20:40:09 +02:00
Lightos1	8514d3c95b	add proper quse timing	2026-08-26 19:56:08 +02:00
Lightos1	eba5573711	Refactor busReloc to use hooks. ... Also add sd logging and temporarily remove new Erista timings; they're still slightly too explosive. Todo: Rename stuff and fix uart redirect.	2026-08-25 20:40:32 +02:00
Lightos1	c5fcc6c051	pcv/erista: improve timings (rdv & qpop)	2026-08-21 23:52:56 +02:00
Lightos1	c0096686d8	refactor assembly patching	2026-08-20 15:48:02 +02:00
Lightos1	8429576545	ldr: slight w2r timing fix	2026-08-04 23:38:56 +02:00
souldbminersmwc	8476969576	revert timings ... more recalculation must be done	2026-07-30 18:22:47 -04:00
souldbminersmwc	f25f6a85db	fix w2r	2026-07-30 16:42:49 -04:00
souldbminersmwc	4415749779	screw ram timings	2026-07-30 16:34:25 -04:00
souldbminersmwc	aae77e0585	more timings	2026-07-30 16:29:19 -04:00
souldbminersmwc	497fc64d7c	more timing improvement	2026-07-30 11:24:53 -04:00
Lightos1	af8912321c	ldr: major refactor part 1	2026-07-28 19:54:07 +02:00