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remove t2 cap, add minor timing tweaks

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This commit is contained in:
Lightos1
2026-07-15 19:12:12 +02:00
parent 0de76f1616
commit b2d2025688
10 changed files with 31 additions and 75 deletions
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4
Source/Atmosphere/stratosphere/loader/source/oc/customize.cpp
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@@ -59,10 +59,6 @@ volatile CustomizeTable C = {
.t7_tWTR = 0, .t7_tWTR = 0,
.t8_tREFI = 0, .t8_tREFI = 0,
/* At 1333WL, for some reason (incorrect ram timing config in mtc table?), tRP causes crashes at high reductions - 2 seems to be the most common limit. */
/* This is a lazy workaround until I find the issue... */
.t2_tRP_cap = 1,
/* Frequency where non low timings gets used. */ /* Frequency where non low timings gets used. */
.timingEmcTbreak = DISABLED, .timingEmcTbreak = DISABLED,
.low_t1_tRCD = 0, .low_t1_tRCD = 0,

2
Source/Atmosphere/stratosphere/loader/source/oc/customize.hpp
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@@ -86,8 +86,6 @@ struct CustomizeTable {
u32 t7_tWTR; u32 t7_tWTR;
u32 t8_tREFI; u32 t8_tREFI;
u32 t2_tRP_cap;
u32 timingEmcTbreak; u32 timingEmcTbreak;
u32 low_t1_tRCD; u32 low_t1_tRCD;
u32 low_t2_tRP; u32 low_t2_tRP;

7
Source/Atmosphere/stratosphere/loader/source/oc/mariko/calculate_timings.cpp
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@@ -135,14 +135,9 @@ namespace ams::ldr::hoc::pcv::mariko {
/* At 1333WL, for some reason (incorrect ram timing config in mtc table?), tRP causes crashes at high reductions - 2 seems to be the most common limit. */ /* At 1333WL, for some reason (incorrect ram timing config in mtc table?), tRP causes crashes at high reductions - 2 seems to be the most common limit. */
/* This is a lazy workaround until I find the issue... */ /* This is a lazy workaround until I find the issue... */
const bool lowFreq = freq < C.timingEmcTbreak; const bool lowFreq = freq < C.timingEmcTbreak;
volatile u32 tRPpbIndex = lowFreq ? C.low_t2_tRP : C.t2_tRP;
if (WL == WL_1331) {
tRPpbIndex = MIN(C.t2_tRP_cap, tRPpbIndex);
}
tRCD = tRCD_values[lowFreq ? C.low_t1_tRCD : C.t1_tRCD]; tRCD = tRCD_values[lowFreq ? C.low_t1_tRCD : C.t1_tRCD];
tRPpb = tRP_values[tRPpbIndex]; tRPpb = tRP_values[lowFreq ? C.low_t2_tRP : C.t2_tRP];
tRAS = tRAS_values[lowFreq ? C.low_t3_tRAS : C.t3_tRAS]; tRAS = tRAS_values[lowFreq ? C.low_t3_tRAS : C.t3_tRAS];
tRRD = tRRD_values[lowFreq ? C.low_t4_tRRD : C.t4_tRRD]; tRRD = tRRD_values[lowFreq ? C.low_t4_tRRD : C.t4_tRRD];
tRFCpb = tRFC_values[lowFreq ? C.low_t5_tRFC : C.t5_tRFC]; tRFCpb = tRFC_values[lowFreq ? C.low_t5_tRFC : C.t5_tRFC];

10
Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv_erista.cpp
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@@ -324,13 +324,13 @@ namespace ams::ldr::hoc::pcv::erista {
constexpr u32 AtomsPerDvfsPulse = 0x7; constexpr u32 AtomsPerDvfsPulse = 0x7;
constexpr u32 McEmcSameFreq = 0x0; constexpr u32 McEmcSameFreq = 0x0;
constexpr u32 ExpiringSoonSlackThreshold = 0xC; /* 0xC? */ constexpr u32 ExpiringSoonSlackThreshold = 0xC;
const u32 PriorityInversionIsoThreshold = GET_CYCLE_CEIL(7.5); const u32 priorityInversionIsoThreshold = GET_CYCLE_CEIL(7.5);
constexpr u32 EmcReqB2bXfer = 0x0; constexpr u32 EmcReqB2bXfer = 0x0;
const u32 PriorityInversionThreshold = GET_CYCLE_CEIL(22.5); const u32 priorityInversionThreshold = GET_CYCLE_CEIL(22.5);
const u32 Bc2aaHoldoffThreshold = table->burst_mc_regs.mc_emem_arb_timing_rc + 1; const u32 bc2aaHoldoffThreshold = table->burst_mc_regs.mc_emem_arb_timing_rc + 1;
const u32 mc_emem_arb_misc0 = (AtomsPerDvfsPulse << 28) | (McEmcSameFreq << 27) | (ExpiringSoonSlackThreshold << 21) | (PriorityInversionIsoThreshold << 16) | (EmcReqB2bXfer << 15) | (PriorityInversionThreshold << 8) | (Bc2aaHoldoffThreshold << 0); const u32 mc_emem_arb_misc0 = (AtomsPerDvfsPulse << 28) | (McEmcSameFreq << 27) | (ExpiringSoonSlackThreshold << 21) | (priorityInversionIsoThreshold << 16) | (EmcReqB2bXfer << 15) | (priorityInversionThreshold << 8) | (bc2aaHoldoffThreshold << 0);
table->burst_mc_regs.mc_emem_arb_misc0 = mc_emem_arb_misc0; table->burst_mc_regs.mc_emem_arb_misc0 = mc_emem_arb_misc0;
u32 mpcorer_ptsa_rate = MIN(static_cast<u32>(227), (table->rate_khz / 1600000) * 208); u32 mpcorer_ptsa_rate = MIN(static_cast<u32>(227), (table->rate_khz / 1600000) * 208);

46
Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv_mariko.cpp
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@@ -35,7 +35,7 @@ namespace ams::ldr::hoc::pcv::mariko {
} }
} }
/* Default value is 800mV. */ /* Default value is 1050mV. */
if (C.marikoGpuVmax) { if (C.marikoGpuVmax) {
PATCH_OFFSET(ptr + 1, C.marikoGpuVmax); PATCH_OFFSET(ptr + 1, C.marikoGpuVmax);
} }
@@ -488,17 +488,26 @@ namespace ams::ldr::hoc::pcv::mariko {
da_covers |= (w_cover << 16); da_covers |= (w_cover << 16);
table->burst_mc_regs.mc_emem_arb_da_covers = da_covers; table->burst_mc_regs.mc_emem_arb_da_covers = da_covers;
constexpr u32 AtomsPerDvfsPulse = 0x7; constexpr u32 AtomsPerDvfsPulse = 0x7;
constexpr u32 McEmcSameFreq = 0x0; constexpr u32 McEmcSameFreq = 0x0;
/* On certain frequencies (2966, 3100, 3133 and 3200 MHz), ExpiringSoonSlackThreshold has a value of 0x12. */ const u32 expiringSoonSlackThreshold = [&] {
/* But 0x13 is good enough for now. */ switch (table->rate_khz) {
constexpr u32 ExpiringSoonSlackThreshold = 0x13; case 2966000:
const u32 PriorityInversionIsoThreshold = GET_CYCLE_CEIL(7.5); case 3100000:
constexpr u32 EmcReqB2bXfer = 0x0; case 3133000:
const u32 PriorityInversionThreshold = GET_CYCLE_CEIL(22.5); case 3200000:
const u32 Bc2aaHoldoffThreshold = table->burst_mc_regs.mc_emem_arb_timing_rc + 1; return 0x12u;
default:
return 0x13u;
}
}();
const u32 mc_emem_arb_misc0 = (AtomsPerDvfsPulse << 28) | (McEmcSameFreq << 27) | (ExpiringSoonSlackThreshold << 21) | (PriorityInversionIsoThreshold << 16) | (EmcReqB2bXfer << 15) | (PriorityInversionThreshold << 8) | (Bc2aaHoldoffThreshold << 0); const u32 priorityInversionIsoThreshold = GET_CYCLE_CEIL(7.5);
constexpr u32 EmcReqB2bXfer = 0x0;
const u32 priorityInversionThreshold = GET_CYCLE_CEIL(22.5);
const u32 bc2aaHoldoffThreshold = table->burst_mc_regs.mc_emem_arb_timing_rc + 1;
const u32 mc_emem_arb_misc0 = (AtomsPerDvfsPulse << 28) | (McEmcSameFreq << 27) | (expiringSoonSlackThreshold << 21) | (priorityInversionIsoThreshold << 16) | (EmcReqB2bXfer << 15) | (priorityInversionThreshold << 8) | (bc2aaHoldoffThreshold << 0);
table->burst_mc_regs.mc_emem_arb_misc0 = mc_emem_arb_misc0; table->burst_mc_regs.mc_emem_arb_misc0 = mc_emem_arb_misc0;
table->la_scale_regs.mc_mll_mpcorer_ptsa_rate = 0x115; table->la_scale_regs.mc_mll_mpcorer_ptsa_rate = 0x115;
@@ -934,14 +943,11 @@ namespace ams::ldr::hoc::pcv::mariko {
} __attribute__((packed)) cmd; } __attribute__((packed)) cmd;
I2cSession _session; I2cSession _session;
Result res = i2cOpenSession(&_session, dev); R_TRY(i2cOpenSession(&_session, dev));
if (R_FAILED(res)) {
return res;
}
cmd.reg = reg; cmd.reg = reg;
cmd.val = val; cmd.val = val;
res = i2csessionSendAuto(&_session, &cmd, sizeof(cmd), I2cTransactionOption_All); Result res = i2csessionSendAuto(&_session, &cmd, sizeof(cmd), I2cTransactionOption_All);
i2csessionClose(&_session); i2csessionClose(&_session);
return res; return res;
} }
@@ -978,10 +984,6 @@ namespace ams::ldr::hoc::pcv::mariko {
Result resultI2C = I2cSet_U8(I2cDevice_Max77812_2, 0x25, (emc_uv - uv_min) / uv_step); Result resultI2C = I2cSet_U8(I2cDevice_Max77812_2, 0x25, (emc_uv - uv_min) / uv_step);
i2cExit(); i2cExit();
if (R_SUCCEEDED(resultI2C)) {
R_SUCCEED();
}
return resultI2C; return resultI2C;
} }

6
Source/hoc-clk/common/include/hocclk/config.h
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@@ -109,8 +109,6 @@ typedef enum {
KipConfigValue_low_t7_tWTR, KipConfigValue_low_t7_tWTR,
KipConfigValue_low_t8_tREFI, KipConfigValue_low_t8_tREFI,
KipConfigValue_t2_tRP_cap,
KipConfigValue_read_latency_1333, KipConfigValue_read_latency_1333,
KipConfigValue_read_latency_1600, KipConfigValue_read_latency_1600,
KipConfigValue_read_latency_1866, KipConfigValue_read_latency_1866,
@@ -391,9 +389,6 @@ static inline const char* hocclkFormatConfigValue(HocClkConfigValue val, bool pr
case KipConfigValue_low_t8_tREFI: case KipConfigValue_low_t8_tREFI:
return pretty ? "Low T8 - tREFI" : "low_t7_tREFI"; return pretty ? "Low T8 - tREFI" : "low_t7_tREFI";
case KipConfigValue_t2_tRP_cap:
return pretty ? "t2 - trp 1333WL Cap" : "t2_tRP_cap";
case KipConfigValue_read_latency_1333: case KipConfigValue_read_latency_1333:
return pretty ? "1333 Read Latency" : "read_latency_1333"; return pretty ? "1333 Read Latency" : "read_latency_1333";
case KipConfigValue_read_latency_1600: case KipConfigValue_read_latency_1600:
@@ -666,7 +661,6 @@ static inline uint64_t hocclkValidConfigValue(HocClkConfigValue val, uint64_t in
case KipConfigValue_low_t6_tRTW: case KipConfigValue_low_t6_tRTW:
case KipConfigValue_low_t7_tWTR: case KipConfigValue_low_t7_tWTR:
case KipConfigValue_low_t8_tREFI: case KipConfigValue_low_t8_tREFI:
case KipConfigValue_t2_tRP_cap:
case KipConfigValue_read_latency_1333: case KipConfigValue_read_latency_1333:
case KipConfigValue_read_latency_1600: case KipConfigValue_read_latency_1600:
case KipConfigValue_read_latency_1866: case KipConfigValue_read_latency_1866:

7
Source/hoc-clk/overlay/src/ui/gui/config_info_strings.cpp
View File

@@ -320,13 +320,6 @@ std::vector<std::string> ConfigInfoStrings(HocClkConfigValue val, bool isMariko,
"Write To Read (Low bracket)", "Write To Read (Low bracket)",
"Default: 0" "Default: 0"
}; };
case KipConfigValue_t2_tRP_cap:
return {
"Cap for t2 when 1333WL is used.",
"The default value is sufficient for most RAMs but some may need a lower value",
"Default: 2"
};
case KipConfigValue_t6_tRTW_fine_tune: case KipConfigValue_t6_tRTW_fine_tune:
return { return {
"Fine-tunes the raw calculation of t6", "Fine-tunes the raw calculation of t6",

14
Source/hoc-clk/overlay/src/ui/gui/misc_gui.cpp
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@@ -1424,12 +1424,10 @@ class RamTimingsSubmenuGui : public MiscGui {
const s32 t7 = (s32)cfgPtr->values[KipConfigValue_t7_tWTR]; const s32 t7 = (s32)cfgPtr->values[KipConfigValue_t7_tWTR];
const s32 lt6 = (s32)cfgPtr->values[KipConfigValue_low_t6_tRTW]; const s32 lt6 = (s32)cfgPtr->values[KipConfigValue_low_t6_tRTW];
const s32 lt7 = (s32)cfgPtr->values[KipConfigValue_low_t7_tWTR]; const s32 lt7 = (s32)cfgPtr->values[KipConfigValue_low_t7_tWTR];
const s32 t2c = (s32)cfgPtr->values[KipConfigValue_t2_tRP_cap];
const uint32_t tbk = (uint32_t)cfgPtr->values[KipConfigValue_timingEmcTbreak]; const uint32_t tbk = (uint32_t)cfgPtr->values[KipConfigValue_timingEmcTbreak];
const tsl::Color cT6 = tsl::Color(4, 14, 15, 15); const tsl::Color cT6 = tsl::Color(4, 14, 15, 15);
const tsl::Color cT7 = tsl::Color(15, 9, 2, 15); const tsl::Color cT7 = tsl::Color(15, 9, 2, 15);
const tsl::Color cT2 = tsl::Color(12, 4, 15, 15);
const tsl::Color cAxis = tsl::Color(5, 5, 5, 15); const tsl::Color cAxis = tsl::Color(5, 5, 5, 15);
const tsl::Color cTbk = tsl::Color(7, 7, 7, 10); const tsl::Color cTbk = tsl::Color(7, 7, 7, 10);
@@ -1495,12 +1493,6 @@ class RamTimingsSubmenuGui : public MiscGui {
drawTimingLine(lt6, t6, cT6); drawTimingLine(lt6, t6, cT6);
drawTimingLine(lt7, t7, cT7); drawTimingLine(lt7, t7, cT7);
// t2 tRP cap: constant line
s32 yT2 = valY(t2c) + 1;
renderer->drawRect(gx, yT2, gw, 2, cT2);
renderer->drawCircle(gx, yT2 + 1, 3, true, cT2);
renderer->drawCircle(gx + gw - 1, yT2 + 1, 3, true, cT2);
// X-axis ruler with sideways bitmap-font labels // X-axis ruler with sideways bitmap-font labels
static const uint8_t kDigBmp[10][5] = { static const uint8_t kDigBmp[10][5] = {
{ 7, 5, 5, 5, 7 }, { 6, 2, 2, 2, 7 }, { 7, 1, 7, 4, 7 }, { 7, 1, 3, 1, 7 }, { 5, 5, 7, 1, 1 }, { 7, 5, 5, 5, 7 }, { 6, 2, 2, 2, 7 }, { 7, 1, 7, 4, 7 }, { 7, 1, 3, 1, 7 }, { 5, 5, 7, 1, 1 },
@@ -1537,15 +1529,12 @@ class RamTimingsSubmenuGui : public MiscGui {
renderer->drawString("t6 tRTW", false, gx + 17, ly + 5, 12, cT6); renderer->drawString("t6 tRTW", false, gx + 17, ly + 5, 12, cT6);
renderer->drawRect(gx + 80, ly, 14, 3, cT7); renderer->drawRect(gx + 80, ly, 14, 3, cT7);
renderer->drawString("t7 tWTR", false, gx + 97, ly + 5, 12, cT7); renderer->drawString("t7 tWTR", false, gx + 97, ly + 5, 12, cT7);
renderer->drawRect(gx + 165, ly, 14, 3, cT2);
renderer->drawString("t2 cap", false, gx + 182, ly + 5, 12, cT2);
}); });
tbreakGraph->setBoundaries(0, 0, tsl::cfg::FramebufferWidth, 150); tbreakGraph->setBoundaries(0, 0, tsl::cfg::FramebufferWidth, 150);
this->listElement->addItem(tbreakGraph); this->listElement->addItem(tbreakGraph);
} }
addConfigButton(KipConfigValue_timingEmcTbreak, "RAM-Timing tBreak", ValueRange(0, 1, 1, "", 1), "tBreak", &thresholdsDisabled, {}, addConfigButton(KipConfigValue_timingEmcTbreak, "RAM-Timing tBreak", ValueRange(0, 1, 1, "", 1), "tBreak", &thresholdsDisabled, {}, timingTbreakFreqs, false, true);
timingTbreakFreqs, false, true);
addConfigTrackbar(KipConfigValue_low_t1_tRCD, "Low t1 tRCD", ValueRange(0, 7, 1)); addConfigTrackbar(KipConfigValue_low_t1_tRCD, "Low t1 tRCD", ValueRange(0, 7, 1));
addConfigTrackbar(KipConfigValue_low_t2_tRP, "Low t2 tRP", ValueRange(0, 7, 1)); addConfigTrackbar(KipConfigValue_low_t2_tRP, "Low t2 tRP", ValueRange(0, 7, 1));
addConfigTrackbar(KipConfigValue_low_t3_tRAS, "Low t3 tRAS", ValueRange(0, 9, 1)); addConfigTrackbar(KipConfigValue_low_t3_tRAS, "Low t3 tRAS", ValueRange(0, 9, 1));
@@ -1559,7 +1548,6 @@ class RamTimingsSubmenuGui : public MiscGui {
spacer->setBoundaries(0, 0, tsl::cfg::FramebufferWidth, 8); spacer->setBoundaries(0, 0, tsl::cfg::FramebufferWidth, 8);
this->listElement->addItem(spacer); this->listElement->addItem(spacer);
} }
addConfigTrackbar(KipConfigValue_t2_tRP_cap, "1333WL t2 RP Cap", ValueRange(0, 8, 1));
} }
addMappedConfigTrackbar(KipConfigValue_t6_tRTW_fine_tune, "t6 tRTW Fine Tune", { 0xFFFFFFFEu, 0xFFFFFFFFu, 0u, 1u, 2u }, addMappedConfigTrackbar(KipConfigValue_t6_tRTW_fine_tune, "t6 tRTW Fine Tune", { 0xFFFFFFFEu, 0xFFFFFFFFu, 0u, 1u, 2u },
{ "-2", "-1", " 0", "+1", "+2" }); { "-2", "-1", " 0", "+1", "+2" });

2
Source/hoc-clk/sysmodule/src/file/kip.cpp
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@@ -95,7 +95,6 @@ namespace kip {
CUST_WRITE_FIELD_BATCH(&table, low_t6_tRTW, config::GetConfigValue(KipConfigValue_low_t6_tRTW)); CUST_WRITE_FIELD_BATCH(&table, low_t6_tRTW, config::GetConfigValue(KipConfigValue_low_t6_tRTW));
CUST_WRITE_FIELD_BATCH(&table, low_t7_tWTR, config::GetConfigValue(KipConfigValue_low_t7_tWTR)); CUST_WRITE_FIELD_BATCH(&table, low_t7_tWTR, config::GetConfigValue(KipConfigValue_low_t7_tWTR));
CUST_WRITE_FIELD_BATCH(&table, low_t8_tREFI, config::GetConfigValue(KipConfigValue_low_t8_tREFI)); CUST_WRITE_FIELD_BATCH(&table, low_t8_tREFI, config::GetConfigValue(KipConfigValue_low_t8_tREFI));
CUST_WRITE_FIELD_BATCH(&table, t2_tRP_cap, config::GetConfigValue(KipConfigValue_t2_tRP_cap));
CUST_WRITE_FIELD_BATCH(&table, readLatency1333, config::GetConfigValue(KipConfigValue_read_latency_1333)); CUST_WRITE_FIELD_BATCH(&table, readLatency1333, config::GetConfigValue(KipConfigValue_read_latency_1333));
CUST_WRITE_FIELD_BATCH(&table, readLatency1600, config::GetConfigValue(KipConfigValue_read_latency_1600)); CUST_WRITE_FIELD_BATCH(&table, readLatency1600, config::GetConfigValue(KipConfigValue_read_latency_1600));
@@ -281,7 +280,6 @@ namespace kip {
configValues.values[KipConfigValue_low_t6_tRTW] = cust_get_low_tRTW(&table); configValues.values[KipConfigValue_low_t6_tRTW] = cust_get_low_tRTW(&table);
configValues.values[KipConfigValue_low_t7_tWTR] = cust_get_low_tWTR(&table); configValues.values[KipConfigValue_low_t7_tWTR] = cust_get_low_tWTR(&table);
configValues.values[KipConfigValue_low_t8_tREFI] = cust_get_low_tREFI(&table); configValues.values[KipConfigValue_low_t8_tREFI] = cust_get_low_tREFI(&table);
configValues.values[KipConfigValue_t2_tRP_cap] = cust_get_tRP_cap(&table);
configValues.values[KipConfigValue_read_latency_1333] = cust_get_read_latency_1333(&table); configValues.values[KipConfigValue_read_latency_1333] = cust_get_read_latency_1333(&table);
configValues.values[KipConfigValue_read_latency_1600] = cust_get_read_latency_1600(&table); configValues.values[KipConfigValue_read_latency_1600] = cust_get_read_latency_1600(&table);

8
Source/hoc-clk/sysmodule/src/file/kip.hpp
View File

@@ -54,8 +54,6 @@ namespace kip {
u32 t7_tWTR; u32 t7_tWTR;
u32 t8_tREFI; u32 t8_tREFI;
u32 t2_tRP_cap;
u32 timingEmcTbreak; u32 timingEmcTbreak;
u32 low_t1_tRCD; u32 low_t1_tRCD;
u32 low_t2_tRP; u32 low_t2_tRP;
@@ -269,9 +267,6 @@ namespace kip {
static inline bool cust_set_tREFI(const char *p, u32 v) { static inline bool cust_set_tREFI(const char *p, u32 v) {
CUST_WRITE_FIELD(p, t8_tREFI, v); CUST_WRITE_FIELD(p, t8_tREFI, v);
} }
static inline bool cust_set_tRP_cap(const char *p, u32 v) {
CUST_WRITE_FIELD(p, t2_tRP_cap, v);
}
static inline bool cust_set_timing_emc_tbreak(const char *p, u32 v) { static inline bool cust_set_timing_emc_tbreak(const char *p, u32 v) {
CUST_WRITE_FIELD(p, timingEmcTbreak, v); CUST_WRITE_FIELD(p, timingEmcTbreak, v);
} }
@@ -484,9 +479,6 @@ namespace kip {
static inline u32 cust_get_tREFI(const CustomizeTable *t) { static inline u32 cust_get_tREFI(const CustomizeTable *t) {
return CUST_GET_FIELD(t, t8_tREFI); return CUST_GET_FIELD(t, t8_tREFI);
} }
static inline u32 cust_get_tRP_cap(const CustomizeTable *t) {
return CUST_GET_FIELD(t, t2_tRP_cap);
}
static inline u32 cust_get_timing_emc_tbreak(const CustomizeTable *t) { static inline u32 cust_get_timing_emc_tbreak(const CustomizeTable *t) {
return CUST_GET_FIELD(t, timingEmcTbreak); return CUST_GET_FIELD(t, timingEmcTbreak);
} }