remove t2 cap, add minor timing tweaks
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@@ -59,10 +59,6 @@ volatile CustomizeTable C = {
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.t7_tWTR = 0,
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.t8_tREFI = 0,
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/* At 1333WL, for some reason (incorrect ram timing config in mtc table?), tRP causes crashes at high reductions - 2 seems to be the most common limit. */
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/* This is a lazy workaround until I find the issue... */
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.t2_tRP_cap = 1,
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/* Frequency where non low timings gets used. */
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.timingEmcTbreak = DISABLED,
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.low_t1_tRCD = 0,
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@@ -86,8 +86,6 @@ struct CustomizeTable {
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u32 t7_tWTR;
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u32 t8_tREFI;
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u32 t2_tRP_cap;
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u32 timingEmcTbreak;
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u32 low_t1_tRCD;
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u32 low_t2_tRP;
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@@ -135,14 +135,9 @@ namespace ams::ldr::hoc::pcv::mariko {
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/* At 1333WL, for some reason (incorrect ram timing config in mtc table?), tRP causes crashes at high reductions - 2 seems to be the most common limit. */
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/* This is a lazy workaround until I find the issue... */
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const bool lowFreq = freq < C.timingEmcTbreak;
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volatile u32 tRPpbIndex = lowFreq ? C.low_t2_tRP : C.t2_tRP;
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if (WL == WL_1331) {
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tRPpbIndex = MIN(C.t2_tRP_cap, tRPpbIndex);
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}
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tRCD = tRCD_values[lowFreq ? C.low_t1_tRCD : C.t1_tRCD];
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tRPpb = tRP_values[tRPpbIndex];
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tRPpb = tRP_values[lowFreq ? C.low_t2_tRP : C.t2_tRP];
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tRAS = tRAS_values[lowFreq ? C.low_t3_tRAS : C.t3_tRAS];
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tRRD = tRRD_values[lowFreq ? C.low_t4_tRRD : C.t4_tRRD];
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tRFCpb = tRFC_values[lowFreq ? C.low_t5_tRFC : C.t5_tRFC];
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@@ -324,13 +324,13 @@ namespace ams::ldr::hoc::pcv::erista {
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constexpr u32 AtomsPerDvfsPulse = 0x7;
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constexpr u32 McEmcSameFreq = 0x0;
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constexpr u32 ExpiringSoonSlackThreshold = 0xC; /* 0xC? */
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const u32 PriorityInversionIsoThreshold = GET_CYCLE_CEIL(7.5);
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constexpr u32 ExpiringSoonSlackThreshold = 0xC;
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const u32 priorityInversionIsoThreshold = GET_CYCLE_CEIL(7.5);
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constexpr u32 EmcReqB2bXfer = 0x0;
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const u32 PriorityInversionThreshold = GET_CYCLE_CEIL(22.5);
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const u32 Bc2aaHoldoffThreshold = table->burst_mc_regs.mc_emem_arb_timing_rc + 1;
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const u32 priorityInversionThreshold = GET_CYCLE_CEIL(22.5);
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const u32 bc2aaHoldoffThreshold = table->burst_mc_regs.mc_emem_arb_timing_rc + 1;
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const u32 mc_emem_arb_misc0 = (AtomsPerDvfsPulse << 28) | (McEmcSameFreq << 27) | (ExpiringSoonSlackThreshold << 21) | (PriorityInversionIsoThreshold << 16) | (EmcReqB2bXfer << 15) | (PriorityInversionThreshold << 8) | (Bc2aaHoldoffThreshold << 0);
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const u32 mc_emem_arb_misc0 = (AtomsPerDvfsPulse << 28) | (McEmcSameFreq << 27) | (ExpiringSoonSlackThreshold << 21) | (priorityInversionIsoThreshold << 16) | (EmcReqB2bXfer << 15) | (priorityInversionThreshold << 8) | (bc2aaHoldoffThreshold << 0);
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table->burst_mc_regs.mc_emem_arb_misc0 = mc_emem_arb_misc0;
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u32 mpcorer_ptsa_rate = MIN(static_cast<u32>(227), (table->rate_khz / 1600000) * 208);
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@@ -35,7 +35,7 @@ namespace ams::ldr::hoc::pcv::mariko {
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}
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}
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/* Default value is 800mV. */
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/* Default value is 1050mV. */
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if (C.marikoGpuVmax) {
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PATCH_OFFSET(ptr + 1, C.marikoGpuVmax);
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}
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@@ -488,17 +488,26 @@ namespace ams::ldr::hoc::pcv::mariko {
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da_covers |= (w_cover << 16);
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table->burst_mc_regs.mc_emem_arb_da_covers = da_covers;
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constexpr u32 AtomsPerDvfsPulse = 0x7;
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constexpr u32 McEmcSameFreq = 0x0;
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/* On certain frequencies (2966, 3100, 3133 and 3200 MHz), ExpiringSoonSlackThreshold has a value of 0x12. */
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/* But 0x13 is good enough for now. */
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constexpr u32 ExpiringSoonSlackThreshold = 0x13;
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const u32 PriorityInversionIsoThreshold = GET_CYCLE_CEIL(7.5);
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constexpr u32 EmcReqB2bXfer = 0x0;
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const u32 PriorityInversionThreshold = GET_CYCLE_CEIL(22.5);
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const u32 Bc2aaHoldoffThreshold = table->burst_mc_regs.mc_emem_arb_timing_rc + 1;
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constexpr u32 AtomsPerDvfsPulse = 0x7;
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constexpr u32 McEmcSameFreq = 0x0;
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const u32 expiringSoonSlackThreshold = [&] {
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switch (table->rate_khz) {
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case 2966000:
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case 3100000:
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case 3133000:
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case 3200000:
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return 0x12u;
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default:
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return 0x13u;
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}
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}();
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const u32 mc_emem_arb_misc0 = (AtomsPerDvfsPulse << 28) | (McEmcSameFreq << 27) | (ExpiringSoonSlackThreshold << 21) | (PriorityInversionIsoThreshold << 16) | (EmcReqB2bXfer << 15) | (PriorityInversionThreshold << 8) | (Bc2aaHoldoffThreshold << 0);
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const u32 priorityInversionIsoThreshold = GET_CYCLE_CEIL(7.5);
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constexpr u32 EmcReqB2bXfer = 0x0;
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const u32 priorityInversionThreshold = GET_CYCLE_CEIL(22.5);
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const u32 bc2aaHoldoffThreshold = table->burst_mc_regs.mc_emem_arb_timing_rc + 1;
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const u32 mc_emem_arb_misc0 = (AtomsPerDvfsPulse << 28) | (McEmcSameFreq << 27) | (expiringSoonSlackThreshold << 21) | (priorityInversionIsoThreshold << 16) | (EmcReqB2bXfer << 15) | (priorityInversionThreshold << 8) | (bc2aaHoldoffThreshold << 0);
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table->burst_mc_regs.mc_emem_arb_misc0 = mc_emem_arb_misc0;
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table->la_scale_regs.mc_mll_mpcorer_ptsa_rate = 0x115;
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@@ -934,14 +943,11 @@ namespace ams::ldr::hoc::pcv::mariko {
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} __attribute__((packed)) cmd;
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I2cSession _session;
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Result res = i2cOpenSession(&_session, dev);
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if (R_FAILED(res)) {
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return res;
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}
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R_TRY(i2cOpenSession(&_session, dev));
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cmd.reg = reg;
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cmd.val = val;
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res = i2csessionSendAuto(&_session, &cmd, sizeof(cmd), I2cTransactionOption_All);
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cmd.reg = reg;
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cmd.val = val;
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Result res = i2csessionSendAuto(&_session, &cmd, sizeof(cmd), I2cTransactionOption_All);
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i2csessionClose(&_session);
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return res;
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}
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@@ -978,10 +984,6 @@ namespace ams::ldr::hoc::pcv::mariko {
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Result resultI2C = I2cSet_U8(I2cDevice_Max77812_2, 0x25, (emc_uv - uv_min) / uv_step);
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i2cExit();
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if (R_SUCCEEDED(resultI2C)) {
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R_SUCCEED();
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}
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return resultI2C;
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}
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