remove t2 cap, add minor timing tweaks

This commit is contained in:
Lightos1
2026-07-15 19:12:12 +02:00
parent 0de76f1616
commit b2d2025688
10 changed files with 31 additions and 75 deletions

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@@ -59,10 +59,6 @@ volatile CustomizeTable C = {
.t7_tWTR = 0,
.t8_tREFI = 0,
/* At 1333WL, for some reason (incorrect ram timing config in mtc table?), tRP causes crashes at high reductions - 2 seems to be the most common limit. */
/* This is a lazy workaround until I find the issue... */
.t2_tRP_cap = 1,
/* Frequency where non low timings gets used. */
.timingEmcTbreak = DISABLED,
.low_t1_tRCD = 0,

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@@ -86,8 +86,6 @@ struct CustomizeTable {
u32 t7_tWTR;
u32 t8_tREFI;
u32 t2_tRP_cap;
u32 timingEmcTbreak;
u32 low_t1_tRCD;
u32 low_t2_tRP;

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@@ -135,14 +135,9 @@ namespace ams::ldr::hoc::pcv::mariko {
/* At 1333WL, for some reason (incorrect ram timing config in mtc table?), tRP causes crashes at high reductions - 2 seems to be the most common limit. */
/* This is a lazy workaround until I find the issue... */
const bool lowFreq = freq < C.timingEmcTbreak;
volatile u32 tRPpbIndex = lowFreq ? C.low_t2_tRP : C.t2_tRP;
if (WL == WL_1331) {
tRPpbIndex = MIN(C.t2_tRP_cap, tRPpbIndex);
}
tRCD = tRCD_values[lowFreq ? C.low_t1_tRCD : C.t1_tRCD];
tRPpb = tRP_values[tRPpbIndex];
tRPpb = tRP_values[lowFreq ? C.low_t2_tRP : C.t2_tRP];
tRAS = tRAS_values[lowFreq ? C.low_t3_tRAS : C.t3_tRAS];
tRRD = tRRD_values[lowFreq ? C.low_t4_tRRD : C.t4_tRRD];
tRFCpb = tRFC_values[lowFreq ? C.low_t5_tRFC : C.t5_tRFC];

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@@ -324,13 +324,13 @@ namespace ams::ldr::hoc::pcv::erista {
constexpr u32 AtomsPerDvfsPulse = 0x7;
constexpr u32 McEmcSameFreq = 0x0;
constexpr u32 ExpiringSoonSlackThreshold = 0xC; /* 0xC? */
const u32 PriorityInversionIsoThreshold = GET_CYCLE_CEIL(7.5);
constexpr u32 ExpiringSoonSlackThreshold = 0xC;
const u32 priorityInversionIsoThreshold = GET_CYCLE_CEIL(7.5);
constexpr u32 EmcReqB2bXfer = 0x0;
const u32 PriorityInversionThreshold = GET_CYCLE_CEIL(22.5);
const u32 Bc2aaHoldoffThreshold = table->burst_mc_regs.mc_emem_arb_timing_rc + 1;
const u32 priorityInversionThreshold = GET_CYCLE_CEIL(22.5);
const u32 bc2aaHoldoffThreshold = table->burst_mc_regs.mc_emem_arb_timing_rc + 1;
const u32 mc_emem_arb_misc0 = (AtomsPerDvfsPulse << 28) | (McEmcSameFreq << 27) | (ExpiringSoonSlackThreshold << 21) | (PriorityInversionIsoThreshold << 16) | (EmcReqB2bXfer << 15) | (PriorityInversionThreshold << 8) | (Bc2aaHoldoffThreshold << 0);
const u32 mc_emem_arb_misc0 = (AtomsPerDvfsPulse << 28) | (McEmcSameFreq << 27) | (ExpiringSoonSlackThreshold << 21) | (priorityInversionIsoThreshold << 16) | (EmcReqB2bXfer << 15) | (priorityInversionThreshold << 8) | (bc2aaHoldoffThreshold << 0);
table->burst_mc_regs.mc_emem_arb_misc0 = mc_emem_arb_misc0;
u32 mpcorer_ptsa_rate = MIN(static_cast<u32>(227), (table->rate_khz / 1600000) * 208);

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@@ -35,7 +35,7 @@ namespace ams::ldr::hoc::pcv::mariko {
}
}
/* Default value is 800mV. */
/* Default value is 1050mV. */
if (C.marikoGpuVmax) {
PATCH_OFFSET(ptr + 1, C.marikoGpuVmax);
}
@@ -488,17 +488,26 @@ namespace ams::ldr::hoc::pcv::mariko {
da_covers |= (w_cover << 16);
table->burst_mc_regs.mc_emem_arb_da_covers = da_covers;
constexpr u32 AtomsPerDvfsPulse = 0x7;
constexpr u32 McEmcSameFreq = 0x0;
/* On certain frequencies (2966, 3100, 3133 and 3200 MHz), ExpiringSoonSlackThreshold has a value of 0x12. */
/* But 0x13 is good enough for now. */
constexpr u32 ExpiringSoonSlackThreshold = 0x13;
const u32 PriorityInversionIsoThreshold = GET_CYCLE_CEIL(7.5);
constexpr u32 EmcReqB2bXfer = 0x0;
const u32 PriorityInversionThreshold = GET_CYCLE_CEIL(22.5);
const u32 Bc2aaHoldoffThreshold = table->burst_mc_regs.mc_emem_arb_timing_rc + 1;
constexpr u32 AtomsPerDvfsPulse = 0x7;
constexpr u32 McEmcSameFreq = 0x0;
const u32 expiringSoonSlackThreshold = [&] {
switch (table->rate_khz) {
case 2966000:
case 3100000:
case 3133000:
case 3200000:
return 0x12u;
default:
return 0x13u;
}
}();
const u32 mc_emem_arb_misc0 = (AtomsPerDvfsPulse << 28) | (McEmcSameFreq << 27) | (ExpiringSoonSlackThreshold << 21) | (PriorityInversionIsoThreshold << 16) | (EmcReqB2bXfer << 15) | (PriorityInversionThreshold << 8) | (Bc2aaHoldoffThreshold << 0);
const u32 priorityInversionIsoThreshold = GET_CYCLE_CEIL(7.5);
constexpr u32 EmcReqB2bXfer = 0x0;
const u32 priorityInversionThreshold = GET_CYCLE_CEIL(22.5);
const u32 bc2aaHoldoffThreshold = table->burst_mc_regs.mc_emem_arb_timing_rc + 1;
const u32 mc_emem_arb_misc0 = (AtomsPerDvfsPulse << 28) | (McEmcSameFreq << 27) | (expiringSoonSlackThreshold << 21) | (priorityInversionIsoThreshold << 16) | (EmcReqB2bXfer << 15) | (priorityInversionThreshold << 8) | (bc2aaHoldoffThreshold << 0);
table->burst_mc_regs.mc_emem_arb_misc0 = mc_emem_arb_misc0;
table->la_scale_regs.mc_mll_mpcorer_ptsa_rate = 0x115;
@@ -934,14 +943,11 @@ namespace ams::ldr::hoc::pcv::mariko {
} __attribute__((packed)) cmd;
I2cSession _session;
Result res = i2cOpenSession(&_session, dev);
if (R_FAILED(res)) {
return res;
}
R_TRY(i2cOpenSession(&_session, dev));
cmd.reg = reg;
cmd.val = val;
res = i2csessionSendAuto(&_session, &cmd, sizeof(cmd), I2cTransactionOption_All);
cmd.reg = reg;
cmd.val = val;
Result res = i2csessionSendAuto(&_session, &cmd, sizeof(cmd), I2cTransactionOption_All);
i2csessionClose(&_session);
return res;
}
@@ -978,10 +984,6 @@ namespace ams::ldr::hoc::pcv::mariko {
Result resultI2C = I2cSet_U8(I2cDevice_Max77812_2, 0x25, (emc_uv - uv_min) / uv_step);
i2cExit();
if (R_SUCCEEDED(resultI2C)) {
R_SUCCEED();
}
return resultI2C;
}