more accurate mariko timings
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79c6b81da2
commit
349a9200c5
4 files changed
+29
-17
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@@ -30,6 +30,8 @@ namespace ams::ldr::hoc {
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#define PACK_U32(high, low) ((static_cast<u32>(high) << 16) | (static_cast<u32>(low) & 0xFFFF))
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#define PACK_U32_NIBBLE_HIGH_BYTE_LOW(high, low) ((static_cast<u32>(high & 0xF) << 28) | (static_cast<u32>(low) & 0xFF))
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#define GET_CYCLE_CEIL(PARAM) u32(CEIL(double(PARAM) / tCK_avg))
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/* Burst latency, not to be confused with base latency (tWRL). */
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const u32 BL = 16;
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@@ -48,8 +48,6 @@ namespace ams::ldr::hoc::pcv::erista {
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TABLE->shadow_regs_ca_train.PARAM = VALUE; \
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TABLE->shadow_regs_rdwr_train.PARAM = VALUE;
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#define GET_CYCLE_CEIL(PARAM) u32(CEIL(double(PARAM) / tCK_avg))
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/* Ram power down */
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/* B31: DRAM_CLKSTOP_PD */
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/* B30: DRAM_CLKSTOP_SR */
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+27
-13
@@ -149,7 +149,7 @@ namespace ams::ldr::hoc::pcv::mariko {
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u32 tREFI = lowFreq ? C.low_t8_tREFI : C.t8_tREFI;
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refresh_raw = 0xFFFF;
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if (tREFI != 6) {
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refresh_raw = CEIL(tREFpb_values[tREFI] / tCK_avg) - 0x40;
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refresh_raw = GET_CYCLE_CEIL(tREFpb_values[tREFI]) - 0x40;
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refresh_raw = MIN(refresh_raw, static_cast<u32>(0xFFFF));
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}
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@@ -164,9 +164,9 @@ namespace ams::ldr::hoc::pcv::mariko {
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tRTM = FLOOR((10.0 + RL) + (3.502 / tCK_avg)) + FLOOR(7.489 / tCK_avg);
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tRATM = CEIL((tRTM - 10.0) + (RL * 0.426));
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u32 fullRoundDelay = CEIL((flyByTime + tDQSCK_max) / tCK_avg);
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double fullRoundDelay = flyByTime + tDQSCK_max;
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/* Read data valid: Read command -> data ready to be latched into the registers. */
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rdv = RL + fullRoundDelay + 16;
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rdv = RL + GET_CYCLE_CEIL(fullRoundDelay) + 16;
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/* Read command -> data poppable at the pad macros, 14 cycles ahead of rdv. */
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qpop = rdv - 14;
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@@ -174,21 +174,35 @@ namespace ams::ldr::hoc::pcv::mariko {
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constexpr double TrimmerStepPs = 3.0;
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constexpr double MaxTrimmerSteps = 96.0;
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double tCkAvgPs = tCK_avg * 1000.0;
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double tckDerated = tCkAvgPs * 0.85;
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u32 derateStepCount = MIN(FLOOR(tckDerated / TrimmerStepPs), MaxTrimmerSteps);
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double deratedNsDelay = (derateStepCount * TrimmerStepPs) / 1000.0;
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u32 fullTripDerating = fullRoundDelay - CEIL((flyByTime + tDQSCK_max - deratedNsDelay) / tCK_avg);
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u32 readEyeStart = FLOOR((flyByTime + 0.94) / tCK_avg) + RL;
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double tCkAvgPs = tCK_avg * 1000.0;
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double tckDerated = tCkAvgPs * 0.85;
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u32 derateStepCount = MIN(FLOOR(tckDerated / TrimmerStepPs), MaxTrimmerSteps);
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double deratedNsDelay = (derateStepCount * TrimmerStepPs) / 1000.0;
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/* readEyeEndDerated, nv call this quseExtra. */
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u32 quseExtra = GET_CYCLE_CEIL(fullRoundDelay - deratedNsDelay);
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/* The amount of deration from the perspective of a full round trip. */
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u32 readEyeEndDerateMargin = GET_CYCLE_CEIL(fullRoundDelay) - quseExtra;
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u32 tQuse = FLOOR((flyByTime + 0.94) / tCK_avg);
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u32 readEyeStart = tQuse + RL + 1;
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u32 einputMinimal = readEyeStart + readEyeEndDerateMargin - 2;
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/* Data valid window, quse aligns with the start of the read eye (probably). */
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/* DQS needs to be logically and'ed with quse in order to be valid. */
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quse = readEyeStart + fullTripDerating - 2;
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/* einputMinimal satisfies this. */
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quse = einputMinimal;
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/* input takes time to enable. */
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u32 einputLatency = GET_CYCLE_CEIL(10.0);
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/* Enable input receiver. */
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einput = einputMinimal - einputLatency;
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/* Difference between the two eye edges. */
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quse_width = quseExtra - tQuse + 4;
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quse_width = CEIL(((4.897 / tCK_avg) - FLOOR(2.538 / tCK_avg)) + 3.782);
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quse = FLOOR(RL + ((5.082 / tCK_avg) + FLOOR(2.560 / tCK_avg))) - CEIL(4.820 / tCK_avg);
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einput_duration = FLOOR(9.936 / tCK_avg) + 5.0 + quse_width;
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einput = quse - CEIL(9.928 / tCK_avg);
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u32 qrst_duration = FLOOR(8.399 - tCK_avg);
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u32 qrstLow = MAX(static_cast<s32>(einput - qrst_duration - 2), static_cast<s32>(0));
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qrst = PACK_U32(qrst_duration, qrstLow);
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@@ -47,8 +47,6 @@ namespace ams::ldr::hoc::pcv::mariko {
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const double tCK_avg = 1000'000.0 / table->rate_khz;
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#define GET_CYCLE_CEIL(PARAM) u32(CEIL(double(PARAM) / tCK_avg))
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/* Ram power down */
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/* B31: DRAM_CLKSTOP_PD */
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/* B30: DRAM_CLKSTOP_SR */
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