Commit Graph
2 Commits
Author SHA1 Message Date
Tomasz Moń 7b9dcd2f1a Make sdmmc autocalibration follow TRM procedure
Sleep for 1 us, not 1 ms.
Timeout after 10 ms, set driver strength code values according to TRM.

Fix typo (mS) - time is in milliseconds, not milliSiemens.
2018-06-05 19:07:14 +02:00
Tomasz Moń 0534e36cf8 Set SDMMC controller to SDR104 as a workaround
According to Tegra X1 Series Processors Silicon Errata there is possible
misalignment of received data which results in a CRC error. The issue is
present only in SDR50 mode.
2018-05-27 17:43:25 +02:00