Sleep for 1 us, not 1 ms.
Timeout after 10 ms, set driver strength code values according to TRM.
Fix typo (mS) - time is in milliseconds, not milliSiemens.
According to Tegra X1 Series Processors Silicon Errata there is possible
misalignment of received data which results in a CRC error. The issue is
present only in SDR50 mode.