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General bugfixes + hardcoded name replacement

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This commit is contained in:
Kostas Missos
2018-09-18 23:38:54 +03:00
parent 59e711c91d
commit fdd94ffd2b
21 changed files with 200 additions and 107 deletions
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38
bootloader/soc/i2c.c
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@@ -26,11 +26,11 @@ static u32 i2c_addrs[] = {
static void _i2c_wait(vu32 *base)
{
base[0x23] = 0x25;
base[I2C_CONFIG_LOAD] = 0x25;
for (u32 i = 0; i < 20; i++)
{
usleep(1);
if (!(base[0x23] & 1))
if (!(base[I2C_CONFIG_LOAD] & 1))
break;
}
}
@@ -44,16 +44,16 @@ static int _i2c_send_pkt(u32 idx, u32 x, u8 *buf, u32 size)
memcpy(&tmp, buf, size);
vu32 *base = (vu32 *)i2c_addrs[idx];
base[1] = x << 1; //Set x (send mode).
base[3] = tmp; //Set value.
base[0] = (2 * size - 2) | 0x2800; //Set size and send mode.
base[I2C_CMD_ADDR0] = x << 1; //Set x (send mode).
base[I2C_CMD_DATA1] = tmp; //Set value.
base[I2C_CNFG] = (2 * size - 2) | 0x2800; //Set size and send mode.
_i2c_wait(base); //Kick transaction.
base[0] = (base[0] & 0xFFFFFDFF) | 0x200;
while (base[7] & 0x100)
base[I2C_CNFG] = (base[I2C_CNFG] & 0xFFFFFDFF) | 0x200;
while (base[I2C_STATUS] & 0x100)
;
if (base[7] << 28)
if (base[I2C_STATUS] << 28)
return 0;
return 1;
@@ -65,18 +65,18 @@ static int _i2c_recv_pkt(u32 idx, u8 *buf, u32 size, u32 x)
return 0;
vu32 *base = (vu32 *)i2c_addrs[idx];
base[1] = (x << 1) | 1; // Set x (recv mode).
base[0] = (2 * size - 2) | 0x2840; // Set size and recv mode.
base[I2C_CMD_ADDR0] = (x << 1) | 1; // Set x (recv mode).
base[I2C_CNFG] = (size - 1) << 1 | 0x2840; // Set size and recv mode.
_i2c_wait(base); // Kick transaction.
base[0] = (base[0] & 0xFFFFFDFF) | 0x200;
while (base[7] & 0x100)
base[I2C_CNFG] = (base[I2C_CNFG] & 0xFFFFFDFF) | 0x200;
while (base[I2C_STATUS] & 0x100)
;
if (base[7] << 28)
if (base[I2C_STATUS] << 28)
return 0;
u32 tmp = base[3]; // Get value.
u32 tmp = base[I2C_CMD_DATA1]; // Get LS value.
memcpy(buf, &tmp, size);
return 1;
@@ -86,19 +86,19 @@ void i2c_init(u32 idx)
{
vu32 *base = (vu32 *)i2c_addrs[idx];
base[0x1B] = 0x50001;
base[0x21] = 0x90003;
base[I2C_CLK_DIVISOR_REGISTER] = 0x50001;
base[I2C_BUS_CLEAR_CONFIG] = 0x90003;
_i2c_wait(base);
for (u32 i = 0; i < 10; i++)
{
usleep(20000);
if (base[0x1A] & 0x800)
if (base[INTERRUPT_STATUS_REGISTER] & 0x800)
break;
}
(vu32)base[0x22];
base[0x1A] = base[0x1A];
(vu32)base[I2C_BUS_CLEAR_STATUS];
base[INTERRUPT_STATUS_REGISTER] = base[INTERRUPT_STATUS_REGISTER];
}
int i2c_send_buf_small(u32 idx, u32 x, u32 y, u8 *buf, u32 size)