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Update libminerva to v1.1

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This commit is contained in:
Kostas Missos
2018-11-10 13:30:17 +02:00
parent 683ca6af1d
commit cfef8b4f72
6 changed files with 1439 additions and 762 deletions
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25
bootloader/main.c
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@@ -3099,9 +3099,8 @@ void bootrom_ipatches_info()
}
/*
//TODO: Don't depend on module folder.
#include "../modules/hekate_libsys_minerva/mtc.h"
#include "../modules/hekate_libsys_minerva/mtc_table.h"
//#include "../modules/hekate_libsys_minerva/mtc.h"
//mtc_config_t mtc_cfg;
void minerva()
{
@@ -3109,7 +3108,6 @@ void minerva()
gfx_con_setpos(&gfx_con, 0, 0);
u32 curr_ram_idx = 0;
mtc_config_t mtc_cfg;
if (!sd_mount())
return;
@@ -3135,18 +3133,19 @@ void minerva()
mtc_cfg.train_mode = OP_TRAIN_SWITCH;
gfx_printf(&gfx_con, "Training and switching %7d -> %7d\n\n", mtc_cfg.mtc_table[curr_ram_idx].rate_khz, 800000);
ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)&mtc_cfg);
mtc_cfg.rate_to = 1600000;
gfx_printf(&gfx_con, "Training and switching %7d -> %7d\n\n", mtc_cfg.current_emc_table->rate_khz, 1600000);
ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)&mtc_cfg);
msleep(100);
mtc_cfg.train_mode = OP_PERIODIC_TRAIN;
ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)&mtc_cfg);
gfx_printf(&gfx_con, "Finished!");
// Thefollowing frequency needs periodic training every 100ms.
//msleep(200);
//mtc_cfg.rate_to = 1600000;
//gfx_printf(&gfx_con, "Training and switching %7d -> %7d\n\n", mtc_cfg.current_emc_table->rate_khz, 1600000);
//ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)&mtc_cfg);
//mtc_cfg.train_mode = OP_PERIODIC_TRAIN;
sd_unmount();
gfx_printf(&gfx_con, "Finished!");
btn_wait();
}