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bdk: mem: improve emc MRR reading

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This commit is contained in:
CTCaer
2022-10-11 03:51:12 +03:00
parent ff5ee9758d
commit c52c11e7bc
3 changed files with 39 additions and 22 deletions
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27
bdk/mem/sdram.c
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@@ -121,6 +121,14 @@ static void _sdram_req_mrr_data(u32 data, bool dual_channel)
emc_mr_data_t sdram_read_mrx(emc_mr_t mrx)
{
emc_mr_data_t data;
u32 dual_channel = (EMC(EMC_FBIO_CFG7) >> 2) & 1;
// Clear left overs.
for (u32 i = 0; i < 32; i++)
{
(void)EMC(EMC_MRR);
usleep(1);
}
/*
* When a dram chip has only one rank, then the info from the 2 ranks differs.
@@ -128,14 +136,23 @@ emc_mr_data_t sdram_read_mrx(emc_mr_t mrx)
*/
// Get Device 0 (Rank 0) info from both dram chips (channels).
_sdram_req_mrr_data(BIT(31) | (mrx << 16), EMC_CHAN0);
_sdram_req_mrr_data((2u << 30) | (mrx << 16), dual_channel);
data.rank0_ch0 = EMC(EMC_MRR) & 0xFF;
data.rank0_ch1 = (EMC(EMC_MRR) & 0xFF00 >> 8);
// Get Device 1 (Rank 1) info from both dram chips (channels).
_sdram_req_mrr_data(BIT(30) | (mrx << 16), EMC_CHAN1);
data.rank1_ch0 = EMC(EMC_MRR) & 0xFF;
data.rank1_ch1 = (EMC(EMC_MRR) & 0xFF00 >> 8);
// If Rank 1 exists, get info.
if (EMC(EMC_ADR_CFG) & 1)
{
// Get Device 1 (Rank 1) info from both dram chips (channels).
_sdram_req_mrr_data((1u << 30) | (mrx << 16), dual_channel);
data.rank1_ch0 = EMC(EMC_MRR) & 0xFF;
data.rank1_ch1 = (EMC(EMC_MRR) & 0xFF00 >> 8);
}
else
{
data.rank1_ch0 = 0xFF;
data.rank1_ch1 = 0xFF;
}
return data;
}