bdk: smmu: refactor driver and allow other asid
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@@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
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* Copyright (c) 2014, NVIDIA Corporation.
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* Copyright (c) 2018-2023, CTCaer
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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@@ -14,6 +15,22 @@
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#ifndef _MC_T210_H_
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#define _MC_T210_H_
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/*! MC SMMU registers */
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#define MC_SMMU_CONFIG 0x10
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#define MC_SMMU_TLB_CONFIG 0x14
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#define MC_SMMU_PTC_CONFIG 0x18
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#define MC_SMMU_PTB_ASID 0x1c
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#define MC_SMMU_PTB_DATA 0x20
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#define MC_SMMU_TLB_FLUSH 0x30
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#define MC_SMMU_PTC_FLUSH 0x34
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#define MC_SMMU_ASID_SECURITY 0x38
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#define MC_SMMU_TRANSLATION_ENABLE_0 0x228
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#define MC_SMMU_TRANSLATION_ENABLE_1 0x22c
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#define MC_SMMU_TRANSLATION_ENABLE_2 0x230
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#define MC_SMMU_TRANSLATION_ENABLE_3 0x234
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#define MC_SMMU_TRANSLATION_ENABLE_4 0xb98
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/*! MC General registers */
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#define MC_INTSTATUS 0x0
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#define MC_INTMASK 0x4
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#define MC_ERR_STATUS 0x8
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@@ -464,7 +481,7 @@
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#define MC_UNTRANSLATED_REGION_CHECK 0x948
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#define MC_DA_CONFIG0 0x9dc
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/* MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS0 */
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/*! MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS0 */
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#define SEC_CARVEOUT_CA0_R_PTCR BIT(0)
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#define SEC_CARVEOUT_CA0_R_DISPLAY0A BIT(1)
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#define SEC_CARVEOUT_CA0_R_DISPLAY0AB BIT(2)
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@@ -484,7 +501,7 @@
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#define SEC_CARVEOUT_CA0_R_PPCSAHBSLV BIT(30)
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#define SEC_CARVEOUT_CA0_R_SATAR BIT(31)
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/* MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS1 */
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/*! MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS1 */
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#define SEC_CARVEOUT_CA1_R_VDEBSEV BIT(2)
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#define SEC_CARVEOUT_CA1_R_VDEMBE BIT(3)
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#define SEC_CARVEOUT_CA1_R_VDEMCE BIT(4)
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@@ -504,7 +521,7 @@
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#define SEC_CARVEOUT_CA1_W_VDEBSEV BIT(30)
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#define SEC_CARVEOUT_CA1_W_VDEDBG BIT(31)
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/* MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS2 */
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/*! MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS2 */
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#define SEC_CARVEOUT_CA2_W_VDEMBE BIT(0)
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#define SEC_CARVEOUT_CA2_W_VDETPM BIT(1)
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#define SEC_CARVEOUT_CA2_R_ISPRA BIT(4)
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@@ -524,7 +541,7 @@
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#define SEC_CARVEOUT_CA2_W_GPU BIT(25)
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#define SEC_CARVEOUT_CA2_R_DISPLAYT BIT(26)
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/* MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS3 */
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/*! MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS3 */
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#define SEC_CARVEOUT_CA3_R_SDMMCA BIT(0)
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#define SEC_CARVEOUT_CA3_R_SDMMCAA BIT(1)
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#define SEC_CARVEOUT_CA3_R_SDMMC BIT(2)
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@@ -544,7 +561,7 @@
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#define SEC_CARVEOUT_CA3_R_NVJPG BIT(30)
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#define SEC_CARVEOUT_CA3_W_NVJPG BIT(31)
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/* MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS4 */
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/*! MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS4 */
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#define SEC_CARVEOUT_CA4_R_SE BIT(0)
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#define SEC_CARVEOUT_CA4_W_SE BIT(1)
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#define SEC_CARVEOUT_CA4_R_AXIAP BIT(2)
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