Add missing guard from some macros
Guard them for future usage, as none of these macros had a non-preset variable used with them yet.
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@@ -31,7 +31,7 @@
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#define CFG_FORCE_WRITE_THROUGH (1 << 3)
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#define CFG_NEVER_ALLOCATE (1 << 6)
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#define CFG_ENABLE_INTERRUPT (1 << 7)
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#define CFG_MMU_TAG_MODE(x) (x << 8)
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#define CFG_MMU_TAG_MODE(x) ((x) << 8)
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#define TAG_MODE_PARALLEL 0
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#define TAG_MODE_TAG_FIRST 1
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#define TAG_MODE_MMU_FIRST 2
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@@ -45,7 +45,7 @@
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#define CFG_OBS_BUS_EN (1 << 31)
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#define BPMP_CACHE_LOCK 0x4
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#define LOCK_LINE(x) (1 << x)
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#define LOCK_LINE(x) (1 << (x))
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#define BPMP_CACHE_SIZE 0xC
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#define BPMP_CACHE_LFSR 0x10
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@@ -18,23 +18,23 @@
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#include <soc/gpio.h>
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#include <soc/t210.h>
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#define GPIO_BANK_IDX(port) (port >> 2)
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#define GPIO_BANK_IDX(port) ((port) >> 2)
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#define GPIO_CNF_OFFSET(port) (0x00 + ((port >> 2) << 8) + ((port % 4) << 2))
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#define GPIO_OE_OFFSET(port) (0x10 + ((port >> 2) << 8) + ((port % 4) << 2))
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#define GPIO_OUT_OFFSET(port) (0x20 + ((port >> 2) << 8) + ((port % 4) << 2))
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#define GPIO_IN_OFFSET(port) (0x30 + ((port >> 2) << 8) + ((port % 4) << 2))
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#define GPIO_INT_STA_OFFSET(port) (0x40 + ((port >> 2) << 8) + ((port % 4) << 2))
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#define GPIO_INT_ENB_OFFSET(port) (0x50 + ((port >> 2) << 8) + ((port % 4) << 2))
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#define GPIO_INT_LVL_OFFSET(port) (0x60 + ((port >> 2) << 8) + ((port % 4) << 2))
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#define GPIO_INT_CLR_OFFSET(port) (0x70 + ((port >> 2) << 8) + ((port % 4) << 2))
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#define GPIO_CNF_OFFSET(port) (0x00 + (((port) >> 2) << 8) + (((port) % 4) << 2))
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#define GPIO_OE_OFFSET(port) (0x10 + (((port) >> 2) << 8) + (((port) % 4) << 2))
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#define GPIO_OUT_OFFSET(port) (0x20 + (((port) >> 2) << 8) + (((port) % 4) << 2))
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#define GPIO_IN_OFFSET(port) (0x30 + (((port) >> 2) << 8) + (((port) % 4) << 2))
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#define GPIO_INT_STA_OFFSET(port) (0x40 + (((port) >> 2) << 8) + (((port) % 4) << 2))
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#define GPIO_INT_ENB_OFFSET(port) (0x50 + (((port) >> 2) << 8) + (((port) % 4) << 2))
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#define GPIO_INT_LVL_OFFSET(port) (0x60 + (((port) >> 2) << 8) + (((port) % 4) << 2))
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#define GPIO_INT_CLR_OFFSET(port) (0x70 + (((port) >> 2) << 8) + (((port) % 4) << 2))
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#define GPIO_CNF_MASKED_OFFSET(port) (0x80 + ((port >> 2) << 8) + ((port % 4) << 2))
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#define GPIO_OE_MASKED_OFFSET(port) (0x90 + ((port >> 2) << 8) + ((port % 4) << 2))
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#define GPIO_OUT_MASKED_OFFSET(port) (0xA0 + ((port >> 2) << 8) + ((port % 4) << 2))
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#define GPIO_INT_STA_MASKED_OFFSET(port) (0xC0 + ((port >> 2) << 8) + ((port % 4) << 2))
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#define GPIO_INT_ENB_MASKED_OFFSET(port) (0xD0 + ((port >> 2) << 8) + ((port % 4) << 2))
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#define GPIO_INT_LVL_MASKED_OFFSET(port) (0xE0 + ((port >> 2) << 8) + ((port % 4) << 2))
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#define GPIO_CNF_MASKED_OFFSET(port) (0x80 + (((port) >> 2) << 8) + (((port) % 4) << 2))
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#define GPIO_OE_MASKED_OFFSET(port) (0x90 + (((port) >> 2) << 8) + (((port) % 4) << 2))
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#define GPIO_OUT_MASKED_OFFSET(port) (0xA0 + (((port) >> 2) << 8) + (((port) % 4) << 2))
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#define GPIO_INT_STA_MASKED_OFFSET(port) (0xC0 + (((port) >> 2) << 8) + (((port) % 4) << 2))
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#define GPIO_INT_ENB_MASKED_OFFSET(port) (0xD0 + (((port) >> 2) << 8) + (((port) % 4) << 2))
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#define GPIO_INT_LVL_MASKED_OFFSET(port) (0xE0 + (((port) >> 2) << 8) + (((port) % 4) << 2))
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#define GPIO_IRQ_BANK1 32
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#define GPIO_IRQ_BANK2 33
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@@ -79,7 +79,7 @@
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#define VIC(off) _REG(VIC_BASE, off)
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#define TSEC(off) _REG(TSEC_BASE, off)
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#define SOR1(off) _REG(SOR1_BASE, off)
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#define ICTLR(cidx, off) _REG(ICTLR_BASE + (0x100 * cidx), off)
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#define ICTLR(cidx, off) _REG(ICTLR_BASE + (0x100 * (cidx)), off)
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#define TMR(off) _REG(TMR_BASE, off)
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#define CLOCK(off) _REG(CLOCK_BASE, off)
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#define FLOW_CTLR(off) _REG(FLOW_CTLR_BASE, off)
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