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Implement ms timer and fix all timers

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This will fix everything that uses a timer (or sleep).

Without this any function like eMMC/SD read/write/verify, TSEC/SE, etc can break when the time reaches the max value of the u32 microsecond timer (71minutes).

This fixes every possible breakage, including backup and restore (read/write/verify errors) that takes a lot of time.

The new max before a timer reset is now 48 days (the old one was 71 minutes)
This commit is contained in:
Kostas Missos
2018-07-04 18:39:26 +03:00
parent ebb9ca5bf5
commit 5e8eb1c57a
17 changed files with 146 additions and 129 deletions
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6
ipl/cluster.c
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@@ -44,7 +44,7 @@ int _cluster_pmc_enable_partition(u32 part, u32 toggle)
u32 i = 5001;
while (PMC(APBDEV_PMC_PWRGATE_TOGGLE) & 0x100)
{
sleep(1);
usleep(1);
i--;
if (i < 1)
return 0;
@@ -57,7 +57,7 @@ int _cluster_pmc_enable_partition(u32 part, u32 toggle)
{
if (PMC(APBDEV_PMC_PWRGATE_STATUS) & part)
break;
sleep(1);
usleep(1);
i--;
}
@@ -74,7 +74,7 @@ void cluster_boot_cpu0(u32 entry)
if (!(CLOCK(CLK_RST_CONTROLLER_PLLX_BASE) & 0x40000000))
{
CLOCK(CLK_RST_CONTROLLER_PLLX_MISC_3) &= 0xFFFFFFF7;
sleep(2);
usleep(2);
CLOCK(CLK_RST_CONTROLLER_PLLX_BASE) = 0x80404E02;
CLOCK(CLK_RST_CONTROLLER_PLLX_BASE) = 0x404E02;
CLOCK(CLK_RST_CONTROLLER_PLLX_MISC) = (CLOCK(CLK_RST_CONTROLLER_PLLX_MISC) & 0xFFFBFFFF) | 0x40000;