sdmmc v2: Bus/IO clock refactoring and fixes
Use the exact same clocks with HOS and utilize low jitter clock parents. Add back our compatibility mode and the missing timeout clock parent. Hekate main will continue to use PLLP clock parent for all.
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@@ -193,8 +193,8 @@ void clock_enable_pwm();
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void clock_disable_pwm();
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void clock_enable_pllc(u32 divn);
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void clock_disable_pllc();
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void clock_sdmmc_config_clock_source(u32 *pout, u32 id, u32 val);
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void clock_sdmmc_get_card_clock_div(u32 *pout, u16 *pdivisor, u32 type);
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void clock_sdmmc_config_clock_source(u32 *pclock, u32 id, u32 val);
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void clock_sdmmc_get_card_clock_div(u32 *pclock, u16 *pdivisor, u32 type);
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int clock_sdmmc_is_not_reset_and_enabled(u32 id);
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void clock_sdmmc_enable(u32 id, u32 val);
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void clock_sdmmc_disable(u32 id);
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