bdk: sdmmc: rename ddr100 to the actual HS100 name

This commit is contained in:
CTCaer
2023-03-31 08:15:40 +03:00
parent 5e134ed54b
commit 502fc1ed50
4 changed files with 41 additions and 28 deletions

View File

@@ -261,7 +261,7 @@
#define SDHCI_TIMING_UHS_DDR50 12
// SDR104 with a 163.2MHz -> 81.6MHz clock.
#define SDHCI_TIMING_UHS_SDR82 13 // GC FPGA. Obsolete and Repurposed. MMC_HS50 -> SDR82.
#define SDHCI_TIMING_MMC_DDR100 14 // GC ASIC.
#define SDHCI_TIMING_MMC_HS100 14 // GC ASIC.
/*! SDMMC Low power features. */
#define SDMMC_POWER_SAVE_DISABLE 0