Name more hardcoded regs/vals
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@@ -20,32 +20,33 @@
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u32 get_tmr_s()
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{
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return RTC(0x8); //RTC_SECONDS
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return RTC(APBDEV_RTC_SECONDS);
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}
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u32 get_tmr_ms()
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{
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// The registers must be read with the following order:
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// -> RTC_MILLI_SECONDS (0x10) -> RTC_SHADOW_SECONDS (0xC)
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return (RTC(0x10) | (RTC(0xC)<< 10));
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return (RTC(APBDEV_RTC_MILLI_SECONDS) | (RTC(APBDEV_RTC_SHADOW_SECONDS)<< 10));
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}
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u32 get_tmr_us()
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{
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return TMR(0x10); //TIMERUS_CNTR_1US
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return TMR(TIMERUS_CNTR_1US); //TIMERUS_CNTR_1US
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}
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void msleep(u32 milliseconds)
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{
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u32 start = RTC(0x10) | (RTC(0xC)<< 10);
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while (((RTC(0x10) | (RTC(0xC)<< 10)) - start) <= milliseconds)
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u32 start = RTC(APBDEV_RTC_MILLI_SECONDS) | (RTC(APBDEV_RTC_SHADOW_SECONDS)<< 10);
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while (((RTC(APBDEV_RTC_MILLI_SECONDS) | (RTC(APBDEV_RTC_SHADOW_SECONDS)<< 10)) - start) <= milliseconds)
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;
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}
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void usleep(u32 microseconds)
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{
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u32 start = TMR(0x10);
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while ((TMR(0x10) - start) <= microseconds)
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u32 start = TMR(TIMERUS_CNTR_1US);
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// Casting to u32 is important!
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while ((u32)(TMR(TIMERUS_CNTR_1US) - start) <= microseconds)
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;
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}
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