bdk: t210: add more mmio addresses
And simplify relevant drivers that hardcoded them.
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@@ -18,6 +18,7 @@
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#include <string.h>
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#include <soc/i2c.h>
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#include <soc/t210.h>
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#include <soc/timer.h>
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#define I2C_PACKET_PROT_I2C BIT(4)
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@@ -81,14 +82,8 @@
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#define MSTR_CONFIG_LOAD BIT(0)
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#define TIMEOUT_CONFIG_LOAD BIT(2)
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static const u32 i2c_addrs[] = {
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0x7000C000, // I2C_1.
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0x7000C400, // I2C_2.
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0x7000C500, // I2C_3.
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0x7000C700, // I2C_4.
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0x7000D000, // I2C_5.
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0x7000D100 // I2C_6.
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};
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/* I2C_1, 2, 3, 4, 5 and 6. */
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static const u16 _i2c_base_offsets[6] = { 0x0, 0x400, 0x500, 0x700, 0x1000, 0x1100 };
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static void _i2c_load_cfg_wait(vu32 *base)
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{
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@@ -108,7 +103,7 @@ static int _i2c_send_single(u32 i2c_idx, u32 dev_addr, u8 *buf, u32 size)
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u32 tmp = 0;
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vu32 *base = (vu32 *)i2c_addrs[i2c_idx];
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vu32 *base = (vu32 *)(I2C_BASE + (u32)_i2c_base_offsets[i2c_idx]);
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// Set device address and send mode.
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base[I2C_CMD_ADDR0] = dev_addr << 1 | ADDR0_WRITE;
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@@ -154,7 +149,7 @@ static int _i2c_recv_single(u32 i2c_idx, u8 *buf, u32 size, u32 dev_addr)
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if (size > 8)
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return 0;
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vu32 *base = (vu32 *)i2c_addrs[i2c_idx];
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vu32 *base = (vu32 *)(I2C_BASE + (u32)_i2c_base_offsets[i2c_idx]);
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// Set device address and recv mode.
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base[I2C_CMD_ADDR0] = (dev_addr << 1) | ADDR0_READ;
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@@ -198,7 +193,7 @@ static int _i2c_send_pkt(u32 i2c_idx, u8 *buf, u32 size, u32 dev_addr)
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int res = 0;
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vu32 *base = (vu32 *)i2c_addrs[i2c_idx];
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vu32 *base = (vu32 *)(I2C_BASE + (u32)_i2c_base_offsets[i2c_idx]);
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// Enable interrupts.
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base[I2C_INT_EN] = ALL_PACKETS_COMPLETE | PACKET_COMPLETE | NO_ACK |
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@@ -270,7 +265,7 @@ static int _i2c_recv_pkt(u32 i2c_idx, u8 *buf, u32 size, u32 dev_addr, u32 reg)
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int res = 0;
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vu32 *base = (vu32 *)i2c_addrs[i2c_idx];
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vu32 *base = (vu32 *)(I2C_BASE + (u32)_i2c_base_offsets[i2c_idx]);
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// Enable interrupts.
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base[I2C_INT_EN] = ALL_PACKETS_COMPLETE | PACKET_COMPLETE | NO_ACK |
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@@ -352,7 +347,7 @@ static int _i2c_recv_pkt(u32 i2c_idx, u8 *buf, u32 size, u32 dev_addr, u32 reg)
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void i2c_init(u32 i2c_idx)
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{
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vu32 *base = (vu32 *)i2c_addrs[i2c_idx];
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vu32 *base = (vu32 *)(I2C_BASE + (u32)_i2c_base_offsets[i2c_idx]);
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base[I2C_CLK_DIVISOR] = (5 << 16) | 1; // SF mode Div: 6, HS mode div: 2.
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base[I2C_BUS_CLEAR_CONFIG] = (9 << 16) | BC_TERMINATE | BC_ENABLE;
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