bdk: update various comments
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@@ -47,6 +47,27 @@
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* ldo8 | XUSB, DP, MCU | 50000 | 800000 | 1050000 | 2800000 | 1.05V/2.8V (pcv)
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*/
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// GPIOs T210: 3: 3.3V, 5: CPU PMIC, 6: GPU PMIC, 7: DSI/VI 1.2V powered by ldo0.
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/*
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* OTP: T210 - T210B01:
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* SD0: 1.0V 1.05V - SoC. EN Based on FPSSRC.
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* SD1: 1.15V 1.1V - DRAM for T210. EN Based on FPSSRC.
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* SD2: 1.35V 1.35V
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* SD3: 1.8V 1.8V
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* All powered off?
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* LDO0: -- -- - Display
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* LDO1: 1.05V 1.05V
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* LDO2: -- -- - SD
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* LDO3: 3.1V 3.1V - GC ASIC
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* LDO4: 1.0V 0.8V - Needed for RTC domain on T210.
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* LDO5: 3.1V 3.1V
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* LDO6: 2.8V 2.9V - Touch.
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* LDO7: 1.05V 1.0V
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* LDO8: 1.05V 1.0V
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*/
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/*
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* MAX77620_AME_GPIO: control GPIO modes (bits 0 - 7 correspond to GPIO0 - GPIO7); 0 -> GPIO, 1 -> alt-mode
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* MAX77620_REG_GPIOx: 0x9 sets output and enable
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@@ -75,14 +75,14 @@
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#define MAX77812_REG_GLB_CFG3 0x35
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/*! Protected area and settings only for MAX77812_ES2_VERSION */
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#define MAX77812_REG_GLB_CFG4 0x36
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#define MAX77812_REG_GLB_CFG5 0x37 // HOS: 0x3E. Unmasked write.
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#define MAX77812_REG_GLB_CFG6 0x38 // HOS: 0x90. Unmasked write.
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#define MAX77812_REG_GLB_CFG7 0x39
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#define MAX77812_REG_GLB_CFG8 0x3A // HOS: 0x3A. Unmasked write.
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#define MAX77812_REG_GLB_CFG4 0x36 // QS: 0xBB.
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#define MAX77812_REG_GLB_CFG5 0x37 // QS: 0x39. ES2: Set to 0x3E.
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#define MAX77812_REG_GLB_CFG6 0x38 // QS: 0x88. ES2: Set to 0x90.
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#define MAX77812_REG_GLB_CFG7 0x39 // QS: 0x04.
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#define MAX77812_REG_GLB_CFG8 0x3A // QS: 0x3A. ES2: Set to 0x3A.
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#define MAX77812_REG_PROT_ACCESS 0xFD // 0x00: Lock, 0x5A: Unlock.
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#define MAX77812_REG_MAX 0xFD
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#define MAX77812_REG_UNKNOWN 0xFE
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#define MAX77812_REG_EN_CTRL_MASK(n) BIT(n)
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#define MAX77812_START_SLEW_RATE_MASK 0x07
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