clock: Add more defines and simplify some logic
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@@ -163,9 +163,15 @@
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#define CLK_NOT_USED 0x0
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/*! PLL control and status bits */
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#define PLLX_BASE_LOCK BIT(27)
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#define PLLX_BASE_REF_DIS BIT(29)
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#define PLLX_BASE_ENABLE BIT(30)
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#define PLLX_BASE_BYPASS BIT(31)
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#define PLLCX_BASE_LOCK BIT(27)
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#define PLLCX_BASE_REF_DIS BIT(29)
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#define PLLCX_BASE_ENABLE BIT(30)
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#define PLLCX_BASE_BYPASS BIT(31)
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#define PLLA_OUT0_RSTN_CLR BIT(0)
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#define PLLA_OUT0_CLKEN BIT(1)
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