CTCaer a8d529cf6a Refactoring and comment adding

2019-09-12 23:08:38 +03:00

..

emc.h

Refactor ALL the things + enable LTO

2018-08-13 11:58:24 +03:00

heap.c

mem: Remove memalign

2019-08-28 02:08:12 +03:00

heap.h

mem: Remove memalign

2019-08-28 02:08:12 +03:00

mc_t210.h

Refactor ALL the things + enable LTO

2018-08-13 11:58:24 +03:00

mc.c

Refactoring and comment adding

2019-09-12 23:08:38 +03:00

mc.h

Move display_end before secmon + add boolean supp.

2018-08-13 12:12:53 +03:00

minerva.c

Refactoring and comment adding

2019-09-12 23:08:38 +03:00

minerva.h

[MTC] Utilize Minerva Training Cell

2019-06-30 03:49:33 +03:00

mtc_table.h

[MTC] Utilize Minerva Training Cell

2019-06-30 03:49:33 +03:00

sdram_config_lz.inl

Proper warmboot exploit impl and documentation

2018-12-17 21:10:13 +02:00

sdram_config.inl

Proper warmboot exploit impl and documentation

2018-12-17 21:10:13 +02:00

sdram_lp0_param_t210.h

Refactor ALL the things + enable LTO

2018-08-13 11:58:24 +03:00

sdram_lp0.c

Normalize brom patches & add sd autocalib fallback

2019-02-12 00:40:40 +02:00

sdram_param_t210.h

Refactor ALL the things + enable LTO

2018-08-13 11:58:24 +03:00

sdram.c

Add more register names + refactoring

2019-09-09 16:56:37 +03:00

sdram.h

Proper warmboot exploit impl and documentation

2018-12-17 21:10:13 +02:00