Commit Graph

13 Commits

Author SHA1 Message Date
CTCaer
0b41f8129c modules: set page size to 256 bytes
Since this runs on BPMP a meaningful alignment is 32 bytes, so use a nicer 256.
Reduces size of libs of up to 64KB.

If libs are compiled for armv7/8, 4KB should be used if missing from compiler.
2026-01-29 09:02:56 +02:00
CTCaer
3af777f839 Bump hekate to v6.5.0 and Nyx to v1.9.0 2026-01-14 05:10:05 +02:00
CTCaer
1de3206e79 Restructure and refactor makefiles
- Allow rebuilds without rebuilding everything
 By detecting changes everywhere that matters (flags, objects and headers).
- Add progress bar
- Fully clean everything when clean goal is used
2025-12-31 14:19:56 +02:00
CTCaer
b6ec6a8f6e minerva: update tov1.6_T210/v0.1_T21X
T21X v0.1:
- Add IRB/no table support
T210 v1.6/Common:
- Add a proper table for 8GB T210 config instead of editing a 4GB one
- Increase timeout to 2ms
- Generally improve checks and guard against unknown SoCs/SKUs
- Remove the long ago obsolete OVERCLOCK_FREQ/OVERCLOCK_VOLTAGE ifdefs
2025-12-17 05:58:09 +02:00
CTCaer
242debfe3e modules: use echo -e for newline prints 2024-06-11 09:04:21 +03:00
CTCaer
9c1238f99d Update Warnings flags in makefiles 2022-10-11 07:25:21 +03:00
CTCaer
46fa330bdd Add proper make prints for modules 2020-07-18 01:36:16 +03:00
CTCaer
6e256d29c7 Utilize hekate's BDK for hekate main and Nyx 2020-06-14 16:45:45 +03:00
CTCaer
27926b0d55 Allow automatic inlining for modules 2020-06-13 18:40:09 +03:00
CTCaer
8ce6bf82a9 Minimize make info noise during building 2020-06-13 18:39:17 +03:00
CTCaer
a52af1bf41 Fix building on make 4.3 2020-03-04 01:34:35 +02:00
Kostas Missos
7c42f72b8a refactor: Remove all unwanted whitespace 2019-10-18 18:02:06 +03:00
Kostas Missos
cae9044c17 Minerva our DRAM trainer
Supports up to 1600MHz and periodic training.

For more check here: https://github.com/CTCaer/minerva_tc
2018-11-04 03:15:32 +02:00