OmniNX/hekate
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Commit Graph
84 Commits
Author SHA1 Message Date
CTCaer 279b67fa49 i2c: Update driver in hekate main also 2020-04-30 03:54:24 +03:00
CTCaer 63768ccc99 uart: Add rounded clocking for 1 mbaud 2020-04-30 03:34:05 +03:00
CTCaer a00f25d2f9 l4t: Clear payload mode from scratch0 reg 2020-04-30 03:31:42 +03:00
CTCaer 8c762c52e2 Various fixes and whitespace removal 2020-04-30 03:25:22 +03:00
CTCaer 51985ed2ca sdmmc v2: Bus/IO clock refactoring and fixes 
Use the exact same clocks with HOS and utilize low jitter clock parents.

Add back our compatibility mode and the missing timeout clock parent.

Hekate main will continue to use PLLP clock parent for all.
 2020-04-30 01:26:55 +03:00
CTCaer 034f680a8e sd fs: Move sd init/mount/helpers to their own object 2020-04-29 23:20:18 +03:00
CTCaer 5b0a0070c7 sdmmc v2: Refactor everything 2020-04-29 18:53:29 +03:00
CTCaer 9a5cfdff4c gpio: Upgrade GPIO driver 
Use macros to get bank addresses and add full configuration support.
 2020-04-27 09:51:25 +03:00
CTCaer cb3b1bf6e1 irq: Add Legacy Interrupt Controller driver 2020-04-27 09:49:00 +03:00
CTCaer b4d2df8111 Name various t210 registers 2020-04-27 09:47:47 +03:00
CTCaer 5f142b4c86 main: Add empty battery screen 
This disables low battery monitor shutdown (LBM shutdown) on boot and checks if battery is enough.

The logic is as follows:

If battery is not enough:
- If not charging and 15s pass, it will re enable LBM shutdown and power off.
- If charging, it will wait until it is charged above the limit.
 Screen will auto turn off to save power. A press on Power button or a change on charger, will enable it for another 15s.

If battery is enough:
- Enables LBM shutdown and continues with the boot process.
 2020-04-06 05:54:45 +03:00
CTCaer 3405910f4c hwinit: Disable SD Card power on boot 
Fixes issues with warmboot based reboots.
 2020-03-21 22:13:18 +02:00
CTCaer f5040f1e41 Update and add missing copyrights 
Probably more need to change.
 2020-03-14 09:24:24 +02:00
CTCaer 144d6fd3f6 i2c: Update drivers 
Adds support for 8 byte transfers needed by touch driver changes.
 2020-03-13 10:25:27 +02:00
CTCaer 03a8a11933 Small fixes and changes 
- Allow printing of more log on HOS boot when LOGS are OFF.
- A small name refactoring
- Add battery warning symbol when battery < 3200mV
 2020-03-03 04:11:13 +02:00
CTCaer 4c1f67d022 Fix build errors 2020-01-19 15:22:59 +02:00
CTCaer 4d53f21387 mtc: Clear init magic on chainload 
Fixes a hang caused when rebooting 2 payload from L4T with old hekate in vendor partition.

L4T does not overwrite the nyx storage where the Minerva configuration is stored.
This makes new Minerva parse the wrong tables from old hekate and eventually hang the RAM, which causes an exception on BPMP.
 2020-01-14 23:41:15 +02:00
CTCaer c99a87dd09 clock: Move PLLC config from bpmp.c to clock.c 2020-01-07 06:46:22 +02:00
CTCaer 009db77426 bpmp: Switch to PLLC for SCLK/BPMP clock source 2020-01-07 06:26:29 +02:00
CTCaer 2f43145131 uart: Add invert, get/set IIR and fifo empty functions 2019-12-16 22:16:40 +02:00
CTCaer e3fca2bce5 uart: Add timeout and len report to uart receive 2019-12-16 22:15:21 +02:00
CTCaer da112a0ae9 uart: Proper uart init 2019-12-16 22:12:09 +02:00
CTCaer 7604239237 bpmp: Update driver to latest 2019-12-14 22:21:42 +02:00
CTCaer f256bd5909 Move all I/DRAM addresses into a memory map 
Many addresses were moved around to pack the memory usage!
 2019-12-08 02:23:03 +02:00
Kostas Missos 0b45a5a11a bpmp: Reduce freq to 589MHz 
3 users had issues with 602MHz.
This will probably bring the SoC binning compatibility to 100%.

Additionally, make it easy to change default boost frequency.

The tiny loss in perf, will be mitigated in Nyx. (It's actually even faster)
 2019-12-07 02:01:29 +02:00
Kostas Missos bc7dec2e61 bpmp: Add forcable maintenance 
+ Fix build issues
 2019-12-07 01:47:44 +02:00
CTCaer 9811ba53e0 pmic: Enable Low Battery Shutdown for 2.8V 
There's an increasing ammount of users that kill their batteries when forgetting their devices into AutoRCM / RCM mode.

This will now force a shutdown the moment the battery reaches 2.8V. Even if device is inside RCM mode.

Notice: We might need to increase the limit.
 2019-12-04 22:06:34 +02:00
CTCaer dd8ec0d28b clock: Always wait 2us before deasserting reset 2019-12-04 21:32:51 +02:00
CTCaer 0b1eebefe1 Small refactor and bugfixes 2019-12-04 21:31:39 +02:00
CTCaer 65fbdfddbf kfuse: Ensure that kfuse is ready 100% for tsec 2019-10-22 18:57:51 +03:00
Kostas Missos 7c42f72b8a refactor: Remove all unwanted whitespace 2019-10-18 18:02:06 +03:00
CTCaer 2857fcca52 pmic: Restore forced power off timeout back to 5s 2019-09-23 16:41:37 +03:00
CTCaer 23e246f224 i2c: Add missing clocks + more refactoring 2019-09-12 23:11:17 +03:00
CTCaer 3028568019 pmc-ccplex: Have proper Power Domain toggling 2019-09-12 23:09:38 +03:00
CTCaer a8d529cf6a Refactoring and comment adding 2019-09-12 23:08:38 +03:00
CTCaer c5b64a2b58 tsec: Don't disable HOST1x clock because it's used 
Tsec keys function always disabled host1x clock after running.
This interferes with display interface and disables further window frame syncing.
Display_end code already handles disable and reset of said clock.

It also fixes an ancient bug that was mitigated by removing the 5 frame sync on HOST1X_SYNC_SYNCPT_9 at channel 0:
https://github.com/CTCaer/hekate/commit/5fd9daa3642216ae8a28f6cb662a262e29e7ce06#diff-6b0c56eab8515465d559ff0ea73a22c3L152
 2019-09-11 02:19:41 +03:00
Kostas Missos 718e502983 Add more register names + refactoring 2019-09-09 16:56:37 +03:00
Kostas Missos c1e072986d Fix build issues 2019-09-09 15:48:49 +03:00
CTCaer 8045d7992b hwinit: FIx CPU/GPU on warmboot reboot from Linux 
Thanks @Stary2001 for all the testing!
 2019-09-01 03:55:43 +03:00
CTCaer f622d57f6b utils: Fix ms timer accuracy 
Additionally add BPMP delay timers for future use.
 2019-08-28 01:33:38 +03:00
CTCaer 3472e7e7fb Various bugfixes 2019-08-28 01:08:57 +03:00
ctcaer@gmail.com 138da26a9a [BPMP] Fix cache coherency issues 
+ Fix framebuffer memfetcher for some SoC revisions.
 2019-07-06 22:22:47 +03:00
ctcaer@gmail.com 08b84384a6 Bugfixes and cleanup 2019-07-06 22:08:37 +03:00
ctcaer@gmail.com 03872e814a [Nyx] Prep hekate main for nyx 2019-06-30 03:55:19 +03:00
ctcaer@gmail.com 52478833de [MTC] Utilize Minerva Training Cell 2019-06-30 03:49:33 +03:00
ctcaer@gmail.com f3dcfab095 More bugfixes 2019-06-30 03:40:37 +03:00
ctcaer@gmail.com 8101fd3f7f Various bugfixes 2019-06-30 03:15:46 +03:00
ctcaer@gmail.com 91606334c4 [sdmmc] Revert 204MHz sd device clock 
Again some Sandisk U1 cards do not behave at all at speeds like that (204MHz / 102MB/s).

Revert back to 163.2MHz / 81.6MB/s.
 2019-04-23 03:34:39 +03:00
ctcaer@gmail.com 25f6e91677 [sdmmc] Fix Sandisk U1 fast power cycle 
Some Sandisk U1 sd cards do not behave nicely if they power cycle too fast. A min 100ms wait, is enough to mitigate that.

Fortunately, because of how the code paths are structured, this was never hit.
 2019-04-23 03:31:16 +03:00
ctcaer@gmail.com 8eb5ee867d [GFX] Finish ctxt global usage 
Plus:
- Some whitespace fixes
- Allow UHS bus to reach max 102MB/s from 81.6MB/s
 2019-04-21 17:33:39 +03:00