Since this runs on BPMP a meaningful alignment is 32 bytes, so use a nicer 256.
Reduces size of libs of up to 64KB.
If libs are compiled for armv7/8, 4KB should be used if missing from compiler.
- Allow rebuilds without rebuilding everything
By detecting changes everywhere that matters (flags, objects and headers).
- Add progress bar
- Fully clean everything when clean goal is used
T21X v0.1:
- Add IRB/no table support
T210 v1.6/Common:
- Add a proper table for 8GB T210 config instead of editing a 4GB one
- Increase timeout to 2ms
- Generally improve checks and guard against unknown SoCs/SKUs
- Remove the long ago obsolete OVERCLOCK_FREQ/OVERCLOCK_VOLTAGE ifdefs
- "Perf" hack removal (match L4T mini Minerva)
It's not a performance hack, it just kills low power modes.
If wanted in L4T, use HP Mode in `ram_oc_opt`.
- Simplify of burst regs config
- Refactor of several bit defines and variables
- Correct Zqlatch period checks
- Update periodic training
- Simplify some logic
- Fix some mr13 values
- Separate EMC channel enums from macros
- Add extra reg flushes
- Fix tree margin comparison signedness
By using incorrect signedness on tree margins the delta taps would always apply.
By casting margins to integer it now properly checks if it should apply delta taps on the new trimmers.
This fixes a bug that exists in every Nvidia emc dvfs code.
- Training and switch is now faster
- Compatibility checks: New Minerva does not allow old binaries. New binaries do not allow old Minerva
- MTC table is now in a safe region
- Periodic training period increased to every 250ms
