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nyx: info: say when sbk fuses can't be read

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Additionally, swap the IDDQ real with raw values.
This commit is contained in:
CTCaer
2025-11-10 13:52:43 +02:00
parent 5d75b01491
commit e38cff815b
1 changed files with 65 additions and 32 deletions
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97
nyx/nyx_gui/frontend/gui_info.c
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@@ -426,7 +426,7 @@ static lv_res_t _create_window_hw_info_status(lv_obj_t *btn)
// Decode fuses. // Decode fuses.
char *sku; char *sku;
char dram_man[64]; char dram_model[64];
char fuses_hos_version[64]; char fuses_hos_version[64];
u8 dram_id = fuse_read_dramid(true); u8 dram_id = fuse_read_dramid(true);
@@ -456,22 +456,22 @@ static lv_res_t _create_window_hw_info_status(lv_obj_t *btn)
{ {
// LPDDR4 3200Mbps. // LPDDR4 3200Mbps.
case LPDDR4_ICOSA_4GB_SAMSUNG_K4F6E304HB_MGCH: case LPDDR4_ICOSA_4GB_SAMSUNG_K4F6E304HB_MGCH:
strcpy(dram_man, "Samsung K4F6E304HB-MGCH 4GB"); strcpy(dram_model, "Samsung K4F6E304HB-MGCH 4GB");
break; break;
case LPDDR4_ICOSA_4GB_HYNIX_H9HCNNNBPUMLHR_NLE: case LPDDR4_ICOSA_4GB_HYNIX_H9HCNNNBPUMLHR_NLE:
strcpy(dram_man, "Hynix H9HCNNNBPUMLHR-NLE 4GB"); strcpy(dram_model, "Hynix H9HCNNNBPUMLHR-NLE 4GB");
break; break;
case LPDDR4_ICOSA_4GB_MICRON_MT53B512M32D2NP_062_WTC: case LPDDR4_ICOSA_4GB_MICRON_MT53B512M32D2NP_062_WTC:
strcpy(dram_man, "Micron MT53B512M32D2NP-062 WT:C"); strcpy(dram_model, "Micron MT53B512M32D2NP-062 WT:C");
break; break;
case LPDDR4_ICOSA_6GB_SAMSUNG_K4FHE3D4HM_MGCH: case LPDDR4_ICOSA_6GB_SAMSUNG_K4FHE3D4HM_MGCH:
strcpy(dram_man, "Samsung K4FHE3D4HM-MGCH 6GB"); strcpy(dram_model, "Samsung K4FHE3D4HM-MGCH 6GB");
break; break;
case LPDDR4_ICOSA_8GB_SAMSUNG_K4FBE3D4HM_MGXX: case LPDDR4_ICOSA_8GB_SAMSUNG_K4FBE3D4HM_MGXX:
strcpy(dram_man, "Samsung K4FBE3D4HM-MGXX 8GB"); strcpy(dram_model, "Samsung K4FBE3D4HM-MGXX 8GB");
break; break;
default: default:
strcpy(dram_man, "#FF8000 Unknown#"); strcpy(dram_model, "#FF8000 Unknown#");
break; break;
} }
} }
@@ -482,60 +482,60 @@ static lv_res_t _create_window_hw_info_status(lv_obj_t *btn)
// LPDDR4X 3733Mbps. // LPDDR4X 3733Mbps.
case LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AM_MGCJ: case LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AM_MGCJ:
case LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AM_MGCJ: case LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AM_MGCJ:
strcpy(dram_man, "Samsung K4U6E3S4AM-MGCJ 4GB"); strcpy(dram_model, "Samsung K4U6E3S4AM-MGCJ 4GB");
break; break;
case LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AM_MGCJ: case LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AM_MGCJ:
case LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AM_MGCJ: case LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AM_MGCJ:
strcpy(dram_man, "Samsung K4UBE3D4AM-MGCJ 8GB"); strcpy(dram_model, "Samsung K4UBE3D4AM-MGCJ 8GB");
break; break;
case LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLHR_NME: case LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLHR_NME:
case LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLHR_NME: case LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLHR_NME:
strcpy(dram_man, "Hynix H9HCNNNBKMMLHR-NME 4GB"); strcpy(dram_model, "Hynix H9HCNNNBKMMLHR-NME 4GB");
break; break;
case LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTE: // 4266Mbps. case LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTE: // 4266Mbps.
case LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTE: // 4266Mbps. case LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTE: // 4266Mbps.
strcpy(dram_man, "Micron MT53E512M32D2NP-046 WT:E"); strcpy(dram_model, "Micron MT53E512M32D2NP-046 WT:E");
break; break;
// LPDDR4X 4266Mbps // LPDDR4X 4266Mbps
case LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AA_MGCL: case LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AA_MGCL:
case LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AA_MGCL: case LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AA_MGCL:
case LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AA_MGCL: case LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AA_MGCL:
strcpy(dram_man, "Samsung K4U6E3S4AA-MGCL 4GB"); strcpy(dram_model, "Samsung K4U6E3S4AA-MGCL 4GB");
break; break;
case LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AA_MGCL: case LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AA_MGCL:
case LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AA_MGCL: case LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AA_MGCL:
case LPDDR4X_AULA_8GB_SAMSUNG_K4UBE3D4AA_MGCL: case LPDDR4X_AULA_8GB_SAMSUNG_K4UBE3D4AA_MGCL:
strcpy(dram_man, "Samsung K4UBE3D4AA-MGCL 8GB"); strcpy(dram_model, "Samsung K4UBE3D4AA-MGCL 8GB");
break; break;
case LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AB_MGCL: case LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AB_MGCL:
case LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AB_MGCL: case LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AB_MGCL:
case LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AB_MGCL: case LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AB_MGCL:
strcpy(dram_man, "Samsung K4U6E3S4AB-MGCL 4GB"); strcpy(dram_model, "Samsung K4U6E3S4AB-MGCL 4GB");
break; break;
case LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTF: case LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTF:
case LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTF: case LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTF:
case LPDDR4X_AULA_4GB_MICRON_MT53E512M32D2NP_046_WTF: case LPDDR4X_AULA_4GB_MICRON_MT53E512M32D2NP_046_WTF:
strcpy(dram_man, "Micron MT53E512M32D2NP-046 WT:F"); strcpy(dram_model, "Micron MT53E512M32D2NP-046 WT:F");
break; break;
case LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLXR_NEE: // Replaced from Copper. case LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLXR_NEE: // Replaced from Copper.
case LPDDR4X_AULA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE: // Replaced from Copper. case LPDDR4X_AULA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE: // Replaced from Copper.
case LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE: // Replaced from Copper. case LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE: // Replaced from Copper.
strcpy(dram_man, "Hynix H9HCNNNBKMMLXR-NEE 4GB"); strcpy(dram_model, "Hynix H9HCNNNBKMMLXR-NEE 4GB");
break; break;
case LPDDR4X_IOWA_4GB_HYNIX_H54G46CYRBX267: case LPDDR4X_IOWA_4GB_HYNIX_H54G46CYRBX267:
case LPDDR4X_HOAG_4GB_HYNIX_H54G46CYRBX267: case LPDDR4X_HOAG_4GB_HYNIX_H54G46CYRBX267:
case LPDDR4X_AULA_4GB_HYNIX_H54G46CYRBX267: case LPDDR4X_AULA_4GB_HYNIX_H54G46CYRBX267:
strcpy(dram_man, "Hynix H54G46CYRBX267 4GB"); strcpy(dram_model, "Hynix H54G46CYRBX267 4GB");
break; break;
case LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D1NP_046_WTB: case LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D1NP_046_WTB:
case LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D1NP_046_WTB: case LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D1NP_046_WTB:
case LPDDR4X_AULA_4GB_MICRON_MT53E512M32D1NP_046_WTB: case LPDDR4X_AULA_4GB_MICRON_MT53E512M32D1NP_046_WTB:
strcpy(dram_man, "Micron MT53E512M32D1NP-046 WT:B"); strcpy(dram_model, "Micron MT53E512M32D1NP-046 WT:B");
break; break;
default: default:
strcpy(dram_man, "#FF8000 Contact me!#"); strcpy(dram_model, "#FF8000 Contact me!#");
break; break;
} }
} }
@@ -635,22 +635,55 @@ static lv_res_t _create_window_hw_info_status(lv_obj_t *btn)
lot_code0 <<= 6; lot_code0 <<= 6;
} }
char sbk_key[64];
char dev_key[32];
if (FUSE(FUSE_PRIVATE_KEY0) == 0xFFFFFFFF &&
FUSE(FUSE_PRIVATE_KEY1) == 0xFFFFFFFF &&
FUSE(FUSE_PRIVATE_KEY2) == 0xFFFFFFFF &&
FUSE(FUSE_PRIVATE_KEY3) == 0xFFFFFFFF &&
FUSE(FUSE_PRIVATE_KEY4) == 0xFFFFFFFF)
{
strcpy(sbk_key, "Can't be read (locked out)");
strcpy(dev_key, "Can't be read (locked out)");
}
else
{
s_printf(sbk_key, "%08X%08X%08X%08X",
byte_swap_32(FUSE(FUSE_PRIVATE_KEY0)), byte_swap_32(FUSE(FUSE_PRIVATE_KEY1)),
byte_swap_32(FUSE(FUSE_PRIVATE_KEY2)), byte_swap_32(FUSE(FUSE_PRIVATE_KEY3)));
s_printf(dev_key, "%08X", byte_swap_32(FUSE(FUSE_PRIVATE_KEY4)));
}
u32 chip_id = APB_MISC(APB_MISC_GP_HIDREV); u32 chip_id = APB_MISC(APB_MISC_GP_HIDREV);
char *chip_name = hw_get_chip_id() == GP_HIDREV_MAJOR_T210 ? "T210 (Erista)" : "T210B01 (Mariko)";
// Parse fuses and display them. // Parse fuses and display them.
s_printf(txt_buf, s_printf(txt_buf,
"%02X - %s - M%d A%02d\n" "%02X - %s - M%d A%02d\n"
"%X - %s - %s\n%02d - %s\n%d | %d - HOS: %s\n%08X %08X %08X\n%08X%08X%08X%08X\n%08X\n%08X%08X%08X%08X\n%08X%08X%08X%08X\n%d\n" "%X - %s - %s\n"
"%s\n%d.%02d (0x%X)\n%d.%02d (0x%X)\n%d\n%d\n%d\n%d\n0x%X\n%d\n%d (%d)\n%d (%d)\n%d (%d)\n" "%02d - %s\n"
"%d\n%d\n%d (0x%X)\n%d\n%d\n%d", "%d | %d - HOS: %s\n"
(chip_id >> 8) & 0xFF, "%08X %08X %08X\n"
hw_get_chip_id() == GP_HIDREV_MAJOR_T210 ? "T210 (Erista)" : "T210B01 (Mariko)", "%s\n%s\n"
(chip_id >> 4) & 0xF, (chip_id >> 16) & 0xF, "%08X%08X%08X%08X\n"
"%08X%08X%08X%08X\n"
"%d\n"
"%s\n"
"%d.%02d (0x%X)\n"
"%d.%02d (0x%X)\n"
"%d\n%d\n%d\n"
"%d\n0x%X\n%d\n"
"%d (%d)\n"
"%d (%d)\n"
"%d (%d)\n"
"%d\n%d\n%d (0x%X)\n"
"%d\n%d\n%d",
(chip_id >> 8) & 0xFF, chip_name, (chip_id >> 4) & 0xF, (chip_id >> 16) & 0xF,
FUSE(FUSE_SKU_INFO), sku, fuse_read_hw_state() ? "Dev" : "Retail", FUSE(FUSE_SKU_INFO), sku, fuse_read_hw_state() ? "Dev" : "Retail",
dram_id, dram_man, burnt_fuses_7, burnt_fuses_6, fuses_hos_version, dram_id, dram_model,
burnt_fuses_7, burnt_fuses_6, fuses_hos_version,
fuse_read_odm(4), fuse_read_odm(6), fuse_read_odm(7), fuse_read_odm(4), fuse_read_odm(6), fuse_read_odm(7),
byte_swap_32(FUSE(FUSE_PRIVATE_KEY0)), byte_swap_32(FUSE(FUSE_PRIVATE_KEY1)), sbk_key, dev_key,
byte_swap_32(FUSE(FUSE_PRIVATE_KEY2)), byte_swap_32(FUSE(FUSE_PRIVATE_KEY3)),
byte_swap_32(FUSE(FUSE_PRIVATE_KEY4)),
byte_swap_32(FUSE(FUSE_PUBLIC_KEY0)), byte_swap_32(FUSE(FUSE_PUBLIC_KEY1)), byte_swap_32(FUSE(FUSE_PUBLIC_KEY0)), byte_swap_32(FUSE(FUSE_PUBLIC_KEY1)),
byte_swap_32(FUSE(FUSE_PUBLIC_KEY2)), byte_swap_32(FUSE(FUSE_PUBLIC_KEY3)), byte_swap_32(FUSE(FUSE_PUBLIC_KEY2)), byte_swap_32(FUSE(FUSE_PUBLIC_KEY3)),
byte_swap_32(FUSE(FUSE_PUBLIC_KEY4)), byte_swap_32(FUSE(FUSE_PUBLIC_KEY5)), byte_swap_32(FUSE(FUSE_PUBLIC_KEY4)), byte_swap_32(FUSE(FUSE_PUBLIC_KEY5)),
@@ -661,9 +694,9 @@ static lv_res_t _create_window_hw_info_status(lv_obj_t *btn)
(FUSE(FUSE_OPT_CP_REV) >> 5) & 0x3F, FUSE(FUSE_OPT_CP_REV) & 0x1F, FUSE(FUSE_OPT_CP_REV), (FUSE(FUSE_OPT_CP_REV) >> 5) & 0x3F, FUSE(FUSE_OPT_CP_REV) & 0x1F, FUSE(FUSE_OPT_CP_REV),
FUSE(FUSE_CPU_SPEEDO_0_CALIB), FUSE(FUSE_CPU_SPEEDO_1_CALIB), FUSE(FUSE_CPU_SPEEDO_2_CALIB), FUSE(FUSE_CPU_SPEEDO_0_CALIB), FUSE(FUSE_CPU_SPEEDO_1_CALIB), FUSE(FUSE_CPU_SPEEDO_2_CALIB),
FUSE(FUSE_SOC_SPEEDO_0_CALIB), FUSE(FUSE_SOC_SPEEDO_1_CALIB), FUSE(FUSE_SOC_SPEEDO_2_CALIB), FUSE(FUSE_SOC_SPEEDO_0_CALIB), FUSE(FUSE_SOC_SPEEDO_1_CALIB), FUSE(FUSE_SOC_SPEEDO_2_CALIB),
FUSE(FUSE_CPU_IDDQ_CALIB), FUSE(FUSE_CPU_IDDQ_CALIB) * 4, FUSE(FUSE_CPU_IDDQ_CALIB) * 4, FUSE(FUSE_CPU_IDDQ_CALIB),
FUSE(FUSE_SOC_IDDQ_CALIB), FUSE(FUSE_SOC_IDDQ_CALIB) * 4, FUSE(FUSE_SOC_IDDQ_CALIB) * 4, FUSE(FUSE_SOC_IDDQ_CALIB),
FUSE(FUSE_GPU_IDDQ_CALIB), FUSE(FUSE_GPU_IDDQ_CALIB) * 5, FUSE(FUSE_GPU_IDDQ_CALIB) * 5, FUSE(FUSE_GPU_IDDQ_CALIB),
FUSE(FUSE_OPT_VENDOR_CODE), FUSE(FUSE_OPT_FAB_CODE), lot_bin, FUSE(FUSE_OPT_LOT_CODE_0), FUSE(FUSE_OPT_VENDOR_CODE), FUSE(FUSE_OPT_FAB_CODE), lot_bin, FUSE(FUSE_OPT_LOT_CODE_0),
FUSE(FUSE_OPT_WAFER_ID), FUSE(FUSE_OPT_X_COORDINATE), FUSE(FUSE_OPT_Y_COORDINATE)); FUSE(FUSE_OPT_WAFER_ID), FUSE(FUSE_OPT_X_COORDINATE), FUSE(FUSE_OPT_Y_COORDINATE));